Datasheet SN74vcx162 Datasheet

74VCX16244
Low Voltage 16-Bit Buffer/Line Driver with

3.6V Tolerant Input s and Outputs

74VCX16244 Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs

October 1996
Revised November 2001

General Description

The VCX16244 conta ins sixteen n on-invertin g buffers w ith
3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver. The device is nibble (4-bit) controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.

The 74VCX16244 is designed for low voltage (1.4V to

3.6V) V
The 74VCX16244 i s fabricated with an advanc ed CMOS

technology to achieve high speed operation while maintain­ing low CMOS power dissipation.

applications with I/O capability up to 3.6V.

CC

Features

■ 1.4V–3.6V VCC supply operation

■ 3.6V tolerant inputs and outputs

■ t

PD

2.5 ns max for 3.0V to 3.6V V

■ Power-off high impedance inputs and outputs

■ Supports live insertion and withdrawal (Note 1)

■ Static Drive (I

±24 mA @ 3.0V V

■ Uses patented noise/EMI reductio n circuitr y

■ Latch-up performance exce eds 300 mA

■ ESD performance:

Human body model
Machine model

■ Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)

Note 1: To ensure the high-impedance state d uring power up or power

should be tied to VCC through a pull-up r esistor; the min imum

down, OE
value of the res istor is d eter mine d by the cu rre nt-sou rcin g ca pa bility of t he

driver.

OH/IOL

)

CC

> 200V

Ordering Code:

Order Number Package Number Package Description

74VCX16244GX
(Note 2)

74VCX16244MTD
(Note 3)

Note 2: BGA package available in Tape and Reel only.
Note 3: Devices also available in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.

BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

[Tape and Reel]

CC

> 2000V

© 2001 Fairchild Semiconductor Corporation DS012168 www.fairchildsemi.com

Logic Symbol

74VCX16244

Pin Descriptions

Pin Names Description

OE

n

I

0–I15

O

0–O15

NC No Connect

Output Enable Input (Active LOW)
Inputs
Outputs

Connection Diagrams

Pin Assignment for TSSOP

Pin Assignment for FBGA

FBGA Pin Assignments

123456

A O
B O
C O
D O
E O
F O
G O
H O

J O

NC OE1OE2NC I

0

O1NC NC I

2

O3V

4
6

8
10
12O11VCCVCCI11
14O13

15

CCVCCI3

O5GND GND I
O7GND GND I
O9GND GND I

NC NC I

NC OE4OE3NC I

Truth Tables

Inputs Outputs

OE

1

LL L
LH H
HX Z

OE

3

LL L
LH H
HX Z

OE

2

LL L
LH H
HX Z

I0–I

3

O0–O

Inputs Outputs

I8-I

11

O8–O

Inputs Outputs

I4-I

7

O4-O

1

5
7
9

13I14

3

11

7

0

I

2

I

4

I

6

I

8

I

10

I

12

15

(Top Thru View)

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Inputs Outputs

OE

4

I12-I

15

O12-O

LL L
LH H
HX Z

H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = High Impedance

15

Functional Description

The 74VCX16244 contains sixteen non-inverting buffers
with 3-STATE outputs. The device is nibble (4 bits) con­trolled with each nibble fun ction i ng ide ntically, but indepen­dent of each other. The control pins may be shorted
together to obtain full 16-bit op eration.The 3-STATE out-

Logic Diagram

puts are controlled by an Output Enable (OE

is LOW, the outputs are in the 2-state mode. W hen

OE

n

is HIGH, the standard outputs are in the high imped-

OE

n

ance mode but this does not interfere with entering new
data into the inputs.

) input. When

n

74VCX16244

3 www.fairchildsemi.com

Absolute Maximum Ratings(Note 4) Recommended Operating

Supply Voltage (VCC) −0.5V to +4.6V
DC Input Voltage (V
Output Voltage (V

Outputs 3-STATED

74VCX16244

Outputs Active (Note 5)
DC Input Diode Current (I
DC Output Diode Current (I

V

< 0V −50 mA

O

V

> V

O

CC

) −0.5V to +4.6V

I

)

O

−0.5V to +4.6V

−0.5V to V

) VI < 0V −50 mA

IK

)

OK

DC Output Source/Sink Current

) ±50 mA

(I

OH/IOL

DC V

or GND Current per

CC

Supply Pin (I
Storage Temperature Range ( T

or GND) ±100 mA

CC

) −65°C to +150°C

STG

+0.5V

CC

+50 mA

Conditions

Power Supply

Operating 1.4V to 3.6V
Input Voltage
Output Voltage (V

Output in Active States 0V to V

Output in 3-State 0.0V to 3.6V
Output Current in I

VCC = 3.0V to 3.6V ±24 mA

V

= 2.3V to 2.7V ±18 mA

CC

= 1.65V to 2.3V ±6 mA

V

CC

V

= 1.4V to 1.6V ±2 mA

CC

Free Air Operating Temperature (T
Minimum Input Edge Rate (

V

= 0.8V to 2.0V, VCC = 3.0V 10 ns/V

IN

Note 4: The Absolute Maximum Ratings are those values beyond which
the safety of the d evice cannot be guaranteed. The device sh ould not be
operated at these limit s. The parametric values defin ed in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat­ings. The “Recommended Operating Conditions” table will define the condi­tions for actual device opera t ion.

Absolute Maximum Rating must be observed.

Note 5: I

O

Note 6: Floating or unused inputs must be held HIGH or LOW.

(Note 6)

)

O

OH/IOL

∆t/∆V)

DC Electrical Characteristics

V

Symbol Parameter Conditions

V

V

V

HIGH Level Input Voltage 2.7 - 3.6 2.0

IH

LOW Level Input Voltage 2.7–3.6 0.8

IL

HIGH Level Output Voltage IOH = −100 µA2.7–3.6 VCC − 0.2

OH

I

= −12 mA 2.7 2.2

OH

= −18 mA 3.0 2.4

I

OH

IOH = −24 mA 3.0 2.2
IOH = −100 µA2.3–2.7 VCC − 0.2
IOH = −6 mA 2.3 2.0
IOH = −12 mA 2.3 1.8
IOH = −18 mA 2.3 1.7
IOH = −100 µA1.65−2.3 VCC − 0.2
IOH = −6 mA 1.65 1.25
IOH = −100 µA 1.4 - 1.6 VCC − 0.2
IOH = −2 mA 1.4 1.05

CC

(V)

2.3 - 2.7 1.6

1.65 - 2.3 0.65 × V

1.4 - 1.6 0.65 × V

2.3–2.7 0.7

1.65−2.3 0.35 × V

1.4 - 1.6 0.35 × V

Min Max Units

−0.3V to +3.6V

) −40°C to +85°C

A

CC
CC

CC
CC

CC

V

V

V

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DC Electrical Characteristics (Continued)

V

Symbol Parameter Conditions

V

OL

LOW Level Output Voltage IOL = 100 µA2.7–3.6 0.2

= 12 mA 2.7 0.4

I

OL

I

= 18 mA 3.0 0.4

OL

IOL = 24 mA 3.0 0.55

= 100 µA2.3–2.7 0.2

I

OL

I

= 12 mA 2.3 0.4

OL

IOL = 18 mA 2.3 0.6

= 100 µA1.65−2.3 0.2

I

OL

I

= 6 mA 1.65 0.3

OL

IOL = 100 µA 1.4 - 1.6 0.2

= 2 mA 1.4 0.35

I

I

I

I

OZ

I

OFF

I

CC

Input Leakage Current 0 ≤ VI ≤ 3.6V 1.4–3.6 ±5.0 µA
3-STATE Output Leakage 0 ≤ VO ≤ 3.6V

I Power-OFF Leakage Current 0 ≤ (VI, VO) ≤ 3.6V 0 10 µA

Quiescent Supply Current VI = VCC or GND 1.4–3.6 20

OL

VI = VIH or V

IL

VCC ≤ (VI, VO) ≤ 3.6V (Note 7) 1.4–3.6 ±20

∆I

Note 7: Outputs disabled or 3-STATE only.

Increase in ICC per Input VIH = VCC −0.6V 2.7–3.6 750 µA

CC

CC

(V)

Min Max Units

1.4–3.6 ±10 µA

74VCX16244

V

µA

5 www.fairchildsemi.com

AC Electrical Characteristics (Note 8)

Symbol Parameter Conditions

t

PHL

t

PLH

74VCX16244

t

PZL

t

PZH

Propagation Delay CL = 30 pF, RL = 500Ω 3.3 ± 0.3 0.8 2.5

C

= 15 pF, RL = 2kΩ 1.5 ± 0.1 1.0 12.0 Figures

L

Output Enable Time CL = 30 pF, RL = 500Ω 3.3 ± 0.3 0.8 3.5

V

2.5 ± 0.2 1.0 3.0

1.8 ± 0.15 1.5 6.0

2.5 ± 0.2 1.0 4.1

1.8 ± 0.15 1.5 8.2

CL = 15 pF, RL = 2kΩ 1.5 ± 0.1 1.0 16.4 Figures

t
t

PLZ
PHZ

Output Disable Time CL = 30 pF, RL = 500Ω 3.3 ± 0.3 0.8 3.5

2.5 ± 0.2 1.0 3.8

1.8 ± 0.15 1.5 6.8

= 15 pF, RL = 2kΩ 1.5 ± 0.1 1.0 13.6 Figures

C

L

t

OSHL

t

OSLH

Output to Output Skew CL = 30 pF, RL = 500Ω 3.3 ± 0.3 0.5
(Note 9) 2.5 ± 0.2 0.5

1.8 ± 0.15 0.75

CL = 15 pF, RL = 2kΩ 1.5 ± 0.1 1.5

Note 8: For CL = 50PF, add approximately 300 ps to the AC maximum specification.
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The

specification applies to any outputs sw it c hing in the same direction, either HIGH-to-LOW (t

) or LOW-to-HIGH (t

OSHL

= −40°C to +85°C

CCTA

(V) Min Max Number

Units

ns

ns

ns

ns

).

OSLH

Dynamic Switching Characteristics

Symbol Parameter Conditions

V

OLP

V

OLV

V

OHV

Quiet Output Dynamic Peak V

Quiet Output Dynamic Valley V

Quiet Output Dynamic Valley V

OL

OL

OH

CL = 30 pF, VIH = VCC, VIL = 0V 1.8 0.25

CL = 30 pF, VIH = VCC, VIL = 0V 1.8 −0.25

CL = 30 pF, VIH = VCC, VIL = 0V 1.8 1.5

V

(V) Typical

3.3 0.8

3.3 −0.8

3.3 2.2

CCTA

= +25°C

Figure

Figures

1, 2

5, 6

Figures

1, 3, 4

5, 7, 8

Figures

1, 3, 4

5, 7, 8

Units

V2.5 0.6

V2.5 −0.6

V2.5 1.9

Capacitance

Symbol Parameter Conditions

C

IN

C

OUT

C

PD

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Input Capacitance VCC = 1.8, 2.5V or 3.3V, VI = 0V or V
Output Capacitance VI = 0V or VCC, VCC = 1.8V, 2.5V or 3.3V 7 pF
Power Dissipation Capacitance VI = 0V or VCC, f = 10 MHz, VCC = 1.8V, 2.5V or 3.3V 20 pF

TA = +25°C

Typical

CC

Units

6pF

AC Loading and Waveforms (VCC 3.3V ± 0.3V to 1.8V ± 0.15V)

TEST SWITCH

t

, t

PLH

PHL

t

, t

PZL

t

PZH

PLZ

, t

PHZ

V

x 2 at VCC = 2.5 ± 0.2V; 1.8V ± 0.15V

CC

FIGURE 1. AC Test Circuit

FIGURE 2. Waveform for Inverting and Non-Inverting Functions

Open

6V at VCC = 3.3 ± 0.3V;

GND

74VCX16244

FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic

FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic

V

Symbol

V

mi

V

mo

V

X

V

Y

3.3V ± 0.3V 2.5V ± 0.2V 1.8V ± 0.15V

1.5V VCC/2 VCC/2

1.5V VCC/2 VCC/2
VOL +0.3V VOL +0.15V VOL +0.15V
VOH −0.3V VOH −0.15V VOH −0.15V

CC

7 www.fairchildsemi.com

AC Loading and Waveforms (VCC 1.5 ± 0.1V)

74VCX16244

TEST SWITCH

t

, t

PLH

PHL

t

, t

PZL

PLZ

, t

t

PZH

PHZ

FIGURE 6. Waveform for Inverting and Non-Inverting Functions

VCC x 2 at VCC = 1.5 ± 0.1V

FIGURE 5. AC Test Circuit

Open

GND

FIGURE 7. 3-STATE Output High Enable and Disable Times for Low Voltage Logic

FIGURE 8. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic

Symbol

V

mi

V

mo

V

X

V

Y

www.fairchildsemi.com 8

V

CC

1.5V ± 0.1V

VCC/2
VCC/2

VOL + 0.1V

VOH − 0.1V

Physical Dimensions inches (millimeters) unless otherwise noted

74VCX16244

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

Package Number BGA54A

9 www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Fairchild does not assume any responsibility for use of any circuitr y described, no circuit patent licenses are implied a nd

74VCX16244 Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are device s or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea­sonably expected to result in a significant inju ry to the
user.

www.fairchildsemi.com 10

Package Number MTD48

2. A critical component in any compon ent of a l ife supp ort
device or system whose failu re to perform can be rea­sonably expected to cause the failure of the li fe su pp ort
device or system, or to affect its safety or effectiveness.

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