Datasheet SN74LVCZ245ADBR, SN74LVCZ245ADGVR, SN74LVCZ245ADW, SN74LVCZ245ADWR, SN74LVCZ245AN Datasheet (Texas Instruments)

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SN74LVCZ245A

OCTAL BUS TRANSCEIVER

WITH 3-STATE OUTPUTS

SCES275B – JUNE 1999 – REVISED JANUARY 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

EPIC

 (Enhanced-Performance Implanted

CMOS) Submicron Process

T ypical V

OLP

(Output Ground Bounce)

<0.8 V at VCC = 3.3 V, TA = 25°C

T ypical V

OHV

(Output VOH Undershoot) >2 V

at V

= 3.3 V, TA = 25°C

off

and Power-Up 3-State Support Hot

Insertion

Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With

3.3-V VCC)

Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

Package Options Include Shrink Small-Outline (DB), Plastic Thin Very Small-Outline (DGV), Small-Outline (DW), and Thin Shrink Small-Outline (PW) Packages

description

This octal bus transceiver is designed for 2.7-V to 3.6-V VCC operation. The SN74L VCZ245A is designed for asynchronous communication between data buses. The device transmits

data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

When VCC is between 0 and 1.5 V , the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for hot-insertion applications using I

off

and power-up 3-state. The I

off

circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

The SN74LVCZ245A is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

INPUTS

OE DIR

OPERATION

L L B data to A bus L H A data to B bus H X Isolation

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

1 2 3 4 5 6 7 8 9 10

20 19 18 17 16 15 14 13 12

DIR

A1 A2 A3 A4 A5 A6 A7 A8

GND

OE B1 B2 B3 B4 B5 B6 B7 B8

DB, DGV, DW, OR PW PACKAGE

(TOP VIEW)

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SN74LVCZ245A OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

SCES275B – JUNE 1999 – REVISED JANUARY 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic symbol

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

3 EN2 [AB]

3 EN1 [BA]

DIR

logic diagram (positive logic)

DIR

To Seven Other Channels

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SN74LVCZ245A

OCTAL BUS TRANSCEIVER

WITH 3-STATE OUTPUTS

SCES275B – JUNE 1999 – REVISED JANUARY 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

†

Supply voltage range, VCC –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI:(see Note 1) –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high-impedance or power-off state, V

(see Note 1) –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high or low state, V

(see Notes 1 and 2) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, IIK (VI < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, I

(VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, IO ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous current through VCC or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θ

(see Note 3): DB package 115°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DGV package 146°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DW package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package 128°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The value of VCC is provided in the recommended operating conditions table.

3. The package thermal impedance is calculated in accordance with JESD 51.

recommended operating conditions (see Note 4)

MIN MAX UNIT

Supply voltage 2.7 3.6 V

High-level input voltage VCC = 2.7 V to 3.6 V 2 V

Low-level input voltage VCC = 2.7 V to 3.6 V 0.8 V

Input voltage 0 5.5 V

High or low state 0 V

VOOutput voltage

3-state 0 5.5

VCC = 2.7 V –12

IOHHigh-level output current

VCC = 3 V –24

VCC = 2.7 V 12

IOLLow-level output current

VCC = 3 V 24

∆t/∆v Input transition rise or fall rate 6 ns/V ∆t/∆V

Power-up ramp rate 150 µs/V

Operating free-air temperature –40 85 °C

NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs

, literature number SCBA004.

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SN74LVCZ245A OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

SCES275B – JUNE 1999 – REVISED JANUARY 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS

MIN TYP†MAX UNIT

IOH = –100 µA 2.7 V to 3.6 V VCC–0.2

2.7 V 2.2

VOHI

= –

12 mA

3 V 2.4

IOH = –24 mA 3 V 2.2 IOL = 100 µA 2.7 V to 3.6 V 0.2

IOL = 12 mA 2.7 V 0.4

IOL = 24 mA 3 V 0.55

Control inputs VI = 0 to 5.5 V 3.6 V ±5 µA

off

VI or VO = 5.5 V 0 ±5 µA

‡

VO = 0 to 5.5 V 3.6 V ±5 µA

OZPU

VO = 0.5 V to 2.5 V, OE = don’t care 0 to 1.5 V ±5 µA

OZPD

VO = 0.5 V to 2.5 V, OE = don’t care 1.5 V to 0 ±5 µA VI = VCC or GND

100

3.6 V ≤ VI ≤ 5.5 V

3.6 V

100

∆I

One input at VCC – 0.6 V , Other inputs at VCC or GND 2.7 V to 3.6 V 100 µA

Control inputs VI = VCC or GND 3.3 V 4 pF

A or B ports VO = VCC or GND 3.3 V 6 pF

†

All typical values are at VCC = 3.3 V, TA = 25°C.

‡

For I/O ports, the parameter IOZ includes the input leakage current.

This applies in the disabled state only.

switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)

PARAMETER

FROM

VCC = 2.7 V

VCC = 3.3 V

± 0.3 V

UNIT

(INPUT)

(OUTPUT)

MIN MAX MIN MAX

A or B B or A 7.3 1.5 6.3 ns

A or B 9.5 1.5 8.5 ns

dis

A or B 8.5 1.7 7.5 ns

operating characteristics, T

= 25°C

TEST

VCC = 3.3 V

PARAMETER

CONDITIONS

TYP

UNIT

Outputs enabled

Power dissipation capacitance per transceiver

Outputs disabled

= 10 MHz

Page 5

SN74LVCZ245A

OCTAL BUS TRANSCEIVER

WITH 3-STATE OUTPUTS

SCES275B – JUNE 1999 – REVISED JANUARY 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

= 2.7 V AND 3.3 V ± 0.3 V

From Output

Under Test

CL = 30 pF

(see Note A)

LOAD CIRCUIT

2 × V

Open

GND

500 Ω

PLH

PHL

Output

Control

(low-level

enabling)

Output

Waveform 1

S1 at 2 × V

(see Note B)

Output

Waveform 2

S1 at GND

(see Note B)

PZL

PZH

PLZ

PHZ

0 V

VOL + 0.3 V

VOH – 0.3 V

0 V

Input

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOLTAGE WAVEFORMS

PULSE DURATION

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

Timing

Input

Data

Input

Output

Input

PLZ/tPZL

PHZ/tPZH

Open

2 × V

GND

TEST S1

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns. D. The outputs are measured one at a time with one transition per measurement. E. t

PLZ

and t

PHZ

are the same as t

dis

F. t

PZL

and t

PZH

are the same as ten.

G. t

PLH

and t

PHL

are the same as tpd.

VCC/2

VCC/2 VCC/2

VCC/2

VCC/2 VCC/2

VCC/2

Figure 1. Load Circuit and Voltage Waveforms

Page 6

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