Datasheet SN74LVC14AD, SN74LVC14ADBLE, SN74LVC14ADBR, SN74LVC14ADR, SN74LVC14APWLE Datasheet (Texas Instruments)

SN54LVC14A, SN74LVC14A

HEX SCHMITT-TRIGGER INVERTERS

SCAS285L – MARCH 1993 – REVISED JUL Y 1999

D

EPIC

 (Enhanced-Performance Implanted

CMOS) Submicron Process

D

Typical V

(Output Ground Bounce)

OLP

< 0.8 V at VCC = 3.3 V, TA = 25°C

D

Typical V
> 2 V at V

D

Inputs Accept Voltages to 5.5 V

D

ESD Protection Exceeds 2000 V Per

(Output VOH Undershoot)

OHV

= 3.3 V, TA = 25°C

CC

MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)

D

Latch-Up Performance Exceeds 250 mA Per
JESD 17

D

Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Flat (W) Packages, Chip
Carriers (FK), and DIPs (J)

description

The SN54LVC14A hex Schmitt-trigger inverter is
designed for 2.7-V to 3.6-V VCC operation and the
SN74LVC14A hex Schmitt-trigger inverter is
designed for 1.65-V to 3.6-V VCC operation.

The devices contain six independent inverters,
and perform the Boolean function Y = A.

SN54LVC14A...J OR W PACKAGE

SN74LVC14A. . . D, DB, OR PW PACKAGE

SN54LVC14. . . FK PACKAGE

2A

NC

2Y

NC

3A

NC – No internal connection

(TOP VIEW)

1A

1

1Y

2

2A

3

2Y

4

3A

5
6

3Y

GND

7

(TOP VIEW)

1Y1ANC

3212019

4
5
6
7
8

910111213

3Y

GND

NC

14
13
12
11
10

9
8

CC

V

4Y

V
6A
6Y
5A
5Y
4A
4Y

6A

18
17
16
15
14

4A

CC

6Y
NC
5A
NC
5Y

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.

The SN54LVC14A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LVC14A is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

(each inverter)

INPUTAOUTPUT

H L

L H

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Y

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  1999, Texas Instruments Incorporated

On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.

1

SN54LVC14A, SN74LVC14A
HEX SCHMITT-TRIGGER INVERTERS

SCAS285L – MARCH 1993 – REVISED JUL Y 1999

logic symbol

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for the D, DB, J, PW, and W packages.

†

1

1A

3

2A 2Y

5

3A 3Y

9

4A 4Y

11

5A 5Y

13

6A 6Y

10
12

2

1Y

4
6
8

logic diagram, each inverter (positive logic)

YA

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, VCC –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (see Note 1) –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage range, VO (see Notes 1 and 2) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, IIK (VI < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, IOK (VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, I

Continuous current through VCC or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θ

Storage temperature range, T

‡

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The value of VCC is provided in the recommended operating conditions table.

3. The package thermal impedance is calculated in accordance with JESD 51.

±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

(see Note 3): D package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

JA

DB package 158°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package 170°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

‡

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

UNIT

VCCSuppl

oltage

V

IOHHigh-level output current

mA

IOLLow-level output current

mA

SN54LVC14A, SN74LVC14A

HEX SCHMITT-TRIGGER INVERTERS

SCAS285L – MARCH 1993 – REVISED JUL Y 1999

recommended operating conditions (see Note 4)

SN54LVC14A SN74LVC14A

MIN MAX MIN MAX

pp

y v

V
V

T

NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Input voltage 0 5.5 0 5.5 V

I

Output voltage 0 V

O

p

p

Operating free-air temperature –55 125 –40 85 °C

A

Implications of Slow or Floating CMOS Inputs

Operating 2 3.6 1.65 3.6
Data retention only 1.5 1.5

CC

VCC = 1.65 V –4
VCC = 2.3 V –8
VCC = 2.7 V –12 –12
VCC = 3 V –24 –24
VCC = 1.65 V 4
VCC = 2.3 V 8
VCC = 2.7 V 12 12
VCC = 3 V 24 24

, literature number SCBA004.

0 V

CC

V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

SN54LVC14A, SN74LVC14A

PARAMETER

TEST CONDITIONS

V

UNIT

V

T+

V

T

∆V

T

I

100 µA

I

mA

I

100 µA

V

V

HEX SCHMITT-TRIGGER INVERTERS

SCAS285L – MARCH 1993 – REVISED JUL Y 1999

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

SN54LVC14A SN74LVC14A

MIN TYP†MAX MIN TYP†MAX

V

V

V

V

Positive-going

threshold

–

Negative-going

threshold

Hysteresis

(VT+ – VT–)

= –

OH

IOH = –4 mA 1.65 V 1.2

V

OH

OL

I

I

I

CC

∆I

CC

C

†

All typical values are at VCC = 3.3 V, TA = 25°C.

i

IOH = –8 mA 2.3 V 1.7

= –12

OH

IOH = –24 mA 3 V 2.2 2.2

=

OL

IOL = 4 mA 1.65 V 0.45
IOL = 8 mA 2.3 V 0.7
IOL = 12 mA 2.7 V 0.4 0.4
IOL = 24 mA 3 V 0.55 0.55
VI = 5.5 V or GND 3.6 V ±5 ±5 µA
VI = VCC or GND, IO = 0 3.6 V 10 10 µA
One input at VCC – 0.6 V,

Other inputs at VCC or GND
VI = VCC or GND 3.3 V 5 5 pF

CC

2.7 V 0.8 2 0.8 2
3 V 0.8 2 0.8 2

3.6 V 0.8 2 0.8 2

2.7 V 0.4 1.4 0.4 1.4
3 V 0.6 1.5 0.6 1.5

3.6 V 0.8 1.8 0.8 1.8

2.7 V 0.3 1.1 0.3 1.1
3 V 0.3 1.2 0.3 1.2

3.6 V 0.3 1.2 0.3 1.2

1.65 V to 3.6 V VCC–0.2

2.7 V to 3.6 V VCC–0.2

2.7 V 2.2 2.2
3 V 2.4 2.4

1.65 V to 3.6 V 0.2

2.7 V to 3.6 V 0.2

2.7 V to 3.6 V 500 500 µA

switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 3)

SN54LVC14A

4

PARAMETER

t

pd

FROM

(INPUT)

A Y 7.5 1 6.4 ns

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TO

(OUTPUT)

VCC = 2.7 V

MIN MAX MIN MAX

VCC = 3.3 V

± 0.3 V

UNIT

PARAMETER

UNIT

SN54LVC14A, SN74LVC14A

HEX SCHMITT-TRIGGER INVERTERS

SCAS285L – MARCH 1993 – REVISED JUL Y 1999

switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figures 1 through 3)

SN74LVC14A

PARAMETER

t

pd

t

sk(o)

FROM

(INPUT)

A Y 13.7 1 7.9 7.5 1 6.4 ns

TO

(OUTPUT)

VCC = 1.8 V

TYP MIN MAX MIN MAX MIN MAX

VCC = 2.5 V

± 0.2 V

VCC = 2.7 V

VCC = 3.3 V

± 0.3 V

UNIT

1 ns

operating characteristics, T

C

Power dissipation capacitance per inverter f = 10 MHz 11 12 15 pF

pd

= 25°C

A

TEST

CONDITIONS

VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V

TYP TYP TYP

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5

SN54LVC14A, SN74LVC14A
HEX SCHMITT-TRIGGER INVERTERS

SCAS285L – MARCH 1993 – REVISED JUL Y 1999

PARAMETER MEASUREMENT INFORMATION

From Output

Under Test

CL = 30 pF

(see Note A)

1 kΩ

1 kΩ

S1

V

2 × V

Open

GND

= 1.8 V

CC

CC

TEST S1

t

pd

t

PLZ/tPZL

t

PHZ/tPZH

Open

2 × V

GND

CC

LOAD CIRCUIT

Timing

Input

t

Data

Input

Input

t

PLH

Output

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. t

PLZ

F. t

PZL

G. t

PLH

VCC/2

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

VCC/2 VCC/2

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

and t

PHZ

and t

PZH

and t

PHL

VCC/2

t

su

are the same as t
are the same as ten.
are the same as tpd.

h

VCC/2

VCC/2 VCC/2

.

dis

t

PHL

V

0 V

V

0 V

V

0 V

V

V

CC

CC

CC

OH

OL

Input

Output

Control

(low-level

enabling)

Output

Waveform 1

S1 at 2 × V

(see Note B)

Output

Waveform 2

S1 at Open

(see Note B)

VOLTAGE WAVEFORMS

PULSE DURATION

t

PZL

CC

t

PZH

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

VCC/2

VCC/2

t

w

V

0 V

V

0 V

V

V

V

0 V

CC

CC

CC

OL

OH

VCC/2VCC/2

VCC/2VCC/2

t

PLZ

VOL + 0.15 V

t

PHZ

VOH – 0.15 V

Figure 1. Load Circuit and Voltage Waveforms

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

From Output

Under Test

CL = 30 pF

(see Note A)

SN54LVC14A, SN74LVC14A

HEX SCHMITT-TRIGGER INVERTERS

SCAS285L – MARCH 1993 – REVISED JUL Y 1999

PARAMETER MEASUREMENT INFORMATION

= 2.5 V ± 0.2 V

V

CC

2 × V

500 Ω

500 Ω

S1

Open

GND

CC

TEST S1

t

pd

t

PLZ/tPZL

t

PHZ/tPZH

Open

2 × V

GND

CC

LOAD CIRCUIT

Timing

Input

t

Data

Input

Input

t

PLH

Output

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. t

PLZ

F. t

PZL

G. t

PLH

VCC/2

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

VCC/2 VCC/2

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

and t

PHZ

and t

PZH

and t

PHL

VCC/2

t

su

are the same as t
are the same as ten.

are the same as tpd.

h

VCC/2

VCC/2 VCC/2

.

dis

t

PHL

V

0 V

V

0 V

V

0 V

V

V

CC

CC

CC

OH

OL

Input

Output

Control

(low-level

enabling)

Output

Waveform 1

S1 at 2 × V

(see Note B)

Output

Waveform 2

S1 at GND

(see Note B)

VOLTAGE WAVEFORMS

PULSE DURATION

t

PZL

CC

t

PZH

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

VCC/2

VCC/2

t

w

V

0 V

V

0 V

V

V

V

0 V

CC

CC

CC

OL

OH

VCC/2VCC/2

VCC/2VCC/2

t

PLZ

VOL + 0.15 V

t

PHZ

VOH – 0.15 V

Figure 2. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

7

SN54LVC14A, SN74LVC14A
HEX SCHMITT-TRIGGER INVERTERS

SCAS285L – MARCH 1993 – REVISED JUL Y 1999

PARAMETER MEASUREMENT INFORMATION

V

CC

From Output

Under Test

CL = 50 pF

(see Note A)

500 Ω

500 Ω

S1

= 2.7 V AND 3.3 V ± 0.3 V

6 V

Open

GND

TEST S1

t

pd

t

PLZ/tPZL

t

PHZ/tPZH

Open

6 V

GND

Timing

Input

Data

Input

Input

Output

LOAD CIRCUIT

t

su

1.5 V

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

1.5 V 1.5 V

t

PLH

1.5 V 1.5 V

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

1.5 V

t

w

2.7 V

2.7 V

0 V

t

h

2.7 V

1.5 V
0 V

2.7 V

0 V

t

PHL

V

OH

V

OL

Input

Output

Control

(low-level

enabling)

Output

Waveform 1

S1 at 6 V

(see Note B)

Output

Waveform 2

S1 at GND

(see Note B)

1.5 V 1.5 V

VOLTAGE WAVEFORMS

PULSE DURATION

1.5 V 1.5 V

t

PZL

1.5 V

t

PZH

1.5 V

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

t

PLZ

VOL + 0.3 V

t

PHZ

VOH – 0.3 V

0 V

2.7 V

0 V

3 V

V

OL

V

OH

0 V

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤2.5 ns, tf ≤2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.

E. t
F. t

G. t

PLZ
PZL
PLH

and t
and t

and t

are the same as t

PHZ

are the same as ten.

PZH

are the same as tpd.

PHL

dis

Figure 3. Load Circuit and Voltage Waveforms

8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

.

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Copyright  1999, Texas Instruments Incorporated