Datasheet SN74LS541H, SN74LS541M, SN74LS541MEL, SN74LS541ML1, SN74LS541MR1 Datasheet (MOTOROLA)

5-1

FAST AND LS TTL DAT A

OCTAL BUFFER/LINE DRIVER
WITH 3-STATE OUTPUTS

The SN54/74LS540 and SN54/74LS541 are octal buffers and line drivers
with the same functions as the LS240 and LS241, but with pinouts on the
opposite side of the package.

These device types are designed to be used as memory address drivers,
clock drivers and bus-oriented transmitters /receivers. These devices are
especially useful as output ports for the microprocessors, allowing ease of
layout and greater PC board density.

• Hysteresis at Inputs to Improve Noise Margin

• PNP Inputs Reduce Loading

• 3-State Outputs Drive Bus Lines

• Inputs and Outputs Opposite Side of Package, Allowing Easier

Interface to Microprocessors

• Input Clamp Diodes Limit High-Speed Termination Effects

LOGIC AND CONNECTION DIAGRAMS DIP (TOP VIEW)

18 17 16 15 14 13

123456

7

20 19

8

V

CC

910

GND

12 11

SN54/74LS540

SN54/74LS541

18 17 16 15 14 13

123456

7

20 19

8

V

CC

910

GND

12 11

GUARANTEED OPERATING RANGES

Symbol Parameter Min Typ Max Unit

V

CC

Supply Voltage 54

74

4.5

4.75

5.0

5.0

5.5

5.25

V

T

A

Operating Ambient Temperature Range 54

74

–55

0

25
25

125

70

°C

I

OH

Output Current — High 54

74

–12
–15

mA

I

OL

Output Current — Low 54

74

12
24

mA

SN54/74LS540
SN54/74LS541

OCTAL BUFFER/LINE DRIVER

WITH 3-STATE OUTPUTS

LOW POWER SCHOTTKY

ORDERING INFORMATION

SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXDW SOIC

20

1

J SUFFIX

CERAMIC

CASE 732-03

20

1

N SUFFIX

PLASTIC

CASE 738-03

20

1

DW SUFFIX

SOIC

CASE 751D-03

BLOCK DIAGRAM

LS540 LS541

E

1

E

2

D

1

D

2

D

3

D

4

D

5

D

6

D

7

D

8

Y8

Y7

Y6

Y5

Y4

Y3

Y2

Y1

(1)

(19)

(2)

(3)

(4)

(5)
(6)
(7)

(8)

(9) (11)

(12)

(13)

(14)

(15)

(16)

(17)

(18)

E

1

E

2

D

1

D

2

D

3

D

4

D

5

D

6

D

7

D

8

Y8

Y7

Y6

Y5

Y4

Y3

Y2

Y1

(1)

(19)

(2)

(3)

(4)

(5)
(6)
(7)

(8)

(9) (11)

(12)

(13)

(14)

(15)

(16)

(17)

(18)

5-2

FAST AND LS TTL DATA

SN54/74LS540 • SN54/74LS541

INPUTS OUTPUTS

E1E2D LS540 LS541

L L H L H
H X X Z Z
X H X Z Z
L L L H L

L = LOW Voltage Level
H = HIGH Voltage Level
X = Immaterial
Z = High Impedance

DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)

Limits

Symbol Parameter

Min Typ Max

Unit Test Conditions

V

IH

Input HIGH Voltage 2.0 V

Guaranteed Input HIGH Voltage for
All Inputs

54 0.7

Guaranteed Input LOW Voltage for

VILI

nput

LOW Volt

age

74 0.8

V

pg

All Inputs

V

IK

Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA

54, 74 2.4 3.4 V VCC = MIN, IOH = –3.0 mA

VOHOutput HIGH Volt

age

54, 74 2.0 V VCC = MIN, IOH = MAX, VIL = 0.5 V
54, 74 0.25 0.4 V IOL = 12 mA

VCC = VCC MIN,

VOLOutput LOW Volt

age

74 0.35 0.5 V IOL = 24 mA

V

IN

=

V

IL

or

V

IH

per Truth Table

VT+–V

T–

Hysteresis 0.2 0.4 V VCC = MIN

I

OZH

Output Off Current HIGH 20 µA VCC = MAX, V

OUT

= 2.7 V

I

OZL

Output Off Current LOW –20 µA VCC = MAX, V

OUT

= 0.4 V

20 µA VCC = MAX, VIN = 2.7 V

IIHI

nput

HIGH C

urren

t

0.1 mA VCC = MAX, VIN = 7.0 V

I

IL

Input LOW Current –0.2 mA VCC = MAX, VIN = 0.4 V

I

OS

Short Circuit Current (Note 1) –40 –225 mA VCC = MAX
Power Supply Current

Total, Output HIGH

LS540 25

mA

LS541 32 mA

I

CC

LS540 45 mA

VCC = MAX

CC

T

otal, Output

LOW

LS541 52 mA

CC

-

LS540 52 mA

Total Output 3-Stat

e

LS541 55 mA

Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.

AC WAVEFORMS

1.5 V

1.5 V 1.5 V

1.3 V

1.3 V 1.3 V

1.3 V

V

IN

V

OUT

t

PLH

t

PHL

1.3 V

1.3 V

V

IN

V

OUT

SW2CL*

5 k

Ω

SW1

V

CC

R

L

TO OUTPUT

UNDER TEST

1.3 V

t

PLH

t

PHL

V

E

V

E

V

OUT

V

E

V

E

V

OUT

t

PHZ

1.5 V 1.5 V
t

PZL

t

PLZ

V

OL

1.5 V

≥

V

OH

0.5 V

t

PZH

1.3 V

Figure 1

Figure 2

Figure 3

Figure 4 Figure 5

≈

1.5 V

0.5 V

≈

1.5 V

SWITCH POSITIONS

5-3

FAST AND LS TTL DATA

SN54/74LS540 • SN54/74LS541

AC CHARACTERISTICS (T

A

= 25°C)

Limits

Symbol Parameter

Min Typ Max

Unit Test Conditions

t

PLH

LS540 9.0 15

t

PLH

Propagation Delay,

LS541 12 15

t

PHL

pg y,

Data to Output

LS540 12 15

ns

t

PHL

LS541 12 18

VCC = 5.0 V

Output Enable Time

LS540 15 25

C

L

= 45 p

F

RL = 667 Ω

t

PZH

p

to HIGH Level

LS541 15 32

ns

L

Output Enable Time

LS540 20 38

t

PZL

p

to LOW Level

LS541 20 38

ns

Output Disable Time

LS540 10 18

t

PHZ

p

to HIGH Level

LS541 10 18

ns

Output Disable Time

LS540 15 25

C

L

=

5.0 pF

t

PLZ

p

to LOW Level

LS541 15 29

ns

SYMBOL SW1 SW2

t

PZH

Open Closed

t

PZL

Closed Open

t

PLZ

Closed Closed

t

PHZ

Closed Closed