Datasheet SN74ls540 Datasheet

SN54/74LS540

OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

The SN54/74LS540 and SN54/74LS541 are octal buffers and line drivers with the same functions as the LS240 and LS241, but with pinouts on the opposite side of the package.

These device types are designed to be used as memory address drivers, clock drivers and bus-oriented transmitters /receivers. These devices are especially useful as output ports for the microprocessors, allowing ease of layout and greater PC board density .

• Hysteresis at Inputs to Improve Noise Margin

• PNP Inputs Reduce Loading

• 3-State Outputs Drive Bus Lines

• Inputs and Outputs Opposite Side of Package, Allowing Easier

Interface to Microprocessors

• Input Clamp Diodes Limit High-Speed Termination Effects

LOGIC AND CONNECTION DIAGRAMS DIP (TOP VIEW)

V

CC

20 19

SN54/74LS540

18 17 16 15 14 13

12 11

SN54/74LS541

OCTAL BUFFER/LINE DRIVER

WITH 3-STATE OUTPUTS

LOW POWER SCHOTTKY

J SUFFIX

CERAMIC

20

1

20

1

CASE 732-03

N SUFFIX

PLASTIC

CASE 738-03

123456

V

CC

20 19

SN54/74LS541

18 17 16 15 14 13

7

8

910

GND

12 11

20

1

DW SUFFIX

SOIC

CASE 751D-03

ORDERING INFORMATION

SN54LSXXXJ Ceramic SN74LSXXXN Plastic SN74LSXXXDW SOIC

123456

7

8

910

GND

GUARANTEED OPERATING RANGES

Symbol Parameter Min Typ Max Unit

V

T

I

CC

A

OH

OL

Supply Voltage 54

74

Operating Ambient Temperature Range 54

74

Output Current — High 54

74

Output Current — Low 54

74

4.5

4.75 –55

0

5.0

5.0 25

25

5.5

5.25 125

70

–12 –15

12 24

V

°C

mA

FAST AND LS TTL DAT A

5-1

SN54/74LS540 • SN54/74LS541

VILI

LOW Volt

V

pg

VOHOutput HIGH Volt

VOLOutput LOW Volt

V

IIHI

HIGH C

t

CC

T

LOW

CC

Total Output 3-Stat

BLOCK DIAGRAM

(1)

E

1

(19)

E

2

(2)

D

1

(3)

D

2

(4)

D

3

(5)

D

4

(6)

D

5

(7)

D

6

(8)

D

7

(9) (11)

D

8

DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)

Symbol Parameter

V

IH

V

IK

VT+–V

T–

I

OZH

I

OZL

I

IL

I

OS

I

CC

Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.

LS540 LS541

(1)

E

1

(19)

E

2

(18)

Y1

(17)

Y2

(16)

Y3

(15)

Y4

(14)

Y5

(13)

Y6

(12)

Y7 Y8

Input HIGH Voltage 2.0 V

nput

Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA

Hysteresis 0.2 0.4 V VCC = MIN Output Off Current HIGH 20 µA VCC = MAX, V Output Off Current LOW –20 µA VCC = MAX, V

nput

Input LOW Current –0.2 mA VCC = MAX, VIN = 0.4 V Short Circuit Current (Note 1) –40 –225 mA VCC = MAX Power Supply Current

Total, Output HIGH

otal, Output

age

urren

-

age

54, 74 2.4 3.4 V VCC = MIN, IOH = –3.0 mA 54, 74 2.0 V VCC = MIN, IOH = MAX, VIL = 0.5 V

54, 74 0.25 0.4 V IOL = 12 mA

LS540 25 LS541 32 mA LS540 45 mA LS541 52 mA

e

LS540 52 mA LS541 55 mA

(2)

D

1

(3)

D

2

(4)

D

3

(5)

D

4

(6)

D

5

(7)

D

6

(8)

D

7

(9) (11)

D

8

Limits

Min Typ Max

54 0.7 74 0.8

74 0.35 0.5 V IOL = 24 mA

(18)

Y1

(17)

Y2

(16)

Y3

(15)

Y4

(14)

Y5

(13)

Y6

(12)

Y7 Y8

Unit Test Conditions

20 µA VCC = MAX, VIN = 2.7 V

0.1 mA VCC = MAX, VIN = 7.0 V

mA

INPUTS OUTPUTS

E1E2D LS540 LS541

L L H L H H X X Z Z X H X Z Z L L L H L

L = LOW Voltage Level H = HIGH Voltage Level X = Immaterial Z = High Impedance

Guaranteed Input HIGH Voltage for All Inputs

Guaranteed Input LOW Voltage for All Inputs

VCC = MAX

VCC = VCC MIN,

=

IN

per Truth Table

= 2.7 V

OUT

= 0.4 V

OUT

or

IL

IH

FAST AND LS TTL DATA

5-2

SN54/74LS540 • SN54/74LS541

pg y,

C

F

t

p

L

t

p

t

p

C

5.0 pF

t

p

AC CHARACTERISTICS (T

Symbol Parameter

t

PLH

t

PLH

t

PHL

t

PHL

PZH

PZL

PHZ

PLZ

Propagation Delay, Data to Output

Output Enable Time to HIGH Level

Output Enable Time to LOW Level

Output Disable Time to HIGH Level

Output Disable Time to LOW Level

V

1.3 V 1.3 V

IN

OUT

1.3 V

V

OUT

V

= 25°C)

A

t

PLH

Figure 1

t

PLH

1.3 V

Figure 2

Limits

Min Typ Max

LS540 9.0 15 LS541 12 15 LS540 12 15 LS541 12 18 LS540 15 25 LS541 15 32 LS540 20 38 LS541 20 38 LS540 10 18 LS541 10 18 LS540 15 25 LS541 15 29

AC WAVEFORMS

t

PHL

1.3 V

1.3 V t

PHL

1.3 V

Unit Test Conditions

ns

VCC = 5.0 V

= 45 p

L

SW1

RL = 667 Ω

=

L

V

CC

R

L

5 k

ns

TO OUTPUT

UNDER TEST

Ω

SW2CL*

V V

E E

V

E E

OUT

V

1.5 V 1.5 V t

PZL

1.5 V

Figure 3

1.5 V 1.5 V

t

PZH

OUT

1.5 V

0.5 V

t

PLZ

t

0.5 V

≈

V

PHZ

≥

≈

1.5 V

OL

V

OH

1.5 V

SWITCH POSITIONS

SYMBOL SW1 SW2

t

PZH

t

PZL

t

PLZ

t

PHZ

Open Closed Closed Open Closed Closed Closed Closed

Figure 4 Figure 5

FAST AND LS TTL DATA

5-3