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DM74LS393 Dual 4-Bit Binary Counter
DM74LS393 Dual 4-Bit Binary Counter
June 1989
General Description
Each of these monolithic circuits contains eight masterslave flip-flops and additional gating to implement two individual four-bit counters in a single package. The ’LS393
comprises two independent four-bit binary counters each
having a clear and a clock input. N-bit binary counters can
be implemented with each package providing the capability
of divide-by-256. The LS393 has parallel outputs from each
counter stage so that any submultiple of the input count
freqency is available for system-timing signals.
Features
Y
Dual version of the popular ’LS93
Y
’LS393 dual 4-bit binary counter with individual clocks
Y
Direct clear for each 4-bit counter
Y
Dual 4-bit versions can significantly improve system
densities by reducing counter package count by 50%
Y
Typical maximum count frequency 35 MHz
Y
Buffered outputs reduce possibility of collector commutation
Connection Diagram Function Table
Dual-In-Line Package
Order Number DM74LS393M or DM74LS393N
See NS Package Number M14A or N14A
TL/F/6434– 1
Count
HeHigh Logic Level
LeLow Logic Level
Count Sequence
(Each Counter)
Q
D
0LLLL
1LLLH
2LLHL
3LLHH
4LHLL
5LHLH
6LHHL
7LHHH
8HLLL
9HLLH
10 H L H L
11 H L H H
12 H H L L
13 H H L H
14 H H H L
15 H H H H
Outputs
Q
C
Q
Q
B
A
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
TL/F/6434
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Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage 7V
Input Voltage
Clear 7V
A 5.5V
Operating Free Air Temperature Range
DM74LS 0
Storage Temperature Range
Ctoa70§C
§
b
65§Ctoa150§C
The ‘‘Absolute Maximum Ratings’’ are those values
Note:
beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
Recommended Operating Conditions
v
DM74LS393
b
0.4 mA
Units
ns
ns
§
Symbol Parameter
V
V
V
I
OH
I
OL
f
f
t
t
T
CC
IH
IL
CLK
CLK
W
REL
A
Supply Voltage 4.75 5 5.25 V
High Level Input Voltage 2 V
Low Level Input Voltage 0.8 V
High Level Output Current
Low Level Output Current 8 mA
Clock Frequency (Note 1) 0 25 MHz
Clock Frequency (Note 2) 0 20 MHz
Pulse Width (Note 7) A 20
Clear Release Time (Notes3&7) 25
Free Air Operating Temperature 0 70
Min Nom Max
Clear High 20
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min
e
V
I
V
OH
V
OL
I
I
I
IH
I
IL
I
OS
I
CC
Note 1: C
Note 2: C
Note 3: The symbol (
Note 4: All typicals are at V
Note 5: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 6: I
Note 7: T
Input Clamp Voltage V
High Level Output V
Voltage V
Low Level Output V
Voltage V
Input Current@Max V
Input Voltage
High Level Input V
Current
Low Level Input V
Current
Short Circuit V
Output Current (Note 5)
Supply Current V
e
L
e
L
is measured with all outputs open, both CLEAR inputs grounded following momentary connection to 4.5V, and all other inputs grounded.
CC
e
A
e
15 pF, R
L
e
50 pF, R
L
) indicates that the falling edge of the clear pulse is used for reference.
v
25§C, and V
2kX,T
2kX,T
CC
e
CC
e
25§C and V
A
e
25§C and V
A
e
e
5V, T
A
5V.
25§C.
CC
CC
e
IL
CC
e
IL
e
I
OL
CC
V
CC
CC
CC
CC
CC
e
5V.
CC
e
5V.
CC
eb
Min, I
e
Min, I
Max, V
e
Min, I
Max, V
4 mA, V
e
Max, V
e
Max, V
e
Max, V
18 mA
I
e
Max
OH
e
Min
IH
e
Max
OL
e
Min V
IH
e
Min 0.25 0.4
CC
e
7V Clear 0.1
I
e
5.5V A 0.2
I
e
2.7V Clear 20
I
2.7 3.4 V
A40
e
Max, V
e
0.4V Clear
I
A
e
Max
e
Max (Note 6) 15 26 mA
b
20
Typ
(Note 4)
0.35 0.5
Max Units
b
1.5 V
b
0.4
b
1.6
b
100 mA
C
mA
mA
mA
2
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Switching Characteristics at V
Symbol Parameter
f
t
t
t
t
t
MAX
PLH
PHL
PLH
PHL
PHL
Maximum Clock A to
Frequency Q
Propagation Delay Time A to
Low to High Level Output Q
Propagation Delay Time A to
High to Low Level Output Q
Propagation Delay Time A to
Low to High Level Output Q
Propagation Delay Time A to
High to Low Level Output Q
Propagation Delay Time Clear to
High to Low Level Output Any Q
Logic Diagram
e
5V and T
CC
From (Input)
To (Output)
A
A
A
D
D
e
25§C (See Section 1 for Test Waveforms and Output Load)
A
e
R
2kX
L
e
C
15 pF C
L
e
50 pF Units
L
Min Max Min Max
25 20 MHz
20 24 ns
20 30 ns
60 87 ns
60 87 ns
39 45 ns
’LS393
TL/F/6434– 2
3
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4
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Physical Dimensions inches (millimeters)
14-Lead Small Outline Molded Package (M)
Order Number DM74LS393M
NS Package Number M14A
5
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Physical Dimensions inches (millimeters) (Continued)
DM74LS393 Dual 4-Bit Binary Counter
14-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS393N
NS Package Number N14A
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