
4-BIT BINARY FULL ADDER
WITH FAST CARRY
The SN54/74LS283 is a high-speed 4-Bit Binary Full Adder with internal
carry lookahead. It accepts two 4-bit binary words (A1–A4, B1–B4) and a
Carry Input (C0). It generates the binary Sum outputs (∑1–∑4) and the Carry
Output (C4) from the most significant bit. The LS283 operates with either active HIGH or active LOW operands (positive or negative logic).
CONNECTION DIAGRAM DIP (TOP VIEW)
B3A
V
CC
16 15
123456
Σ
B2A
2
Σ3A
3
14 13 12 11 10 9
2
4
Σ1A1B1C0GND
Σ
B
4
4
7
C
4
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
8
SN54/74LS283
4-BIT BINARY FULL ADDER
WITH FAST CARRY
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
16
1
16
1
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
PIN NAMES
A1–A
B1–B
C
0
∑1–∑
C
4
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial
(74) T emperature Ranges.
Operand A Inputs 1.0 U.L. 0.5 U.L.
4
Operand B Inputs 1.0 U.L. 0.5 U.L.
4
Carry Input 0.5 U.L. 0.25 U.L.
Sum Outputs (Note b) 10 U.L. 5 (2.5) U.L.
4
Carry Output (Note b) 10 U.L. 5 (2.5) U.L.
LOADING (Note a)
HIGH
LOW
D SUFFIX
16
1
SOIC
CASE 751B-03
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXD SOIC
LOGIC SYMBOL
5 3 14 12 6 2 15 11
A1A2A3A4B1B2B3B
C
0
∑1∑2∑3∑
4 1 13 10
VCC = PIN 16
GND = PIN 8
4
C
4
4
97
FAST AND LS TTL DAT A
5-1

LOGIC DIAGRAM
SN54/74LS283
C0A
B
1
1
5
A
B
2
2
267
3
C
1
A
B
3
3
14
C
2
15
A
B
4
4
12
11
C
3
VCC = PIN 16
4
∑
1
1
∑
2
13
∑
3
10
∑
4
GND = PIN 8
= PIN NUMBERS
FUNCTIONAL DESCRIPTION
The LS283 adds two 4-bit binary words (A plus B) plus the
incoming carry. The binary sum appears on the sum outputs
(∑1–∑4) and outgoing carry (C4) outputs.
C0 + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) = ∑1 + 2 ∑
+ 4 ∑3 + 8 ∑4 + 16C
4
Where: (+) = plus
2
Due to the symmetry of the binary add function the LS283
can be used with either all inputs and outputs active HIGH
(positive logic) or with all inputs and outputs active LOW
(negative logic). Note that with active HIGH inputs, Carry Input
can not be left open, but must be held LOW when no carry in is
intended.
Example:
C0A1A2A3A4B1B2B3B4∑1∑2∑3∑4C
logic levels L L H L H H L L H H H L L H
Active HIGH 0 0 1 0 1 1 0 0 1 1 1 0 0 1 (10+9=19)
Active LOW 1 1 0 1 0 0 1 1 0 0 0 1 1 0 (carry+5+6=12)
Interchanging inputs of equal weight does not affect the operation, thus C0, A1, B1, can be arbitrarily assigned to pins 7, 5 or 3.
9
C
4
4
FAST AND LS TTL DATA
5-2

SN54/74LS283
FUNCTIONAL TRUTH TABLE
C (n–1) A
L L L L L
L L H H L
L H L H L
L H H L H
H L L H L
H L H L H
H H L L H
H H H H H
C1–C3 are generated internally
C0 is an external input
C4 is an output generated internally
n
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
V
T
I
OH
I
OL
CC
A
Supply Voltage 54
Operating Ambient Temperature Range 54
Output Current — High 54, 74 –0.4 mA
Output Current — Low 54
B
n
74
74
74
∑
n
4.5
4.75
–55
0
C
n
5.0
5.0
25
25
5.5
5.25
125
70
4.0
8.0
V
°C
mA
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol Parameter
V
IH
V
IK
I
OS
I
CC
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
Input HIGH Voltage 2.0 V
nput
Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA
nput
nput
Short Circuit Current (Note 1) –20 –100 mA VCC = MAX
Power Supply Current
Total, Output HIGH
Total, Output LOW 39
age
age
age
urren
urren
54
74
54 2.5 3.5 V
74 2.7 3.5 V
54, 74 0.25 0.4 V IOL = 4.0 mA
74 0.35 0.5 V IOL = 8.0 mA
C
0
Any A or B 40 µA
C
0
Any A or B 0.2 mA
C
0
Any A or B –0.8 mA
Min Typ Max
0.7
0.8
20 µA
0.1 mA
–0.4 mA
34
Unit Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
Guaranteed Input LOW Voltage for
All Inputs
VCC = MIN, IOH = MAX, VIN = V
or VIL per Truth Table
=
CC
=
CC
=
CC
mA VCC = MAX
VCC = VCC MIN,
=
IN
per Truth Table
= 2.7
IN
= 7.0
IN
= 0.4
IN
IH
or
IL
IH
FAST AND LS TTL DATA
5-3

SN54/74LS283
AC CHARACTERISTICS (T
Symbol Parameter
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Propagation Delay, C0 Input
to Any Σ Output
Propagation Delay, Any A or B Input
to Σ Outputs
Propagation Delay, C0 Input
to C4 Output
Propagation Delay, Any A or B Input
to C4 Output
V
IN
V
OUT
A
1.3 V
= 25°C, VCC = 5.0 V)
Limits
Min Typ Max
16
15
15
15
11
11
11
12
Unit Test Conditions
24
24
24
24
17
22
17
17
ns
ns
ns
ns
AC WAVEFORMS
1.3 V
t
PLH
1.3 V
t
PHL
1.3 V
t
PLH
V
V
IN
OUT
Figure 1 Figure 2
CL = 15 pF
Figures 1 & 2
t
PHL
FAST AND LS TTL DATA
5-4