Datasheet SN74ls251 Datasheet

8-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS

The TTL/MSI SN74LS251 is a high speed 8-Input Digital Multiplexer. It
provides, in one package, the ability to select one bit of data from up to eight
sources. The LS251 can be used as a universal function generator to
generate any logic function of four variables. Both assertion and negation
outputs are provided.

• Schottky Process for High Speed

• Multifunction Capability

• On-Chip Select Logic Decoding

• Inverting and Non-Inverting 3-State Outputs

• Input Clamp Diodes Limit High Speed Termination Effects

CONNECTION DIAGRAM DIP (TOP VIEW)

V

I4I5I

CC

16 15

123456

I

I2I

3

PIN NAMES LOADING (Note a)

S0–S

2

E

0

I0–I

7

Z Multiplexer Output 65 U.L. 15 U.L.
Z Complementary Multiplexer Output 65 U.L. 15 U.L.

NOTES:
a. 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.

Select Inputs 0.5 U.L. 0.25 U.L.
Output Enable (Active LOW) Inputs 0.5 U.L. 0.25 U.L.
Multiplexer Inputs 0.5 U.L. 0.25 U.L.

6I7

14 13 12 11 10 9

1I0

ZZ

S

S

0

S

1

2

8

7

E

GND

0

HIGH LOW

SN54/74LS251

8-INPUT MULTIPLEXER

WITH 3-STATE OUTPUTS

LOW POWER SCHOTTKY

J SUFFIX

CERAMIC

16

1

16

1

16

1

ORDERING INFORMATION

SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXDW SOIC

CASE 620-09

N SUFFIX

PLASTIC

CASE 648-08

D SUFFIX

SOIC

CASE 751B-03

LOGIC DIAGRAM

S

2

10

S

1

11

S

0

E

1

VCC = PIN 16
GND = PIN 8

= PIN NUMBERS

I

9

7

I

0

1

34

I

I

2

3

I

4

6

5

ZZ

I

I

5

1412

6

I

1315

7

12

FAST AND LS TTL DATA

5-1

SN54/74LS251

FUNCTIONAL DESCRIPTION

The LS251 is a logical implementation of a single pole,

8-position switch with the switch position controlled by the
state of three Select inputs, S0, S1, S2. Both assertion and
negation outputs are provided. The Output Enable input (EO)
is active LOW. When it is activated, the logic function provided
at the output is:

⋅ (I0 ⋅ S0 ⋅ S1 ⋅ S2+ I1 ⋅ S0 ⋅ S1 ⋅ S2 + I2 ⋅ S0 ⋅ S1 ⋅

Z = E

O

Z = E

⋅ S2 + I3 ⋅ S0 ⋅ S1⋅ S2 + I4 ⋅ S0 ⋅ S1 ⋅ S2 + I5 ⋅ S0 ⋅

O

Z = E

⋅ S1 ⋅ S2 + I6 ⋅ S0 ⋅ S1 ⋅ S2 + I7 ⋅ S0 ⋅ S1 ⋅ S2).

O

TRUTH TABLE

E

S2S1S0I0I

0

H X X X X X X X X X X X (Z) (Z)
L L LLLXXXXXX XHL
L LLLHXXXXXX XLH
L LLHXLXXXXX XHL
L LLHXHXXXXX XLH
L LHLXXLXXXX XHL
L LHLXXHXXXX XLH
L LHHXXXLXXX XHL
L LHHXXXHXXX XLH
L HLLXXXXLXX XHL
L HLLXXXXHXX XLH
L HLHXXXXXLX XHL
L HLHXXXXXHX XLH
L HHLXXXXXXL XHL
L HHLXXXXXXH XLH
L HHHXXXXXXX LHL
L HHHXXXXXXX HLH

H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
(Z) = High impedance (Off)

1I2I3I4I5I6

When the Output Enable is HIGH, both outputs are in the
high impedance (high Z) state. This feature allows multiplexer
expansion by tying the outputs of up to 128 devices together.
When the outputs of the 3-state devices are tied together, all
but one device must be in the high impedance state to avoid
high currents that would exceed the maximum ratings. The
Output Enable signals should be designed to ensure there is
no overlap in the active LOW portion of the enable voltage.

I

Z Z

7

GUARANTEED OPERATING RANGES

Symbol Parameter Min Typ Max Unit

V
T
I
I

CC

A
OH
OL

Supply Voltage 4.75 5.0 5.25 V
Operating Ambient Temperature Range 0 25 70 °C
Output Current — High –2.6 mA
Output Current — Low 24 mA

FAST AND LS TTL DATA

5-2

SN54/74LS251

VOLOutput LOW Volt

V

V

V

IIHI

HIGH C

t

ICCP

t

L

p,

L

p,

DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)

Limits

Symbol Parameter

V

IH

V

IL

V

IK

V

OH

I

OZH

I

OZL

I

IL

I

OS

Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.

Input HIGH Voltage 2.0 V

Input LOW Voltage

Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA

Output HIGH Voltage 2.4 3.1 V

age

Output Off Current HIGH 20 µA VCC = MAX, V
Output Off Current LOW –20 µA VCC = MAX, V

nput

Input LOW Current –0.4 mA VCC = MAX, VIN = 0.4 V
Short Circuit Current (Note 1) –30 –130 mA VCC = MAX

ower Supply Curren

urren

Min Typ Max

0.8

0.25 0.4 V IOL = 12 mA

0.35 0.5 V IOL = 24 mA

20 µA VCC = MAX, VIN = 2.7 V

0.1 mA VCC = MAX, VIN = 7.0 V

10 mA VCC = MAX, VE = 0 V
12 mA VCC = MAX, VE = 4.5 V

Unit Test Conditions

Guaranteed Input HIGH Voltage for
All Inputs

Guaranteed Input LOW Voltage for

V

All Inputs

VCC = MIN, IOH = MAX, VIN = V
or VIL per Truth Table

VCC = VCC MIN,

=

IN

per Truth Table

= 2.7 V

OUT

= 0.4 V

OUT

IH

or

IL

IH

AC CHARACTERISTICS (T

Symbol Parameter

t

PLH

t

PHL

t

PLH

t

PHL

t

PLH

t

PHL

t

PLH

t

PHL

t

PZH

t

PZL

t

PZH

t

PZL

t

PHZ

t

PLZ

t

PHZ

t

PLZ

Propagation Delay,
Select to Z Output

Propagation Delay,
Select to Z Output

Propagation Delay,
Data to Z Output

Propagation Delay,
Data to Z Output

Output Enable Time
to Z Output

Output Enable Time
to Z Output

Output Disable Time
to Z Output

Output Disable Time
to Z Output

A

= 25°C, VCC = 5.0 V)

Limits

Min Typ Max

20
21

29
28

10

9.0
17

18
17

24
30

26
37

15
30

15

33
33

45
45

15
15

28
28

27
40

45
40

55
25

45
25

Unit Test Conditions

ns Figure 1

ns Figure 2

ns Figure 1

ns Figures 2

ns Figures 4, 5

ns Figures 3, 5

ns Figures 3, 5

ns Figures 4, 5

CL = 15 pF,
RL = 2.0 kΩ

CL = 5.0 pF,

RL = 667 kΩ

FAST AND LS TTL DATA

5-3

SN54/74LS251

3-STATE AC WAVEFORMS

V

1.3 V 1.3 V

IN

t

PLH

V

OUT

1.3 V

Figure 1 Figure 2

V

E

V

OUT

t

PZL

1.3 V 1.3 V

Figure 3 Figure 4

1.3 V

0.5 V

t

1.3 V

PHL

t

PLZ

≈

1.3 V

V

OL

0.5 V

AC LOAD CIRCUIT

V

V

V

t

PZH
V

1.3 V

IN

t

PHL

OUT

E

OUT

1.3 V

1.3 V 1.3 V

1.3 V

t

PHZ

1.3 V
t

PLH

1.3 V

≥

0.5 V

V

OH

≈

1.3 V

TO OUTPUT

UNDER TEST

V

CC

R

L

SW1

Ω

5 k

SW2CL*

* Includes Jig and Probe Capacitance.

Figure 5

SWITCH POSITIONS

SYMBOL SW1 SW2

t

PZH

t

PZL

t

PLZ

t

PHZ

Open Closed
Closed Open
Closed Closed
Closed Closed

FAST AND LS TTL DATA

5-4