Datasheet SN74LS240DW, SN74LS240ML2, SN74LS240MR1, SN74LS240MR2, SN74LS240N Datasheet (MOTOROLA)

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Semiconductor Components Industries, LLC, 1999
December, 1999 – Rev. 6
1 Publication Order Number:
SN74LS240/D
SN74LS240 SN74LS244
Octal Buf fer/Line Driver with 3-State Outputs
The SN74LS240 and SN74LS244 are Octal Buffers and Line Drivers designed to be employed as memory address drivers, clock drivers and bus-oriented transmitters/receivers which provide improved PC board density.
Hysteresis at Inputs to Improve Noise Margins
3-State Outputs Drive Bus Lines or Buffer Memory Address
Registers
Input Clamp Diodes Limit High-Speed Termination Effects
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
V
CC
Supply Voltage 4.75 5.0 5.25 V
T
A
Operating Ambient
T emperature Range
0 25 70 °C
I
OH
Output Current – High
–3.0 mA
–15 mA
I
OL
Output Current – Low 24 mA
LOW
POWER
SCHOTTKY
Device Package Shipping
ORDERING INFORMATION
SN74LS240N 16 Pin DIP 1440 Units/Box SN74LS240DW 16 Pin
SOIC DW SUFFIX CASE 751D
http://onsemi.com
2500/Tape & Reel
PLASTIC N SUFFIX CASE 738
20
1
20
1
SN74LS244N 16 Pin DIP 1440 Units/Box SN74LS244DW 16 Pin
2500/Tape & Reel
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SN74LS240 SN74LS244
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2
LOGIC AND CONNECTION DIAGRAMS DIP (TOP VIEW)
18 17 16 15 14 13
123456
7
20 19
8
V
CC
1G
2G 1Y1 2A4 1Y2 1Y32A3 2A2
1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4
910
2Y1 GND
12 11
1Y4 2A1
18 17 16 15 14 13
123456
7
20 19
8
V
CC
1G
2G 1Y1 2A4 1Y2 1Y32A3 2A2
1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4
910
2Y1 GND
12 11
1Y4 2A1
SN74LS240
SN74LS244
TRUTH TABLES
SN74LS240
INPUTS
1G, 2G D
OUTPUT
L L H
L H X
H L
(Z)
SN74LS244
INPUTS
1G, 2G D
OUTPUT
L L H
L H X
L H
(Z)
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = HIGH Impedance
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SN74LS240 SN74LS244
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3
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol Parameter
Min Typ Max
Unit Test Conditions
V
IH
Input HIGH Voltage 2.0 V
Guaranteed Input HIGH Voltage for All Inputs
V
IL
Input LOW Voltage
0.8 V
Guaranteed Input LOW Voltage for All Inputs
VT+–V
T–
Hysteresis 0.2 0.4 V VCC = MIN
V
IK
Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA
p
2.4 3.4 V VCC = MIN, IOH = –3.0 mA
VOHOutput HIGH Voltage
2.0 V VCC = MIN, IOH = MAX
p
0.25 0.4 V IOL = 12 mA
VCC = VCC MIN,
VOLOutput LOW Voltage
0.35 0.5 V IOL = 24 mA
V
IN
=
V
IL
or
V
IH
per Truth Table
I
OZH
Output Off Current HIGH 20 µA VCC = MAX, V
OUT
= 2.7 V
I
OZL
Output Off Current LOW –20 µA VCC = MAX, V
OUT
= 0.4 V
p
20 µA VCC = MAX, VIN = 2.7 V
IIHInput HIGH Current
0.1 mA VCC = MAX, VIN = 7.0 V
I
IL
Input LOW Current –0.2 mA VCC = MAX, VIN = 0.4 V
I
OS
Output Short Circuit Current (Note 1) –40 –225 mA VCC = MAX Power Supply Current
Total, Output HIGH
27
Total, Output LOW LS240 44
I
CC
LS244 46
mA VCC = MAX
Total at HIGH Z LS240 50
LS244 54
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (T
A
= 25°C, VCC = 5.0 V)
Limits
Symbol Parameter
Min Typ Max
Unit Test Conditions
t
PLH
t
PHL
Propagation Delay , Data to Output LS240
9.0 12
14 18
ns
t
PLH
t
PHL
Propagation Delay , Data to Output LS244
12 12
18 18
ns
CL = 45 pF, R
L
= 667
t
PZH
Output Enable Time to HIGH Level 15 23 ns
t
PZL
Output Enable Time to LOW Level 20 30 ns
t
PLZ
Output Disable Time from LOW Level 15 25 ns
CL = 5.0 pF,
t
PHZ
Output Disable Time from HIGH Level 10 18 ns
L
RL = 667
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SN74LS240 SN74LS244
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AC WAVEFORMS
1.3 V
1.3 V 1.3 V
1.3 V
1.3 V 1.3 V
1.3 V
V
IN
V
OUT
t
PLH
t
PHL
1.3 V
1.3 V
V
IN
V
OUT
SW2CL*
5 k
SW1
V
CC
R
L
TO OUTPUT
UNDER TEST
1.3 V
t
PHL
t
PLH
V
E
V
E
V
OUT
V
E
V
E
V
OUT
t
PHZ
1.3 V 1.3 V t
PZL
t
PLZ
V
OL
1.3 V
V
OH
0.5 V
t
PZH
1.3 V
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
1.3 V
0.5 V
1.3 V
SWITCH POSITIONS
Closed
Open Closed Closed
Open Closed Closed Closed
t
PZH
t
PZL
t
PLZ
t
PHZ
SW2SW1SYMBOL
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SN74LS240 SN74LS244
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P ACKAGE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
M
L
J
20 PL
M
B
M
0.25 (0.010) T
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 25.66 27.171.010 1.070 B 6.10 6.600.240 0.260 C 3.81 4.570.150 0.180 D 0.39 0.550.015 0.022
G 2.54 BSC0.100 BSC
J 0.21 0.380.008 0.015
K 2.80 3.550.110 0.140
L 7.62 BSC0.300 BSC M 0 15 0 15 N 0.51 1.010.020 0.040
____
E
1.27 1.770.050 0.070
1
11
10
20
–A–
SEATING PLANE
K
N
FG
D
20 PL
–T–
M
A
M
0.25 (0.010) T
E
B
C
F
1.27 BSC0.050 BSC
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SN74LS240 SN74LS244
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6
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–05
ISSUE F
20
1
11
10
B20X
H10X
C
L
18X
A1
A
SEATING PLANE
q
h X 45
_
E
D
M
0.25
M
B
M
0.25
SAS
B
T
e
T
B
A
DIM MIN MAX
MILLIMETERS
A 2.35 2.65
A1 0.10 0.25
B 0.35 0.49 C 0.23 0.32 D 12.65 12.95 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 L 0.50 0.90
q
0 7
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION.
__
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SN74LS240 SN74LS244
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Notes
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SN74LS240 SN74LS244
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