
4 x 4 REGISTER FILE
OPEN-COLLECTOR
The TTL/MSI SN54/74LS170 is a high-speed, low-power 4 x 4 Register
File organized as four words by four bits. Separate read and write inputs, both
address and enable, allow simultaneous read and write operation.
Open-collector outputs make it possible to connect up to 128 outputs in a
wired-AND configuration to increase the word capacity up to 512 words. Any
number of these devices can be operated in parallel to generate an n-bit
length.
The SN54/74LS670 provides a similar function to this device but it features
3-state outputs.
• Simultaneous Read/Write Operation
• Expandable to 512 Words of n-Bits
• Typical Access Time of 20 ns
• Low Leakage Open-Collector Outputs for Expansion
• Typical Power Dissipation of 125 mW
CONNECTION DIAGRAM DIP (TOP VIEW)
Q
V
D1WAWBE
CC
16 15
E
W
R
14 13 12 11 10 9
Q
1
2
SN54/74LS170
4 x 4 REGISTER FILE
OPEN-COLLECTOR
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
16
1
16
1
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
123456
D3D4RBRAQ4Q3GND
D
2
PIN NAMES LOADING (Note a)
D1–D
WA, W
E
W
RA, R
E
R
Q1–Q
NOTES:
a. 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.
b. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
b. T emperature Ranges. The Output HIGH drive must be supplied by an external resistor to VCC.
Data Inputs
4
Write Address Inputs
B
Write Enable (Active LOW) Input
Read Address Inputs
B
Read Enable (Active LOW) Input
Outputs (Note b)
4
7
8
HIGH
0.5 U.L.
0.5 U.L.
1.0 U.L.
0.5 U.L.
1.0 U.L.
Open-Collector
LOW
0.25 U.L.
0.25 U.L.
0.5 U.L.
0.25 U.L.
0.5 U.L.
5 (2.5) U.L.
D SUFFIX
16
1
SOIC
CASE 751B-03
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXD SOIC
LOGIC SYMBOL
12 15 1 2 3
W
14
13
5
4
E
A
W
W
B
R
A
E
R
R
B
11 10 9 7 6
VCC = PIN 16
GND = PIN 8
D
1
Q1Q
D2D
2
3
3
D
4
Q4Q
FAST AND LS TTL DAT A
5-1

SN54/74LS170
WRITE FUNCTION TABLE (SEE NOTES A, B, AND C) READ FUNCTION TABLE (SEE NOTES A AND D)
WRITE INPUTS WORD READ INPUTS OUTPUTS
W
NOTES: A. H = HIGH Level. L = LOW Level, X = Irrelevant.
NOTES: B. (Q = D) = The four selected internal flip-flop outputs will assume the states applied to the four external data inputs.
NOTES: C. Q0 = the level of Q before the indicated input conditions were established.
NOTES: D. W
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
V
CC
T
A
V
OH
I
OL
W
B
L L L Q=D Q
L HLQ
H LLQ
H HLQ
X XHQ
0B1
Supply Voltage 54
Operating Ambient Temperature Range 54
Output Voltage — High 54, 74 5.5 V
Output Current — Low 54
E
A
W
= The first bit of word 0, etc.
0 1 2 3 R
0
0
0
0
Q
0
Q=D Q
Q
Q=D Q
0
Q
Q
0
0
Q
Q
R
B
Q
0
0
0
0
0
Q
0
0
Q=D H H L W3B1 W3B2 W3B3 W3B4
Q
0
L L L W0B1 W0B2 W0B3 W0B4
L H L W1B1 W1B2 W1B3 W1B4
H L L W2B1 W2B2 W2B3 W2B4
XXH H HHH
74
74
74
E
A
4.5
4.75
–55
0
Q
R
5.0
5.0
25
25
Q
1
2
5.5
5.25
125
70
4.0
8.0
Q
3
V
°C
mA
Q
4
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol Parameter
V
V
I
I
I
I
IH
IK
OH
IH
IL
CC
Input HIGH Voltage 2.0 V
nput
Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA
Output HIGH Current 54, 74 100 µA VCC = MIN, VOH = MAX
Input HIGH Current
Any D, R, W
E
, E
R
Any D, R, W
ER, E
Input LOW Current
Any D, R, W
E
, E
R
Power Supply Current 40 mA VCC = MAX
age
age
W
W
W
54 0.7
74 0.8
54, 74 0.25 0.4 V IOL = 4.0 mA
74 0.35 0.5 V IOL = 8.0 mA
Min Typ Max
20
40
0.1
0.2
–0.4
–0.8
Unit Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
Guaranteed Input LOW Voltage for
All Inputs
µA VCC = MAX, VIN = 2.4 V
mA VCC = MAX, VIN = 7.0 V
mA VCC = MAX, VIN = 0.4 V
VCC = VCC MIN,
=
or
IN
IL
per Truth Table
IH
FAST AND LS TTL DATA
5-3

SN54/74LS170
AC CHARACTERISTICS (T
Symbol Parameter
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Propagation Delay, NegativeGoing E
Propagation Delay, RA or R
to Q Outputs
Propagation Delay, NegativeGoing E
Propagation Delay , Data Inputs
to Q Outputs
= 25°C)
A
to Q Outputs
R
to Q Outputs
W
AC SETUP REQUIREMENTS (T
Symbol Parameter
t
W
t
s
t
s
t
h
t
h
t
LATCH
Pulse Width, ER, E
Setup Time, Data to E
Setup Time, WA, WB to E
Hold Time, Data to E
Hold Time, WA, WB to E
Latch Time 25 ns
= 25°C)
A
W
W
W
Limits
Min Typ Max
20
20
B
Min Typ Max
25 ns
10 ns
W
W
15 ns
15 ns
5.0 ns
25
24
30
26
30
22
Limits
Unit Test Conditions
30
30
40
40
45
40
45
35
ns Figure 1
ns Figure 2
ns Figure 1
ns Figure 1
Unit Test Conditions
VCC = 5.0 V
VCC = 5.0 V
RL = 2.0 kΩ
= 15 p
L
RL = 2.0 kΩ
WRITE-SELECT
INPUT WA or W
DATA INPUT
D1, D2, D3 or D4
WRITE-ENABLE
INPUT E
READ-SELECT
INPUT RA or R
READ-ENABLE
INPUT E
OUTPUT
Q1, Q2, Q3 or Q4
B
W
B
R
VOLTAGE WAVEFORMS
t
PLH
V
t
PLH
ref
3 V
0 V
3 V
0 V
3 V
0 V
3 V
0 V
3 V
0 V
V
OH
V
OL
V
ref
t
su(W)
t
w
V
ref
t
latch
V
ref
t
h(W)
V
ref
V
ref
t
PHL
t
su(D)
V
ref
V
t
ref
h(D)
V
ref
V
ref
t
W
V
ref
t
PHL
V
ref
DATA INPUT
D1, D2, D3 or D4
WRITE-ENABLE
INPUT E
W
OUTPUT
Q1, Q2, Q3 or Q4
DATA INPUT
D1, D2, D3 or D4
WRITE-ENABLE
INPUT E
W
OUTPUT
Q1, Q2, Q3 or Q4
V
ref
t
PLH
V
ref
V
ref
t
PHL
V
ref
Figure 1 Figure 2
3 V
0 V
3 V
V
ref
t
PHL
V
ref
V
ref
t
PLH
V
ref
0 V
V
V
3 V
0 V
3 V
0 V
3 V
0 V
OH
OL
FAST AND LS TTL DATA
5-4