Datasheet SN74ls157 Datasheet

Page 1
QUAD 2-INPUT MULTIPLEXER
The LSTTL/MSI SN54/74LS157 is a high speed Quad 2-Input Multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four buffered outputs present the selected data in the true (non-inverted) form. The LS157 can also be used to generate any four of the 16 different functions of two variables. The LS157 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families.
• Schottky Process for High Speed
• Multifunction Capability
• Non-Inverting Outputs
• Input Clamp Diodes Limit High Speed Termination Effects
• Special Circuitry Ensures Glitch Free Multiplexing
• ESD > 3500 Volts
SN54/74LS157
QUAD 2-INPUT MULTIPLEXER
LOW POWER SCHOTTKY
CONNECTION DIAGRAM DIP (TOP VIEW)
V
CC
16 15
123456
S
PIN NAMES LOADING (Note a)
S E I0a–I
0d
I1a–I
1d
Za–Z
d
NOTES: a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW. b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
T emperature Ranges.
I0cI
E
I
0aI1dZaI0bI1bZb
1cZc
14 13 12 11 10 9
Common Select Input Enable (Active LOW) Input Data Inputs from Source 0 Data Inputs from Source 1 Multiplexer Outputs (Note b)
I
I
0d
1d
7
Z
d
NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.
8
GND
HIGH
1.0 U.L.
1.0 U.L.
0.5 U.L.
0.5 U.L. 10 U.L.
LOW
0.5 U.L.
0.5 U.L.
0.25 U.L.
0.25 U.L.
5 (2.5) U.L.
LOGIC DIAGRAM
I
0aI1aI0bI1bI0cI1cI0dI1d
3
5
14 126
11
13 15
E S
10
CERAMIC
16
1
16
1
16
1
CASE 620-09
N SUFFIX
CASE 648-08
D SUFFIX
CASE 751B-03
ORDERING INFORMATION
SN54LSXXXJ Ceramic SN74LSXXXN Plastic SN74LSXXXD SOIC
LOGIC SYMBOL
15 2 3 5 6 14 13 11 10
J SUFFIX
PLASTIC
SOIC
4
Z
a
7
Z
b
EI0aI1aI0bI1bI0cI1cI0dI
1
S
ZaZbZcZ
4 7 12 9
VCC = PIN 16 GND = PIN 8
12
Z
c
9
Z
d
= PIN NUMBERS
VCC = PIN 16 GND = PIN 8
1d
d
FAST AND LS TTL DAT A
5-1
Page 2
SN54/74LS157
FUNCTIONAL DESCRIPTION
The LS157 is a Quad 2-Input Multiplexer fabricated with the Schottky barrier diode process for high speed. It selects four bits of data from two sources under the control of a common Select Input (S). The Enable Input (E is HIGH, all of the outputs (Z) are forced LOW regardless of all other inputs.
The LS157 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is deter­mined by the logic levels supplied to the Select Input. The logic equations for the outputs are:
) is active LOW. When E
TRUTH TABLE
SELECT
ENABLE
E S I H X X X L
L H X LL L HXHH L L LXL L L HXH
H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care
INPUT
⋅ (I1a ⋅ S + I0a ⋅ S) Zb = E ⋅ (I1b ⋅ S + I0b ⋅ S)
Za = E Zc = E
⋅ (I1c ⋅ S + I0c ⋅ S)Z
= E ⋅ (I1d ⋅ S + I0d ⋅ S)
d
A common use of the LS157 is the moving of data from two groups of registers to four common output busses. The partic­ular register from which the data comes is determined by the state of the Select Input. A less obvious use is as a function generator. The LS157 can generate any four of the 16 dif ferent functions of two variables with one variable common. This is useful for implementing highly irregular logic.
INPUTS OUTPUT
0
I
1
Z
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
V
T
I
OH
I
OL
CC
A
Supply Voltage 54
74
Operating Ambient Temperature Range 54
74 Output Current — High 54, 74 –0.4 mA Output Current — Low 54
74
4.5
4.75 –55
0
5.0
5.0 25
25
5.5
5.25 125
70
4.0
8.0
V
°C
mA
FAST AND LS TTL DATA
5-2
Page 3
SN54/74LS157
VILI
LOW Volt
V
pg
VOHOutput HIGH Volt
CC
,
OH
,
IN IH
VOLOutput LOW Volt
V
V
V
I
IH
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol Parameter
V
IH
V
IK
I
IH
I
IL
I
OS
I
CC
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
Input HIGH Voltage 2.0 V
nput
Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA
Input HIGH Current
I0, I
1
E
, S
I0, I
1
E
, S
Input LOW Current
I0, I
1
E
, S Short Circuit Current (Note 1) –20 –100 mA VCC = MAX Power Supply Current 16 mA VCC = MAX
age
age
age
54 0.7 74 0.8
54 2.5 3.5 V 74 2.7 3.5 V
54, 74 0.25 0.4 V IOL = 4.0 mA
74 0.35 0.5 V IOL = 8.0 mA
Min Typ Max
0.1
0.2
–0.4 –0.8
Unit Test Conditions
Guaranteed Input HIGH Voltage for All Inputs
Guaranteed Input LOW Voltage for All Inputs
VCC = MIN, IOH = MAX, VIN = V or VIL per Truth Table
20 40
µA VCC = MAX, VIN = 2.7 V
mA VCC = MAX, VIN = 7.0 V
mA VCC = MAX, VIN = 0.4 V
IH
VCC = VCC MIN,
=
or
IN
IL
per Truth Table
IH
AC CHARACTERISTICS (T
Symbol Parameter
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Propagation Delay Data to Output
Propagation Delay Enable to Output
Propagation Delay Select to Output
V
IN
V
OUT
A
1.3 V
= 25°C)
Limits
Min Typ Max
9.0
9.0 13
14 15
18
Unit Test Conditions
14 14
20 21
23 27
ns Figure 2
ns Figure 1
ns Figure 2
AC WAVEFORMS
t
PHL
1.3 V
1.3 V t
PLH
1.3 V
V
V
IN
OUT
1.3 V t
PHL
1.3 V
Figure 1 Figure 2
1.3 V
VCC = 5.0 V
CL = 15 pF
t
PLH
1.3 V
FAST AND LS TTL DATA
5-3
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