Small-Outline Packages and Standard
Plastic 300-mil DIPs
description
This monolithic, positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic with a
direct clear (CLR
to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level
and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either
the high or low level, the D-input signal has no effect at the output.
The SN74F174A is characterized for operation from 0°C to 70°C.
) input. Information at the data (D) inputs meeting the setup time requirements is transferred
FUNCTION TABLE
(each flip-flop)
INPUTS
CLRCLKD
HLXQ
H↑HH
H↑LL
LXXL
OUTPUT
Q
0
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
†
CLR
CLK
1D
2D
3D
4D
5D
6D
1
9
3
4
6
11
13
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
R
C1
1D
2
1Q
5
2Q
7
3Q
10
4Q
12
5Q
15
6Q
Copyright 1993, Texas Instruments Incorporated
2–1
Page 2
SN74F174A
HEX D-TYPE FLIP-FLOP
WITH CLEAR
SDFS029B – D2932, MARCH 1987 – REVISED OCTOBER 1993
logic diagram (positive logic)
1D
6D
9
1
3
14
1D
C1
R
Four Identical Channels
Not Shown
1D
C1
R
15
2
1Q
6Q
CLK
CLR
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input-voltage ratings may be exceeded provided the input-current ratings are observed.
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(RoHS)
(RoHS)
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAUN/ A for Pkg Type
CU NIPDAUN/ A for Pkg Type
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
(3)
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
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information may not be available for release.
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