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查询54ALS574供应商
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
• 3-State Buffer-Type Noninverting Outputs
Drive Bus Lines Directly
• Bus-Structured Pinout
• Buffered Control Inputs
• SN74ALS575A and ′AS575 Have
Synchronous Clear
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), Standard Plastic (N, NT)
and Ceramic (J, JT) 300-mil DIPs, and
Ceramic Flat (W) Packages
description
These octal D-type edge-triggered flip-flops
feature 3-state outputs designed specifically for
bus driving. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
The eight flip-flops enter data on the low-to-high
transition of the clock (CLK) input. The
SN74ALS575A, SN54AS575, and SN74AS575
may be synchronously cleared by taking the clear
(CLR
) input low.
The output-enable (OE
internal operations of the flip-flops. Old data can
be retained or new data can be entered while the
outputs are in the high-impedance state.
The SN54ALS574B, SN54AS574, and
SN54AS575 are characterized for operation over
the full military temperature range of –55°C to
125°C. The SN74ALS574B, SN74ALS575A,
SN74AS574, and SN74AS575 are characterized
for operation from 0°C to 70°C.
) input does not affect
SN54ALS574B, SN54AS574 ...J OR W PACKAGE
SN74ALS574B, SN74AS574 . . . DW OR N PACKAGE
SN54ALS574B, SN54AS574 . . . FK PACKAGE
SN54AS575 . . . JT OR W PACKAGE
SN74ALS575A, SN74AS575 . . . DW OR NT PACKAGE
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
3D
4D
5D
6D
7D
CLR
OE
1D
2D
3D
4D
5D
6D
7D
8D
NC
GND
(TOP VIEW)
20
1
19
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
10
(TOP VIEW)
2D1DOE
3212019
4
5
6
7
8
9
10 111213
8D
CLK
GND
(TOP VIEW)
24
1
23
2
22
3
21
4
20
5
19
6
18
7
17
8
16
9
15
10
14
11
13
12
V
8Q
CC
V
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
1Q
18
17
16
15
14
7Q
V
CC
NC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
NC
CC
2Q
3Q
4Q
5Q
6Q
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2D
3D
4D
NC
5D
6D
7D
NC – No internal connection
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AS575 ...FK PACKAGE
(TOP VIEW)
CC
14
NC
NC
28 27 26
1516 17
NC
GND
V
NC
NC
18
CLK
1Q
25
24
23
22
21
20
19
8Q
2Q
3Q
4Q
NC
5Q
6Q
7Q
1DOECLR
4
321
5
6
7
8
9
10
11
12
13
8D
Copyright 1995, Texas Instruments Incorporated
1
Page 2
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
Function Tables
SN54ALS574B, SN74ALS574B, SN54AS574, SN74AS574
OE CLK D
SN74ALS575A, SN54AS575, SN74AS575
OE CLR CLK D
L L ↑ X L
L H ↑ HH
LH↑LL
LHLX Q
HXHX Z
logic symbols
1
OE
11
CLK
2
1D
3
2D
4
3D
5
4D
6
5D
7
6D
8
7D
9
8D
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, J, JT, N, and NT packages.
†
SN54ALS574B, SN74ALS574B,
SN54AS574, SN74AS574
EN
C1
1D
(each flip-flop)
INPUTS
L ↑ H H
L ↑ LL
LLX Q
HXX Z
(each flip-flop)
INPUTS
19
1Q
18
2Q
17
3Q
16
4Q
15
5Q
14
6Q
13
7Q
12
8Q
OUTPUT
OE
CLK
CLR
1D
2D
3D
4D
5D
6D
7D
8D
Q
0
OUTPUT
Q
2
14
1
3
4
5
6
7
8
9
10
0
SN74ALS575A, SN54AS575,
SN74AS575
EN
C1
1R
1D
22
21
20
19
18
17
16
15
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 3
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
f
Clock frequenc
MH
twPulse duration
ns
t
S
CLK↑
ns
t
Hold ti
CLK↑
ns
logic diagrams (positive logic)
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
SDAS165B – JUNE 1982 – REVISED JULY 1995
SN54ALS574B, SN74ALS574B,
SN54AS574, SN74AS574
1
OE
11
CLK
C1
2
1D
To Seven Other Channels
Pin numbers shown are for the DW, J, JT, N, and NT packages.
1D
19
1Q
OE
CLK
CLR
1D
SN74ALS575A, SN54AS575,
SN74AS575
2
14
1
3
To Seven Other Channels
1D
C1
22
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN54ALS574B –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . .
A
SN74ALS574B, SN74ALS575A 0°C to 70°C. . . . . . . . . . . . . . . . .
1Q
†
recommended operating conditions
V
CC
V
IH
V
IL
I
OH
I
OL
clock
su
h
T
A
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.7 0.8 V
High-level output current –1 –2.6 mA
Low-level output current 12 24 mA
y
etup time before
me after
Operating free-air temperature –55 125 0 70 °C
′ALS574B 0 28 0 35
SN74ALS575A
′ALS574B, CLK high or low 16.5 14
SN74ALS575A, CLK high or low 16.5
Data 15 15
SN74ALS575A, CLR 15
Data 4 0
SN74ALS575A, CLR 0
SN54ALS574B
MIN NOM MAX MIN NOM MAX
SN74ALS574B
SN74ALS575A
0 30
UNIT
z
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
Page 4
SN54ALS574B, SN54AS574, SN54AS575
V
V
VOLV
4.5 V
V
I
mA
CLK
Q
ns
OE
Q
ns
OE
Q
ns
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS
V
IK
V
OH
I
OZH
I
OZL
I
I
I
IH
I
IL
‡
I
O
′ALS574B VCC = 5.5 V
CC
SN74ALS575A VCC = 5.5 V
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC –2 VCC –2
= 4.5
CC
=
CC
VCC = 5.5 V, VO = 2.7 V 20 20 µA
VCC = 5.5 V, VO = 0.4 V –20 –20 µA
VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
VCC = 5.5 V, VI = 2.7 V 20 20 µA
VCC = 5.5 V, VI = 0.4 V –0.2 –0.2 mA
VCC = 5.5 V, VO = 2.25 V –20 –112 –30 –112 mA
IOH = –1 mA 2.4 3.3
IOH = –2.6 mA 2.4 3.2
IOL = 12 mA 0.25 0.4 0.25 0.4
IOL = 24 mA 0.35 0.5
Outputs high 11 18 11 18
Outputs low 17 27 17 27
Outputs disabled 17 28 17 28
Outputs high 10 17 10 17
Outputs low 15 24 15 24
Outputs disabled 16 30 16 30
SN54ALS574B
MIN TYP†MAX MIN TYP†MAX
SN74ALS574B
SN74ALS575A
UNIT
V
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
PARAMETER
f
max
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
PLZ
FROM
(INPUT)
TO
(OUTPUT)
SN54ALS574B SN74ALS574B SN74ALS575A
MIN MAX MIN MAX MIN MAX
28 35 30 MHz
4 22 3 14 4 14
4 17 4 14 4 14
4 21 3 18 4 18
4 26 4 18 4 18
2 16 1 10 2 10
2 25 2 12 3 13
R1 = 500 Ω
R2 = 500 Ω,
TA = MIN to MAX
,
§
UNIT
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 5
SN54ALS574B, SN54AS574, SN54AS575
tw*
Pulse duration
ns
tsu*
S
CLK↑
ns
th*
Hold ti
CLK↑
ns
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN54AS574, SN54AS575 –55°C to 125°C. . . . . . . . . . . . . . . . . .
A
SN74AS574, SN74AS575 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . .
recommended operating conditions
SN54AS574
SN54AS575
MIN NOM MAX MIN NOM MAX
V
CC
V
IH
V
IL
I
OH
I
OL
f
clock
T
A
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.8 0.8 V
High-level output current –12 –15 mA
Low-level output current 32 48 mA
* Clock frequency 0 100 0 90 MHz
*
*
*
etup time before
me after
Operating free-air temperature –55 125 0 70 °C
CLK high 5 5.5
CLK low 4 5.5
Data 3 5.5
′AS575, CLR high or low 6.5 6.5
Data 3 3
′AS575, CLR 0 0
SN74AS574
SN74AS575
UNIT
†
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
Page 6
SN54ALS574B, SN54AS574, SN54AS575
V
V
VOLV
4.5 V
V
I
V
V
V
mA
I
mA
(
)
(
)
(INPUT)
(OUTPUT)
CLK
A
Q
ns
OE
A
Q
ns
OE
A
Q
ns
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS574
PARAMETER TEST CONDITIONS
V
IK
V
OH
I
OZH
I
OZL
I
I
I
IH
IL
I
O
CC
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
OE, CLK, CLR
D
‡
′AS574 VCC = 5.5 V
′AS575 VCC = 5.5 V
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –2 mA VCC –2 VCC –2
= 4.5
CC
=
CC
VCC = 5.5 V, VO = 2.7 V 50 50 µA
VCC = 5.5 V, VO = 0.4 V –50 –50 µA
VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
VCC = 5.5 V, VI = 2.7 V 20 20 µA
= 5.5 V,
CC
VCC = 5.5 V, VO = 2.25 V –30 –112 –30 –112 mA
IOH = –12 mA 2.4 3.2
IOH = –15 mA 2.4 3.3
IOL = 32 mA 0.29 0.5
IOL = 48 mA 0.34 0.5
= 0.4
I
Outputs high 73 116 73 116
Outputs low 85 134 85 134
Outputs disabled 84 134 84 134
Outputs high 78 126 78 126
Outputs low 89 142 89 142
Outputs disabled 88 142 88 142
SN54AS575
MIN TYP†MAX MIN TYP†MAX
–0.5 –0.5
–3 –2
SN74AS574
SN74AS575
UNIT
V
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω
PARAMETER
f
* 100 90 MHz
max
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
FROM
INPUT
TO
OUTPUT
ny
ny
ny
R2 = 500 Ω,
TA = MIN to MAX
SN54AS574
SN54AS575
MIN MAX MIN MAX
3 11 3 8
4 11 4 9
2 7 2 6
3 11 3 10
2 7 2 6
2 7 2 6
,
§
SN74AS574
SN74AS575
UNIT
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
6
Page 7
From Output
Under Test
(see Note A)
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
V
CC
S1
R
L
Test
Point
C
L
R
L
From Output
Under Test
(see Note A)
Test
Point
C
L
From Output
Under Test
(see Note A)
R1
C
L
RL = R1 = R2
Test
Point
R2
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
Timing
Input
t
su
Data
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Output
Control
(low-level
enabling)
Waveform 1
S1 Closed
(see Note B)
Waveform 2
S1 Open
(see Note B)
t
PZL
t
PZH
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
VOLTAGE WAVEFORMS
1.3 V
t
PHZ
1.3 V
1.3 V
t
1.3 V1.3 V
1.3 V1.3 V
FOR OPEN-COLLECTOR OUTPUTS
h
t
PLZ
LOAD CIRCUIT
3.5 V
0.3 V
3.5 V
0.3 V
3.5 V
0.3 V
[
3.5 V
V
OL
0.3 V
V
OH
0.3 V
[
0 V
High-Level
Low-Level
Out-of-Phase
(see Note C)
Pulse
Pulse
Input
In-Phase
Output
Output
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
1.3 V 1.3 V
t
w
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.3 V 1.3 V
t
PLH
t
PHL
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.3 V1.3 V
t
PHL
t
PLH
3.5 V
0.3 V
3.5 V
0.3 V
3.5 V
0.3 V
V
V
V
V
OH
OL
OH
OL
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
Page 8
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
Page 9
Copyright © Each Manufacturing Company.
All Datasheets cannot be modified without permission.
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