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CD4512BC
8-Channel Buffered Data Selector
CD4512BC 8-Channel Buffered Data Selector
October 1987
Revised April 2002
General Description
The CD4512BC buffered 8- chan ne l data sel e ctor is a complementary MOS (CMOS) circuit constructed with N- and
P-channel enhancement mode transistors. This data selector is primarily used as a digital signal multiplexer selecting
1 of 8 inputs and routing the signal to a 3-STATE output. A
high level at the Inhibit input f orces a low level at the output. A high level at the Output Enable
output into the 3-S TATE condition. Low levels at both the
Inhibit and (OE
) inputs allow normal operation.
(OE) input forces the
Features
■ Wide supply voltage range: 3.0V to 15V
■ High noise immunity: 0.45 V
■ 3-STATE output
■ Low quiescent power dissipation:
■ Plug-in replacement for Motorola MC14512
µW/package (typ.) @ V
0.25
DD
CC
(typ.)
= 5.0V
Ordering Code:
Order Number Package Number Package Description
CD4512BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
CD4512BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending suffix “X” to the ordering code.
Connection Diagram
Top View
Truth Table
Address Inputs Control Inputs Output
C B A Inhibit OE
000 0 0 X0
001 0 0X1
0 10 0 0X2
011 0 0X3
100 0 0 X4
101 0 0X5
1 10 0 0X6
111 0 0X7
211 1 0 0
2 2 2 2 1 Hi-Z
2 = Don't care
Hi-Z = 3-STATE condition
Xn = Data at input n
Z
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Logic Diagram
CD4512BC
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Absolute Maximum Ratings(Note 1)
(Note 2)
Supply Voltage (VDD) −0.5 to +18 V
Input Voltage (VIN) −0.5 to VDD + 0.5 V
Storage Temperature Range (TS) −65°C to +150°C
Power Dissipation (P
)
D
Dual-In-Line 700 mW
Small Outline 500 mW
Lead Temperature, (T
)
L
(Soldering, 10 seconds) 260
DC Electrical Characteristics (Note 2)
Symbol Parameter Conditions
I
Quiescent Device VDD = 5V, VIN = VDD or V
DD
V
LOW Level VDD = 5V 0.05 0 0.05 0.05
OL
V
HIGH Level VDD = 5V 4.95 4.95 5.0 4.95
OH
V
LOW Level VDD = 5V, VO = 0.5V 1.5 2.25 1.5 1.5
IL
V
HIGH Level VDD = 5V, VO = 4.5V 3.5 3.5 2.75 3.5
IH
I
LOW Level Output VDD = 5V, VO = 0.4V 0.64 0.51 0.78 0.36
OL
(Note 3) VDD = 15V, VO = 1.5V 4.2 3.4 7.8 2.4
I
HIGH Level Output VDD = 5V, VO = 4.6V −0.25 −0.2 −0.14
OH
(Note 3) VDD = 15V, V O = 13.5V −1.8 −1.5 −1.1
I
Input Current VDD = 15V, VIN = 0V −0.1 −10−5−0.1 −1.0
IN
I
3-STATE VDD = 15V, VO = 0V ±1.0 ±10
OZ
Output Current VDD = 15V, VO = 15V
Note 3: IOH and IOL are tested one output at a ti m e.
= 10V, VIN = VDD or V
DD
VDD = 15V, VIN = VDD or V
= 10V |IOL| < 1 µA 0.05 0 0.05 0.05
DD
VDD = 15V 0.05 0 0.05 0.05
= 10V |I
DD
VDD = 15V 14.95 14.95 15.0 14.95
= 10V, VO = 1.0V 3.0 4.50 3.0 3.0
DD
VDD = 15V, VO = 1.5V 4.0 6.75 4.0 4.0
= 10V, VO = 9.0V 7.0 7.0 5.50 7.0
DD
VDD = 15V, VO = 13.5V 11.0 11.0 8.25 11.0
= 10V, VO = 0.5V 1.6 1.3 2.0 0.9
DD
= 10V, VO = 9.5 −0.62 −0.5 −0.35
DD
= 15V, VIN = 15V 0.1 10−50.1 1.0
V
DD
| < 1 µA 9.95 9.95 10.0 9.95
OH
Recommended Operating
Conditions
DC Supply Voltage (V
DC
Input Voltage (VIN) 0 to VDD V
DC
Operating Temperature Range (TA) −55°C to +125°C
Note 1: “Absolute Maximum Ratings” are those values bey ond which the
safety of the device c annot be guaranteed. T hey are not meant to imp ly
that the devices should be operated at these limits. The Recommended
Operating Condi tions and Electrical Characteristic s table provide conditions for actual device operation.
= 0V unless otherw is e s pecified.
Note 2: V
°C
SS
SS
SS
SS
−55°C +25°C +125°C
Min Max Min Typ Max Min Max
(Note 2)
) 3.0 to 15 V
DD
5 0.005 5 150
10 0.010 10 300
20 0.015 20 600
−5
±1.0 ±3.0 µA
CD4512BC
DC
DC
Units
µACurrent V
VOutput Voltage V
VOutput Voltage V
VInput Voltage V
VInput Voltage V
mACurrent V
mACurrent V
µA
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AC Electrical Characteristics (Note 4)
T
= 25°C, tr = tf = 20 ns, C
A
Symbol Parameter Conditions
t
CD4512BC
PHL
t
PLH
t
THL
t
PHZ
t
PZH
C
C
C
Propagation Delay VDD = 5V 225 500 225 750
Propagation Delay VDD = 5V 225 500 225 750
, t
Transition Time VDD = 5V 70 200 70 200
TLH
, t
Propagation Delay into VDD = 5V 50 125 50 125
PLZ
, t
Propagation Delay to Logic VDD = 5V 50 125 50 125
PZL
Input Capacitance (Note 5) 7.5 15 7.5 15 pF
IN
3-STATE Output Capacitance (Note 5) 7.5 15 7.5 15 pF
OUT
Power Dissipation Capacity (Note 6) 150 150 pF
PD
Note 4: AC Parameters are gu aranteed by DC correlated testing.
Note 5: Capacitance guaranteed by periodic testing.
Note 6: C
determines the no lo ad AC power of any CM OS device. For comp let e explanation, see Family Characteris ti cs Application Note, AN-90.
PD
= 50 pF
L
= 10V 75 175 75 200
DD
= 15V 57 130 57 150
V
DD
= 10V 75 175 75 200
DD
= 15V 57 130 57 150
V
DD
= 10V 35 100 35 100
DD
= 15V 25 80 25 80
V
DD
= 10V 25 75 25 75
DD
= 15V 19 60 19 60
V
DD
VDD = 15V 19 60 19 60
CD4512BM CD4512BC
Min Typ Max Min Typ Max
Units
nsHIGH-to-LOW Level V
nsLOW-to-HIGH Level V
nsV
ns3-STATE from Logic Level V
nsLevel from 3-STATE VDD = 10V 25 75 25 75
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Typical Application
Serial Data Routing Interface
AC Test Circuit and Switching Time Waveforms
CD4512BC
Input Connect ions for t
, tf, t
r
PLH
, t
PHL
Test Inhibit A X0
1PGGNDV
2GNDPGV
3GNDGNDPG
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DD
DD
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3-STATE AC Test Circuit and Switching Time Waveforms
CD4512BC
Switch Positions for 3-STATE Test
Test S1 S2 S3 S4
Open Closed Closed Open
t
PHZ
t
Closed Open Open Closed
PLZ
t
Closed Open Open Closed
PZL
Open Closed Closed Open
t
PZH
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Physical Dimensions inches (millimeters) unless otherwise noted
CD4512BC
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
CD4512BC 8-Channel Buffered Data Selector
Fairchild does not assume any responsibility for use of any circuitr y described, no circuit patent licenses are implied a nd
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices o r syste ms are device s or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant inju ry to the
user.
Package Number N16E
2. A critical com ponent in any compon ent of a l ife supp ort
device or system whose failu re to perform can be reasonably expected to cause the failure of the li fe su pp ort
device or system, or to affect its safety or effectiveness.
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