Datasheet SMD 4070 Datasheet (FREI)

Page 1
CD4070BC Quad 2-Input EXCLUSIVE-OR Gate
CD4070BC Quad 2-Input EXCLUSIVE-OR Gate
October 1987 Revised January 1999
General Description
The CD4070BC employs complementary MOS (CMOS) transistors to achieve wide power supply operatin g range, low power consumption, and high noise margin, the CD4070BC provide basic fun ctions used in the impl emen­tation of digital integrated circuit systems. The N- and P­channel enhancement mode transistors provide a symmet­rical circuit with output swing essentially equal to the supply voltage. No DC power other than that caused by leakage current is consumed during static condition. Al l inputs are
protected from da mage due to static discharge by diode clamps to V
and VSS.
DD
Features
■ Wide supply voltage range: 3.0V to 15V
■ High noise immunity: 0.45 V
■ Low power TTL compatibility:
Fan out of 2 driving 74L or 1 driving 74LS
■ Pin compatible to CD4030A Equivalent to MM74C86 and MC14070B
DD
typ.
Ordering Code:
Order Number Package Number Package Description
CD4070BCM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body CD4070BCN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for SOIC and DIP
Truth Table
Inputs Outputs
ABY
LLL LHH HLH HHL
Top View
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Absolute Maximum Ratings(Note 1)
(Note 2) DC Supply Voltage (VDD) −0.5 to +18 V
Input Voltage (VIN) −0.5toVDD+0.5 V
CD4070BC
Storage Temperature Range (TS) −65°C to +150°C Power Dissipation (P
Dual-In-Line 700 mW Small Outline 500 mW
Lead Temperature (T
(Soldering, 10 seconds) 260°C
)
D
)
L
Recommended Operating Conditions
DC Supply Voltage (V
DC
Input Voltage (VIN)0 to V
DC
Operating Temperature Range (TA) −40°C to +85°C
Note 1: “Absolute Maxi mum Ratings” are those valu es beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be ope rated at these limi ts. The table of “Recom­mended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device op eration.
= 0V unless otherw is e s pecified.
Note 2: V
SS
(Note 2)
) 3V to 15 V
DD
DC Electrical Characteristics (Note 3)
Symbol Parameter Conditions
I
Quiescent Device VDD = 5V, 1.0 1.0 7.5 µA
DD
Current VIN = VDD or V
VDD = 10V, 2.0 2.0 15 µA VIN = VDD or V VDD = 15V, 4.0 4.0 30 µA
V
LOW Level |IO| < 1 µA
OL
Output Voltage VDD = 5V 0.05 0 0.05 0.05 V
V
HIGH Level |IO| < 1 µA
OH
Output Voltage VDD = 5V 4.95 4.95 5 4.95 V
V
LOW Level |IO| < 1 µA
IL
Input Voltage VDD = 5V, VO = 4.5V or 0.5V 1.5 1.5 1.5 V
V
HIGH Level |IO| < 1 µA
IH
Input Voltage VDD = 5V, VO = 0.5V or 4.5V 3.5 3.5 3.5 V
I
LOW Level Output VDD = 5V, VO = 0.4V 0.52 0.44 0.88 0.36 mA
OL
Current VDD = 10V, VO = 0.5V 1.3 1.1 2.25 0.9 mA
I
HIGH Level Output VDD = 5V, VO = 4.6V −0.52 −0.44 −0.88 −0.36 mA
OH
Current VDD = 10V, VO = 9.5V −1.3 −1.1 −2.25 −0.9 mA
I
Input Current VDD = 15V, VIN = 0V −0.3 −10−5−0.3 −1.0 µA
IN
Note 3: “Absolute Maximum Ratin gs” are those values beyond which t he safety of the device canno t be gua ranteed . They are not m eant to i mply th at the devices should be operated at these limits. The table of “Recommended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation.
VIN = VDD or V
VDD = 10V 0.05 0 0. 05 0.05 V VDD = 15V 0.05 0 0. 05 0.05 V
VDD = 10V 9.95 9.95 10 9.95 V VDD = 15V 14.95 14.95 15 14.95 V
VDD = 10V, VO = 9V or 1.0V 3.0 3.0 3.0 V VDD = 15V, VO = 13.5V or 1.5V 4.0 4.0 4.0 V
VDD = 10V, VO = 1V or 9.0V 7.0 7.0 7.0 V VDD = 15V, VO = 1.5V or 13.5V 11.0 11.0 11.0 V
VDD = 15V, VO = 1.5V 3.6 3.0 8.8 2.4 mA
VDD = 15V, VO = 13.5V −3.6 −3.0 −8.8 −2.4 mA
VDD = 15V, VIN = 15V 0.3 10−50.3 1.0 µA
SS
SS
SS
−40°C +25°C +85°C
Min Max Min Typ Max Min Max
DC
DD VDC
Units
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Page 3
AC Electrical Characteristics (Note 4)
TA = 25°C, CL = 50 pF, RL = 200k, tr and tf ≤ 20 ns, unless otherwise specified
Symbol Parameter Conditions Min Typ Max Units
t
or Propagation Delay Time VDD = 5V 110 185 ns
PHL
t
PLH
t
or Transition Time VDD = 5V 100 200 ns
THL
t
TLH
C
IN
C
PD
Note 4: AC Parameters are guaranteed by DC correlated testin g. Note 5: C
Note—AN-90.
from Input to Output VDD = 10V 50 90 ns
Average Input Capacitance Any Input 5 7.5 pF Power Dissipation Capacitance Any Input (Note 5) 20 pF
determines t he no load AC power cons umption of any CMO S device. For compl ete explana tion, see 7 4C Family Charac teristics Application
PD
VDD = 15V 40 75 ns
VDD = 10V 50 100 ns VDD = 15V 40 80 ns
Typical PerformanceCharacteristics
Propagation Delay Time
vs Load Capacitance
CD4070BC
AC Test Circuit and Switching Time Waveforms
Note: Delays measured with input tr, tf = 20 ns.
= tf = 20 ns
t
r
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Physical Dimensions in ches (millimeters) unless otherwise noted
CD4070BC
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
Package Number M14A
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
CD4070BC Quad 2-Input EXCLUSIVE-OR Gate
14-Lead Plastic Dual-In-Package (PDIP), JEDEC MS-001, 0.300” Wide
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or system s a re devices or syste ms which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea­sonably expected to result in a significant injur y to the user.
Package Number N14A
2. A critical comp onent in any com ponent of a l ife support device or system whose failure to perform can be rea­sonably expected to cause the failure of the life suppor t device or system, or to affect its safety or effectiveness.
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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchil d reser ves the right at any time without notice to change said circuitry and specifications.
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