Datasheet SMD 4060 Datasheet (FREI)

Download

Page 1

CD4020BC • CD4040BC • CD4060BC 14-Stage Ripple Carry Binary Counters •

12-Stage Ripple Carry Binary Counters • 14-Stage Ripple Carry Binary Counters

October 1987 Revised January 1999

CD4020BC • CD4040BC • CD4060BC 14-Stage Ripple Carry Binary Counters • 12-Stage Ripple Carry Binary

Counters • 14-Stage Ripple Carry Binary Counters

General Description

The CD4020BC, CD4060BC are 14-stage ripple carry binary counters, an d the CD4040BC is a 12-stage ri pple carry binary counter. The counters are advanced one count on the negative transition of each clock pulse. The

counters are reset to the zero state by a logical “1” at the reset input independent of clock.

Features

■ Wide supply voltage range: 1.0V to 15V

■ High noise immunity: 0.45 V

■ Low power TTL compatibility: Fan out of 2 driving 74L

or 1 driving 74LS

■ Medium speed operation: 8 MHz typ. at V

■ Schmitt trigger clock input

(typ.)

= 10V

Ordering Code:

Order Number Package Number Package Description

CD4020BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow CD4020BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide CD4040BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow CD4040BCSJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide CD4040BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide CD4060BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow CD4060BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” t o t he ordering code.

Connection Diagrams

Pin Assignments for DIP and SOIC

CD4020BC

Pin Assignments for DIP, SOIC and SOP

CD4040BC

Top View

Page 2

Connection Diagrams (Continued)

Pin Assignments for DIP and SOIC

Schematic Diagrams

CD4060BC

Top View

CD4020BC • CD4040BC • CD4060BC

CD4020BC

CD4040BC

www.fairchildsemi.com 2

Page 3

CD4060BC

CD4060B Typical Oscillator Connections

RC Oscillator

CD4020BC • CD4040BC • CD4060BC

Crystal Oscillator

3 www.fairchildsemi.com

Page 4

Absolute Maximum Ratings(Note 1)

(Note 2)

Supply Voltage (VDD) −0.5V to +18V Input Voltage (V Storage Temperature Range (T Package Dissipation (P

Dual-In-Line 700 mW Small Outline 500 mW

Lead Temperature (T

(Soldering, 10 seconds) 260°C

) −0.5V to VDD +0.5V

)

) −65°C to +150°C

)

Recommended Operating Conditions

Supply Voltage (V Input Voltage (V Operating Temperature Range (TA) −40°C to +85°C

Note 1: “Absolute Maxi mum Ratings” are those valu es beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be o perated at these lim its. The table s of “Recom mended Operating Conditions” and “Electrical Characteristics” provide co nditions for actual device operation.

Note 2: V

= 0V unless otherw is e s pecified.

DC Electrical Characteristics (Note 2)

Symbol Parameter Conditions

Quiescent Device Current VDD = 5V, VIN = VDD or V

CD4020BC • CD4040BC • CD4060BC

LOW Level Output Voltage VDD = 5V 0.05 0 0.05 0.05 V

HIGH Level Output Voltage VDD = 5V 4.95 4.95 5 4.95 V

LOW Level Input Voltage VDD = 5V, VO = 0.5V or 4.5V 1.5 2 1.5 1.5 V

HIGH Level Input Voltage VDD = 5V, VO = 0.5V or 4.5V 3.5 3.5 3 3.5 V

LOW Level Output Current VDD = 5V, VO = 0.4V 0.52 0.44 0.88 0.36 mA

(Note 3) VDD = 10V, VO = 0.5V 1.3 1.1 2.25 0.9 mA

HIGH Level Output Current VDD = 5V, VO = 4.6V −0.52 −0.44 −0.88 −0.36 mA

(Note 3) VDD = 10V, VO = 9.5V −1.3 −1.1 −2.25 −0.9 mA

Input Current VDD = 15V, VIN = 0V −0.30 −10−5−0.30 −1.0 µA

Note 3: Data does not apply to oscillator points φ0 and φ0 of CD4060BC. IOH and IOL are tested one output at a t im e.

VDD = 10V, VIN = VDD or V VDD = 15V, VIN = VDD or V

VDD = 10V 0.05 0 0.05 0.05 V VDD = 15V 0.05 0 0.05 0.05 V

VDD = 10V 9.95 9.95 10 9.95 V VDD = 15V 14.95 14.95 15 14.95 V

VDD = 10V, VO = 1.0V or 9.0V 3.0 4 3.0 3.0 V VDD = 15V, VO = 1.5V or 13.5V 4.0 6 4.0 4.0 V

VDD = 10V, VO = 1.0V or 9.0V 7.0 7.0 6 7.0 V VDD = 15V, VO = 1.5V or 13.5V 11.0 11.0 9 11.0 V

VDD = 15V, VO = 1.5V 3.6 3.0 8.8 2.4 mA

VDD = 15V, VO = 13.5V −3.6 −3.0 −8.8 −2.4 mA

VDD = 15V, VIN = 15V 0.30 10−50.30 1.0 µA

SS SS

−40°C +25°C +85°C

Min Max Min Typ Max Min Max

20 20 150 µA 40 40 300 µA 80 80 600 µA

) +3V to +15V

) 0V to V

Units

www.fairchildsemi.com 4

Page 5

AC Electrical Characteristics (Note 4)

CD4020BC, CD4040BC TA = 25°C, CL = 50 pF, RL = 200k, tr = tf = 20 ns, unless otherwise noted

Symbol Parameter Conditions Min Typ Max Units

, t

PHL1

PLH1

, t

PHL

PLH

, t

THL

TLH

tWL, t

, t

rCL

fCL

PHL(R)

WH(R)

Note 4: AC Parameters are guaranteed by DC correlated te sting.

Propagation Delay Time to Q

VDD = 5V 250 550 ns

VDD = 10V 100 210 ns

VDD = 15V 75 150 ns Interstage Propagation Delay Time VDD = 5V 150 330 ns from Qn to Q

n+1

VDD = 10V 60 125 ns

VDD = 15V 45 90 ns Transition Time VDD = 5V 100 200 ns

VDD = 10V 50 100 ns

VDD = 15V 40 80 ns Minimum Clock Pulse Width VDD = 5V 125 335 ns

VDD = 10V 50 125 ns

VDD = 15V 40 100 ns Maximum Clock Rise and Fall Time VDD = 5V No Limit ns

VDD = 10V No Limit ns

VDD = 15V No Limit ns Maximum Clock Frequency VDD = 5V 1.5 4 MHz

VDD = 10V 4 10 MHz

VDD = 15V 5 12 MHz Reset Propagation Delay VDD = 5V 200 450 ns

VDD = 10V 100 210 ns

VDD = 15V 80 170 ns Minimum Reset Pulse Width VDD = 5V 200 450 ns

VDD = 10V 100 210 ns

VDD = 15V 80 170 ns Average Input Capacitance Any Input 5 7.5 pF Power Dissipation Capacitance 50 pF

CD4020BC • CD4040BC • CD4060BC

5 www.fairchildsemi.com

Page 6

AC Electrical Charac teristics (Note 5)

CD4060BC TA = 25°C, CL = 50 pF, RL = 200k, tr = tf = 20 ns, unless otherwise noted

Symbol Parameter Conditions Min Typ Max U nits

, t

PHL4

PLH4

, t

PHL

PLH

, t

THL

TLH

tWL, t

, t

rCL

fCL

CD4020BC • CD4040BC • CD4060BC

PHL(R)

WH(R)

Note 5: AC Parameters are guara nt eed by DC correlated test ing.

Propagation Delay Time to Q

VDD = 5V 550 1300 ns

VDD = 10V 250 525 ns

VDD = 15V 200 400 ns Interstage Propagation Delay Time VDD = 5V 150 330 ns from Qn to Q

n+1

VDD = 10V 60 125 ns

VDD = 15V 45 90 ns Transition Time VDD = 5V 100 200 ns

VDD = 10V 50 100 ns

VDD = 15V 40 80 ns Minimum Clock Pulse Width VDD = 5V 170 500 ns

VDD = 10V 65 170 ns

VDD = 15V 50 125 ns Maximum Clock Rise and Fall Time VDD = 5V No Limit ns

VDD = 10V No Limit ns

VDD = 15V No Limit ns Maximum Clock Frequency VDD = 5V 1 3 MHz

VDD = 10V 3 8 MHz

VDD = 15V 4 10 MHz Reset Propagation Delay VDD = 5V 200 450 ns

VDD = 10V 100 210 ns

VDD = 15V 80 170 ns Minimum Reset Pulse Width VDD = 5V 200 450 ns

VDD = 10V 100 210 ns

VDD = 15V 80 170 ns Average Input Capacitance Any Input 5 7.5 pF Power Dissipation Capacitance 50 pF

www.fairchildsemi.com 6

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted

CD4020BC • CD4040BC • CD4060BC

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M16A

Package Number M16D

7 www.fairchildsemi.com

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

Counters • 14-Stage Ripple Carry Binary Counters

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or system s ar e devices or syste ms which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with

CD4020BC • CD4040BC • CD4060BC 14-Stage Ripple Carry Binary Counters • 12-Stage Ripple Carry Binary

instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user.

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Package Number N16E

2. A critical component in a ny compon ent of a life suppor t device or system whose failure to perform can be reasonably expected to cause the failure of the life suppor t device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.