The ΣDECO SM588× series, fabricated using NPC’s Molybdenum-gate CMOS process, are D/A converter ICs
for digital audio, that provide all the basic converter functions in miniature 8-pin packages. They each feature
built-in 8-times oversampling digital filter, Σ∆ jitter-compensated D/A converter, and post-analog lowpass filter converter stages required for digital audio. They can sample at up to 96kHz for 16 or 24-bit input word
length. A type with built-in deemphasis filter is also available for applications requiring deemphasis.
FEATURES
3-wire Input
■
2-channel stereo configuration
■
256fs, 384fs, or 512fs system clock (applied by
product / version)
■
Input format
3-wire serial, MSB first, rear-packed
16 or 24-bit (applied by product / version)
■
8-times oversampling digital filter
• 32 dB stopband attenuation
• ±0.05 dB passband ripple
■
2-channel D/A converter
• 3rd-order noise shaper
• Oversampling operation
■
3rd-order post-analog lowpass filter
■
4.5 to 5.5 V supply voltage
■
8-pin SOP
■
Molybdenum-gate CMOS process
2-wire Input with Deemphasis Filter
■
2-channel stereo configuration
■
256fs, 384fs, or 512fs system clock (applied by
product / version)
■
Input format
2-wire serial, MSB first, rear-packed
16 or 24-bit (applied by product / version)
■
Deemphasis filter (fs = 44.1 kHz sample rate)
■
8-times oversampling digital filter
• 32 dB stopband attenuation
• ±0.05 dB passband ripple
■
2-channel D/A converter
• 3rd-order noise shaper
• Oversampling operation
■
3rd-order post-analog lowpass filter
■
4.5 to 5.5 V supply voltage
■
8-pin SOP
■
Molybdenum-gate CMOS process
APPLICATIONS
■
Audio equipment
PINOUTS
3-wire input2-wire input with built-in deemphasis filter
CLK
1
4
5
88
8
5
DATA
BCKI
LRCI
ORDERING INFORMATION
DevicePackage
SM5882AS
SM5883AS
SM5883BS
SM5885CS
LO
VDD
VSS
RO
8-pin SOP
DATA
DEEM
LRCI
CLK
1
5
88
4
NIPPON PRECISION CIRCUITS—1
LO
8
VDD
VSS
RO
5
Page 2
PACKAGE DIMENSIONS
(Unit : mm)
Weight : 0.07g
SM588× series
4.4 0.2
6.2 0.3
0.15
+
−
0.05
0.1
0.4 0.2
0.695typ
5.2 0.3
0.05 0.05
1.5 0.1
1.27
0.10
0.4 0.1
0.12
M
SERIES LINEUP
DeviceInput lengthTypePin 2 functionMaster clock
SM5882AS162-wire inputDeemphasis control384fs
SM5883AS163-wire inputBit clock input384fs
SM5883BS163-wire inputBit clock input256fs
SM5885CS243-wire inputBit clock input512fs
0 to 10
NIPPON PRECISION CIRCUITS—2
Page 3
BLOCK DIAGRAM
LRCIDATA
SM588× series
CLK
Timing
control
9 Level
DEM DAC
9 Level
DEM DAC
Input interface
LR
Filter & attenuation
operation block
LR
Noise shaper
operation block
9 Level
DEM DAC
BCKI*
DEEM**
9 Level
DEM DAC
+−
LOVSSRO
* : Not available for 2-wire input type
** : Not available for 3-wire input type
VDD
+−
PIN DESCRIPTION
NumberNameI/ODescription
1DATAISerial data input
1
2
3LRCIISample rate (fs) clock input. Left-channel input when HIGH, and right-channel input when LOW.
4CLKIExternal clock input
5ROORight-channel analog output
6VSS–Ground
7VDD–Supply
8LOOLeft-channel analog output
BCKI
DEEM
2
IBit clock input
IDeemphasis ON/OFF control (44.1 kHz, ON when HIGH)
1. 3-wire type
2. 2-wire type with built-in deemphasis filter
NIPPON PRECISION CIRCUITS—3
Page 4
SM588× series
SPECIFICATIONS
Absolute Maximum Ratings
V
= 0 V
SS
ParameterSymbolRatingUnit
Supply voltage rangeV
Input voltage range
Storage temperature rangeT
Power dissipationP
1. All inputs
Also applicable during supply switching.
Recommended Operating Conditions
1
−
−
+
−
°
−
°C
0.3 to 7.0V
V
SS
0.3 to V
0.3V
DD
55 to 125
300mW
C
V
STG
DD
IN
D
V
= 0 V
SS
ParameterSymbolRatingUnit
Supply voltageV
Operating temperatureT
DD
OPR
DC Characteristics
V
= 4.5 to 5.5 V, V
DD
ParameterSymbolCondition
Current consumption
1
CLK HIGH-level input voltageV
CLK LOW-level input voltageV
CLK AC-coupled input voltageV
HIGH-level input voltage
LOW-level input voltage
CLK HIGH-level input currentI
CLK LOW-level input currentI
Input leakage current
1. V
= 5 V, CLK clock input frequency f
DD
Input data: NPC pattern.
2
2. Pins BCKI (3-wire type), DEEM (2-wire type with deemphasis filter), DATA, LRCI
1. Pins LO and RO should have an output load of 10 kΩ (min).
1
Symbol
OUT
3346A left/right-channel selector
switch
Not used
Audio Precision System Two audio
analyzer with built-in filter
20 kHz lowpass filter Output levelV
22 kHz lowpass filter
A-WTD
NIPPON PRECISION CIRCUITS—8
Page 9
AC analog measurement circuit
SM588× series
33k
68p
22k
L ch. OUT
100
+−
2.2u
1
8
−
NJM
2100
+
2
27k33k
−+
−+
33u 33u
100p
100k
VCC
+
−
470u
VEE
R ch. OUT
100
2.2u
+−
100p
100k
0.1u
22k
7
−
NJM
685
27k33k
−+
33u 33u
2100
+
−+
22k
−
+
33u
330p
33u
−
+
22k
3
−
+
68p
33k
33u
330p
0.01u
LO
DATA
SM5882/83/85
VSS
VDD
BCKI
/DEEM
LRCI
LRCI
DATA
BCKI/DEEM
CLK
RO
CLK
11
10
−+
X'tal
6
10p10p
1
100u
16.9344MHz(384fs)
2
3
VDDVSS
11.2896MHz(256fs)
22.5792MHz(512fs)
Ext. CLK
0.01u
13
14
12
3
7
4
9
8
56
0.01u
1M
74HCU04
1
2
5
Int. CLK
4
NIPPON PRECISION CIRCUITS—9
Page 10
Theoretical Filter Characteristics
Overall characteristics
SM588× series
Parameter
Passband ripple0 to 0.4535fs0 to 20.0 kHz−0.05–+0.05
Stopband attenuation0.5465fs to 7.4535fs24.1 to 328.7 kHz32––
Built-in analog LPF compensation0.4535fs20.0 kHz–−0.34–
Frequency bandAttenuation (dB)
f@ fs = 44.1 kHzmintypmax
Overall frequency characteristic
0
10
20
30
Gain(dB)
40
50
60
0.01.02.03.04.05.06.07.08.0
(× fs)
Passband characteristic
0.0
0.2
0.4
Gain(dB)
0.6
0.8
0.0000.1250.2500.3750.500
0.4535
(× fs)
NIPPON PRECISION CIRCUITS—10
Page 11
SM588× series
2-wire input, deemphasis ON overall characteristics
Parameter
Passband ripple0 to 0.4535fs0 to 20.0 kHz−0.09–+0.23
Stopband attenuation0.5465fs to 7.4535fs24.1 to 328.7 kHz36––
Built-in analog LPF compensation0.4535fs20.0 kHz–−0.34–
Frequency bandAttenuation (dB)
f@ fs = 44.1 kHzmintypmax
Deemphasis ON overall frequency characteristic
0
10
20
30
Gain(dB)
40
50
60
0.01.02.03.04.05.06.07.08.0
(×fs)
Deemphasis ON passband characteristic
0
2
4
6
Gain(dB)
8
10
12
0.0000.1250.2500.3750.500
0.4535
(× fs)
NIPPON PRECISION CIRCUITS—11
Page 12
SM588× series
FUNCTIONAL DESCRIPTION
System Clock (CLK)
The system clock CLK frequency varies with device within the series as shown below, where fs is the input
frequency on LRCI.
Note that the input clock accuracy and signal-to-noise ratio greatly influence the AC analog characteristics.
The D/A converter operates at the speed shown in the following table.
Table 1. System clock
DeviceMaster clock
A version384fs48fs
B, C version256/512fs32fs
DAC oversampling
operation
System Reset
The SM588× series devices incorporate a built-in power-ON reset circuit for system reset.
When power is applied, the internal arithmetic operation and output timing counter are reset, and then reset
again and timing synchronized to the external input on the next LRCI rising edge. After system reset, the outputs are muted until the 9th rising of LRCI when output muting is released.
When the timing is reset, the PWM outputs may generate an output noise. An external muting circuit may be
required to prevent this output noise.
VDD
123910
LRCI
Internal
Reset
LO
RO
Output Muted
Figure 1. System reset timing
NIPPON PRECISION CIRCUITS—12
Page 13
SM588× series
Audio Data Input
Input data format (DATA)
The input data has a format that varies with device within the series, as shown below.
Table 2. Input format
DeviceInput lengthFormat
SM5882/SM5883
SM5885
1. The 2-wire type supports bit clocks of 48fs (384fs) or 64fs (256fs/512fs) only.
2. The 3-wire type supports bit clocks of up to 64fs.
Input timing
3-wire input (DATA, LRCI, BCKI)
Serial data bits on DATA are read into the SIPO register (serial-to-parallel converter register) on the rising
edge of the bit clock BCKI, and then converted to parallel data.
The arithmetic operation and output timing are independent of the input timing. Accordingly, after a reset, as
long as the clock frequency ratio between LRCI and the system clock CLK is maintained, phase differences
between LRCI, BCKI and the system clock CLK do not affect the functional operation. Also, any jitter present
on the data input clock does not appear as output pulse jitter.
1
2
16 bits
24 bits
MSB first, bit serial, rear-packed,
2s complement
2-wire input (DATA, LRCI)
Serial data bits on DATA are read into the SIPO register (serial-to-parallel converter register) on the rising
edge of an internally generated bit clock, and then converted to parallel data.
Deemphasis Filter (DEEM: 2-wire input)
The 2-wire type with built-in digital deemphasis filter is designed to operate at 44.1 kHz. Deemphasis is ON
when DEEM is HIGH, and OFF when DEEM is LOW.
NIPPON PRECISION CIRCUITS—13
Page 14
SM588× series
TIMING DIAGRAMS
2-wire Input Type with Deemphasis Filter Built-in
DATA
Internal bit clock
(Generated by system clock)
LRCI
3-wire Input Type
Left
Channel
MSBLSB
24 bit clock (384fs type)
32 bit clock (256fs/512fs type)
16 or 24 bit
1/fs
LSB
Right
Channel
MSB
16 or 24 bit
24 bit clock (384fs type)
32 bit clock (256fs/512fs type)
DATA
BCKI
(64fs MAX)
LRCI
Left
Channel
1/fs
16 or 24 bit
MSBLSB
Right
Channel
LSB
MSB
16 or 24 bit
NIPPON PRECISION CIRCUITS—14
Page 15
SM588× series
TYPICAL APPLICATIONS
Input Interface Examples (fs = 44.1kHz)
16.9344MHz (384fs)
44.1kHz
3-wire input type
System clock 384fs
11.2896MHz (256fs)
44.1kHz
3-wire input type
System clock 256fs
X'tal
X'tal
LRCI
BCKI
DATA
LRCI
BCKI
DATA
CKI
SM5882/83/85
CKI
SM5882/83/85
16.9344MHz (384fs)
44.1kHz
2-wire input type
System clock 384fs
11.2896MHz (256fs)
44.1kHz
2-wire input type
System clock 256fs
X'tal
X'tal
LRCI
DATA
LRCI
DATA
CKI
SM5882/83/85
CKI
SM5882/83/85
22.5792MHz (512fs)
44.1kHz
3-wire input type
System clock 512fs
X'tal
LRCI
BCKI
DATA
CKI
SM5882/83/85
44.1kHz
2-wire input type
System clock 512fs
X'tal
22.5792MHz (512fs)
LRCI
DATA
CKI
Note that the output analog characteristics and other specifications are not guaranteed for a particular format or application circuit.
SM5882/83/85
NIPPON PRECISION CIRCUITS—15
Page 16
SM588× series
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to
improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for
the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits
are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision
Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.
The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or
malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter,
including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or
indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies.
NIPPON PRECISION CIRCUITS INC.
4-3, Fukuzumi 2-chome
Koto-ku, Tokyo 135-8430, Japan
Telephone: +81-3-3642-6661
NIPPON PRECISION CIRCUITS INC.
Facsimile: +81-3-3642-6698
http://www.npc.co.jp/
Email: sales
@npc.co.jp
NIPPON PRECISION CIRCUITS—16
NC9720GE 2000.11
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