Page 1
SL74LS06
Semiconductor
Hex Inverted Buffers with
Open-Collector Outputs
This device contains hex inverted buffers with open-collector. It
performs the Boolean function Y=A in positive Logic.
• High Output Voltage (30 V)
• High Speed ( tPD = 8.5 ns typical)
• Low Power Dissipation (PD = 18 mW per Gate)
LOGIC DIAGRAM
1
A1
2
Y1
ORDERING INFORMATION
SL74LS06N Plastic
SL74LS06D SOIC
TA = 0° to 70° C for all
packages
PIN ASSIGNMENT
3
A2
5
A3
9
A4
11
A5
13
A6
4
Y2
6
Y3
8
Y4
10
Y5
12
Y6
FUNCTION TABLE
Inputs Output
A Y
PIN 14 =VCC
PIN 7 = GND
H L
L H
SLS
System Logic
Page 2
SL74LS06
Semiconductor
MAXIMUM RATINGS*
Symbol Parameter Value Unit
VCC Supply Voltage 7.0 V
VIN Input Voltage 5.5 V
V
Output Voltage 30 V
OUT
Tstg Storage Temperature Range -65 to +150 °C
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
VCC Supply Voltage 4.75 5.25 V
VIH High Level Input Voltage 2.0 V
VIL Low L evel Input Voltage 0.8 V
VOH High Level Output Voltage 30 V
IOL Low Level Output Current 40 mA
TA Ambient Temperature Range 0 +70 °C
DC ELECTRICAL CHARACTERISTICS over full operating conditions
Guaranteed Limit
Symbol Parameter Test Conditions Min Max Unit
VIK Input Clamp Voltage VCC = min, IIN = -18 mA -1.5 V
IOH High Level Output Current VCC = min, VOH= max 250 µA
VOL Low Level Output Voltage VCC = min, IOL = 16 mA 0.4 V
VCC = min, IOL = 40 mA 0.7
IIH High Level Input Current VCC = max, VIN = 2.7 V 20 µA
VCC = max, VIN = 5.5 V 1 mA
IIL Low Level Input Current VCC = max, VIN = 0.4 V -0.2 mA
ICC Supply Current VCC = max Total with
outputs high
Total with
outputs low
18 mA
60
System Logic
SLS
Page 3
SL74LS06
Semiconductor
AC ELECTRICAL CHARACTERISTICS (T
RL = 110 Ω, tr = 15 ns, tf = 6.0 ns)
Symbol Parameter Min Max Unit
t
Propagation Delay, Input A to Output Y 15 ns
PLH
t
Propagation Delay, Input A to Output Y 20 ns
PHL
= 25°C, VCC = 5.0 V, CL = 15 pF,
A
Figure 1. Switching Waveform s
NOTE A. CL includes probe and jig capacitance.
Figure 2. Test Circuit
SLS
System Logic
Loading...