Datasheet SL74HCT138D, SL74HCT138N Datasheet (SLS)

Page 1
SL74HCT138
Semiconductor
1- of-8 Decoder/Demultiplexer
High-Performance Silicon-Gate CMOS
The SL74HCT138 is identical in pinout to the LS/ALS138. The SL74HCT138 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.
The SL74HCT138 decodes a three-bit Address to one-of-eight active-lot outputs. This device features three Chip Select inputs, two active-low and one active-high to facilitate the demultiplexing, cascading, and chip-selecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states.
• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 µA
ORDERING INFORMATION
SL74HCT138N Plastic
SL74HCT138D SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16 =VCC
PIN 8 = GND
FUNCTION TABLE
Inputs Outputs
CS1 CS2 CS3 A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
X X H X H X
L X X
H L L H L L H L L H L L
H L L H L L H L L H L L
X X X X X X X X X
L L L L L H L H L
L H H
H L L
H L H H H L
H H H
H H H H H H H H H H H H H H H H H H H H H H H H
L H H H H H H H H L H H H H H H H H L H H H H H H H H L H H H H
H H H H L H H H H H H H H L H H H H H H H H L H H H H H H H H L
H = high level (steady state) L = low level (steady state) X = don’t care
System Logic
SLS
Page 2
SL74HCT138
Semiconductor
MAXIMUM RATINGS*
Symbol Parameter Value Unit
VCC DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V VIN DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V
V
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
OUT
IIN DC Input Current, per Pin ±20 mA
I
DC Output Current, per Pin ±25 mA
OUT
ICC DC Supply Current, VCC and GND Pins ±50 mA PD Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750 500
Tstg Storage Temperature -65 to +150 °C
TL Lead Temperature, 1 mm from Case for 10 Seconds
260 °C
(Plastic DIP or SOIC Package)
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
VCC DC Supply Voltage (Referenced to GND) 4.5 5.5 V
VIN, V
DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V
OUT
TA Operating Temperature, All Package Types -55 +125 °C
tr, tf Input Rise and Fall Time (Figure 2) 0 500 ns
mW
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and V GND≤(VIN or V
OUT
)≤VCC.
should be constrained to the range
OUT
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
System Logic
SLS
Page 3
SL74HCT138
Semiconductor
DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)
VCC Guaranteed Limit
Symbol Parameter Test Conditions V 25 °C
to
-55°C
VIH Minimum High-Level
Input Voltage
VIL Maximum Low -Level
Input Voltage
VOH Minimum High-Level
Output Voltage
VIN=VIH or VIL
VOL Maximum Low -Level
Output Voltage
VIN=VIH or VIL
IIN Maximum Input
V
=0.1 V or VCC-0.1 V
OUT
I
≤ 20 µA
OUT
V
=0.1 V or VCC-0.1 V
OUT
I
 ≤ 20 µA
OUT
VIN=VIH or VIL
I
 ≤ 20 µA
OUT
4.5
5.5
4.5
5.5
4.5
5.5
2.0
2.0
0.8
0.8
4.4
5.4
I
 ≤ 4.0 mA
OUT
VIN=VIH or VIL
I
 ≤ 20 µA
OUT
4.5 3.98 3.84 3.7
4.5
5.5
0.1
0.1
I
≤ 4.0 mA
OUT
4.5 0.26 0.33 0.4
VIN=VCC or GND 5.5 ±0.1 ±1.0 ±1.0 µA
Leakage Current
ICC Maximum Quiescent
Supply Current
VIN=VCC or GND I
=0µA
OUT
5.5 4.0 40 160 µA
(per Package)
∆ICC Additional Quiescent
Supply Current
VIN = 2.4 V, Any One Input VIN=VCC or GND, Other
≥-55°C 25°C to
Inputs
≤85
°C
2.0
2.0
0.8
0.8
4.4
5.4
0.1
0.1
≤125
°C
2.0
2.0
0.8
0.8
4.4
5.4
0.1
0.1
125°C
Unit
V
V
V
V
mA
I
=0µA 5.5 2.9 2.4
OUT
System Logic
SLS
Page 4
SL74HCT138
Semiconductor
AC ELECTRICAL CHARACTERISTICS(V
=5.0 V, CL=50pF,Input tr=tf=6.0 ns)
CC
Guaranteed Limit
Symbol Parameter 25 °C to
≤85°C ≤125°C Unit
-55°C
, t
PLH
Maximum Propagation Delay, Input A to
PHL
30 38 45 ns
Output Y (Figures 1 and 4)
, t
PLH
Maximum Propagation Del ay , CS1 to
PHL
27 34 41 ns
Output Y (Figures 2 and 4)
, t
PLH
Maximum Output Transition Time , CS2 or CS3 to
PHL
30 38 45 ns
Output Y (Figures 3 and 4)
, t
TLH
Maximum Output Transition Time, Any Output
THL
15 19 22 ns
(Figures 2 and 4)
CIN Maximum Input Capacitance 10 10 10 pF
Power Dissipation Capacitance (Per Enabled
Typical @25°C,VCC=5.0 V
Output)
CPD Used to determine the no-load dynamic power
consumption: PD=CPDV
f+ICCVCC
CC
51 pF
SLS
Figure 1. Switching Waveforms Figure 2. Switching Waveforms
System Logic
Page 5
SL74HCT138
Semiconductor
Figure 3. Switching Waveforms Figure 4. Test Circuit
EXPANDED LOGIC DIAGRAM
SLS
System Logic
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