Datasheet SL74HC253D, SL74HC253N Datasheet (SLS)

SL74HC253

Semiconductor

Dual 4-Input Data Selector/Multiplexer with 3-State Otputs

High-Performance Silicon-Gate CMOS

The SL74HC253 is identical in pinout to the LS/ALS253. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.

The Address Inputs select one of four Data Inputs from each multiplexer. Each multiplexer has an active-low Output Enable control and a three-state noninverting output.

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 µA

• High Noise Immunity Characteristic of CMOS Devices

ORDERING INFORMATION

SL74HC253N Plastic

SL74HC253D SOIC

TA = -55° to 125° C for all packages

LOGIC DIAGRAM

PIN 16 =VCC

PIN 8 = GND

PIN ASSIGNMENT

FUNCTION TABLE

Inputs Output

A1 A0 OE Y

X X H Z

L L L D0

L H L D1 H L L D2 H H L D3

D0,D1...D3=the level of the respective Data Input

Z = high impedance X = don’t care

System Logic

SLS

SL74HC253

Semiconductor

MAXIMUM RATINGS*

Symbol Parameter Value Unit

VCC DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V VIN DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V

V

DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V

OUT

IIN DC Input Current, per Pin ±20 mA

I

DC Output Current, per Pin ±25 mA

OUT

ICC DC Supply Current, VCC and GND Pins ±50 mA PD Power Dissipation in Still Air, Plastic DIP+

SOIC Package+

750 500

Tstg Storage Temperature -65 to +150 °C

TL Lead Temperature, 1 mm from Case for 10 Seconds

260 °C

(Plastic DIP or SOIC Package)

*

Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C

SOIC Package: : - 7 mW/°C from 65° to 125°C

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Max Unit

VCC DC Supply Voltage (Referenced to GND) 2.0 6.0 V

VIN, V

DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V

OUT

TA Operating Temper ature, All Package Types -55 +125 °C

tr, tf Input Rise and Fall Time (Figure 1) VCC =2.0 V

VCC =4.5 V V

=6.0 V

CC

0 0 0

1000

500 400

mW

ns

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and V GND≤(VIN or V

OUT

)≤VCC.

should be constrained to the range

OUT

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

System Logic

SLS

SL74HC253

Semiconductor

DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)

VCC Guaranteed Limit

Symbol Parameter Test Conditions V 25 °C

to

-55°C

VIH Minimum High-Level

Input Voltage

VIL Maximum Low -Level

Input Voltage

VOH Minimum High-Level

Output Voltage

VIN=VIH or VIL

VOL Maximum Low -Level

Output Voltage

VIN=VIH or VIL

IIN Maximum Input

V

=0.1 V or VCC-0.1 V

OUT

I

≤ 20 µA

OUT

V

=0.1 V or VCC-0.1 V

OUT

I

 ≤ 20 µA

OUT

VIN=VIH or VIL

I

 ≤ 20 µA

OUT

I

 ≤ 4.0 mA

OUT

I

 ≤ 5.2 mA

OUT

VIN=VIH or VIL

I

 ≤ 20 µA

OUT

I

 ≤ 4.0 mA

OUT

I

 ≤ 5.2 mA

OUT

2.0

4.5

6.0

2.0

4.5

6.0

2.0

4.5

6.0

4.5

6.0

2.0

4.5

6.0

4.5

6.0

1.5

3.15

4.2

0.3

0.9

1.2

1.9

4.4

5.9

3.98

5.48

0.1

0.26

VIN=VCC or GND 6.0 ±0.1 ±1.0 ±1.0 µA

Leakage Current

≤85

°C

1.5

3.15

4.2

0.3

0.9

1.2

1.9

4.4

5.9

3.84

5.34

0.1

0.33

≤125

°C

1.5

3.15

4.2

0.3

0.9

1.2

1.9

4.4

5.9

3.7

5.2

0.1

0.4

Unit

V

IOZ Maximum Three-State

Leakage Current

ICC Maximum Quiescent

Supply Current (per Package)

Output in High-Impedance State VIN= VIL or VIH V

OUT=VCC

or GND

VIN=VCC or GND I

=0µA

OUT

6.0 ±0.5 ±5.0 ±10 µA

6.0 8.0 80 160 µA

System Logic

SLS

SL74HC253

Semiconductor

AC ELECTRICAL CHARACTERISTICS(C

=50pF,Input tr=tf=6.0 ns)

L

VCC Guaranteed Limit

Symbol Parameter V 25 °C to

≤85°C ≤125°C Unit

-55°C

t

, t

t

PLH

PLZ

PZL

TLH

Maximum Propagation Delay, Data to

PHL

Output Y (Figures 1 and 3)

, t

Maximum Propagation Delay , Address to

PHL

Output Y (Figures 1 and 3)

, t

Maximum Propagation Delay ,Output Enable to

PHZ

Output Y (Figures 2 and 4)

, t

Maximum Propagation Delay ,Output Enable to

PZH

Output Y (Figures 2 and 4)

, t

Maximum Output Transition Time, Any Output

THL

(Figures 1 and 3)

2.0

4.5

6.0

2.0

4.5

6.0

2.0

4.5

6.0

2.0

4.5

6.0

2.0

4.5

6.0

140

28 24

175

35 30

150

30 26

100

20 17

75 15 13

175

35 30

220

44 37

190

38 33

125

25 21

95 19 16

210

42 36

265

53 45

225

45 38

150

30 26

110

22 19

CIN Maximum Input Capacitance - 10 10 10 pF

ns

C

Maximum Three-State Output Capacitance

OUT

- 15 15 15 pF

(Output in High-Impedance State)

Power Dissipation Capacitance (Per Muliplexer) Typical @25°C,VCC=5.0 V

CPD Used to determine the no-load dynamic power

consumption: PD=CPDV

2

f+ICCVCC

CC

31 pF

Figure 1. Switching Waveforms Figure 2. Switching Waveforms

SLS

System Logic

SL74HC253

Semiconductor

Figure 3. Test Circuit Figure 4. Test Circuit

EXPANDED LOGIC DIAGRAM

SLS

System Logic