Page 1
SL4541B
Semiconductor
Programmable Timer
High-Performance Silicon-Gate CMOS
The SL4541 programmable timer consists of a 16-stage binary
counter, an oscillator that is controlled by external R-C components (2
resistors and a capacitor), an automatic power-on reset circuit, and
output control logic. The counter increments on positive-edge clock
transitons and can also be reset via the MASTER RESET input.
The output from this timer is the Q or not Q output from the 8th,
10th, 13th, or 16th counter stage. The desired stage is chosen using
time-select inputs A and B. The output is available in either of two
modes selectable via the MODE input, pin 10. When this MODE input
is a logic “1”,the output will be a continuous square wave having a
frequency equal to the oscillator frequency divided by 2N. With the
MODE input set to logic ”0” and after a MASTER RESET is initiated,
the output (assuming Q output has been selected) changes from a low
to a high state after 2
MASTER RESET pulse is applied or the MODE input is set to a logic
“1”.
Timing is initialized by setting the AUTO RESET input (pin 5) to logic “0”and turning power on. If pin 5 is set
to logic “1”, the AUTO RESET circuit is disabled and counting will not start untill after a positive MASTER
RESET pulse is applied and returns to a low level. The AUTO RESET consumes an appreciable amount of power
and should not be used if low-power operation is desired. For reliable automatic power-on reset, VCC should be
greater than 5V.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
N-1
counts and remains in that state until another
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
SL4541BN Plastic
SL4541BD SOIC
TA = -55° to 125° C for all packages
SLS
LOGIC DIAGRAM
PIN 14 =V
PIN 7 = GND
PINS 4,11 = NO CONNECTION
System Logic
CC
PIN ASSIGNMENT
NC = NO CONNECTION
Page 2
SL4541B
Semiconductor
MAXIMUM RATINGS*
Symbol Parameter Value Unit
VCC DC Supply Voltage (Referenced to GND) -0.5 to +20 V
VIN DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
V
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
OUT
IIN DC Input Current, per Pin ±10 mA
PD Power Dissipati on in Still Air, Plastic DIP+
SOIC Package+
PD Power Dissipation per Output Transistor 100 mW
Tstg Storage Temperature -65 to +150 °C
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
750
500
260 °C
mW
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
VCC DC Supply Voltage (Referenced to GND) 3.0 18 V
VIN, V
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, VIN and V
GND≤(VIN or V
Unused outputs must be left open.
DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V
OUT
TA Operating Temperature, All Package Types -55 +125 °C
This device contains protection circuitry to guard against damage due to high static voltages or electric
should be constrained to the range
OUT
)≤VCC.
OUT
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).
SLS
System Logic
Page 3
SL4541B
Semiconductor
DC ELECTRICAL CHARACTERISTICS Digital Section
VCC Guaranteed Limit
Symbol Parameter Test Conditions V ≥ -55
°C
VIH Minimum High-Level
Input Voltage
VIL Maximum Low -Level
Input Voltage
VOH Minimum High-Level
Output Voltage
VOL Maximum Low-Level
Output Voltage
IIN Maximum Input Leakage
V
=0.5V or VCC-0.5V
OUT
V
=1.0V or VCC-1.0V
OUT
V
=1.5V or VCC-1.5V
OUT
V
=0.5V or VCC-0.5V
OUT
V
=1.0V or VCC-1.0V
OUT
V
=1.5V or VCC-1.5V
OUT
VIN=GND or VCC 5.0
VIN=GND or VCC 5.0
5
10
15
5
10
15
10
15
10
15
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
VIN= GND or VCC 18 ±0.1 ±0.1 ±1.0 µA
Current
ICC Maximum Quiescent
Supply Current
(per Package)
IOL Minimum Output Low
(Sink) Current
VIN= GND or VCC 5.0
10
15
20
VIN= GND or VCC
UOL=0.4 V
UOL=0.5 V
UOL=1.5 V
5.0
10
15
5
10
20
100
1.9
5
12.6
≤ 25
°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
5
10
20
100
1.55
4
10
≤ 125
°C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
150
300
600
3000
1.08
2.8
7.2
Unit
V
V
V
V
µA
mA
IOH Minimum Output High
(Source) Current
System Logic
SLS
VIN= GND or VCC
UOH=2.5 V
UOH=4.6 V
UOH=9.5 V
UOH=13.5 V
5.0
5.0
10
15
-6.2
-1.9
-5
-12.6
-5
-1.55
-4
-10
-3
-1.08
-2.8
-7.2
mA
Page 4
SL4541B
Semiconductor
AC ELECTRICAL CHARACTERISTICS(C
=50pF, RL=200kΩ, Input tr=tf=20 ns)
L
VCC Guaranteed Limit
Symbol Parameter V ≥-55°C 25°C ≤125°C Unit
f
Maximum Clock Frequency (Figure 1) 5.0
max
t
, t
PHL
PLH
Maximum Propagation Delay,
Clock to Q (Figure 1)
10
15
5.0
10
15
1.5
4
6
10.5
3.8
2.9
1.5
4
6
10.5
3.8
2.9
0.75
2
3
21
7.6
5.8
(28)
t
Maximum Output Transition Time, Any Output
THL
(Figure 1)
t
Maximum Output Transition Time, Any Output
TLH
(Figure 1)
(216)
5.0
10
15
5.0
10
15
5.0
10
15
18
10
7.5
200
100
80
360
180
130
18
10
7.5
200
100
80
360
180
130
36
20
15
400
200
160
720
360
260
CIN Maximum Input Capacitance - 7.5 pF
MHz
ns
ns
TIMING REQUIREMENTS (C
=50pF, RL=200kΩ, Input tr=tf=20 ns)
L
VCC Guaranteed Limit
Symbol Parameter +25° C -40° C
to +85° C
tw Minimum Pulse Width, Master Reset or Clock
(Figure 1)
tr,tf Maximum Rise and Fall Time, Clock
(Figure 1)
5
10
15
5
10
900
300
225
1800
600
450
Unlimited
15
Unit
ns
µs
SLS
System Logic
Page 5
SL4541B
Semiconductor
Figure 1. Switching Weveforms
FREQUENCY SELECTION TABLE
INPUTS No. of Stages Count
A B N 2N
L L 13 8192
L H 10 1024
H L 8 256
H H 16 65536
EXPANDED LOGIC DIAGRAM
FUNCTION TABLE
PIN STATE
0 1
5 Auto Reset On Auto Reset Disable
6 Master Reset Off Master Reset On
9 Output Initially
Low After Reset
(Q)
10 Single Transition
Mode
Output Initially High
After Reset (not Q)
Recycle Mode
SLS
System Logic
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