
Dual Up-Counter
High-Voltage Silicon-Gate CMOS
The SL4518B Dual BCD Up-Counter consists two identical,
internally synchronous 4-stage counters. The counter stages are Dtype flip -flops having interchangeable CLOCK and ENABLE lines for
incrementing on either the positive-going or negative-going transition.
For single-unit operation the ENABLE input is maintained high and the
counter advances on each positive-going transition of the CLOCK. The
counters are cleared by high levels on their RESET lines.
The counter can be cascaded in the ripple mode by connecting Q4
to the enable input of the subsequent counter while the CLOCK input
of the latter is held low.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
SL4518B
ORDERING INFORMATION
SL4518BN Plastic
SL4518BD SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16=VCC
PIN 8= GND
FUNCTION TABLE
Inputs Outputs
CLOCK ENABLE RESET Mode
H L Increment Counter
L L Increment Counter
X L No Change
X L No Change
L L No Change
H L No Change
SLS
X X H Q1 thru Q4=L
X = don’t care
System Logic

SL4518B
MAXIMUM RATINGS*
Symbol Parameter Value Unit
VCC DC Supply Voltage (Referenced to GND) -0.5 to +20 V
VIN DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
V
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
OUT
IIN DC Input Current, per Pin ±10 mA
PD Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
PD Power Dissipation per Output Transistor 100 mW
Tstg Storage Temperature -65 to +150 °C
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
750
500
260 °C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
VCC DC Supply Voltage (Referenced to GND) 3.0 18 V
VIN, V
DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V
OUT
TA Operating Temperature, All Package Types -55 +125 °C
mW
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, VIN and V
GND≤(VIN or V
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).
Unused outputs must be left open.
OUT
)≤VCC.
should be constrained to the range
OUT
System Logic
SLS

DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)
VCC Guaranteed Limit
SL4518B
Symbol Parameter Test Conditions V ≥-55°C 25°C ≤125
°C
VIH Minimum High-Level
Input Voltage
VIL Maximum Low -Level
Input Voltage
VOH Minimum High-Level
Output Voltage
VOL Maximum Low -Level
Output Voltage
IIN Maximum Input
V
= 0.5 V or V
OUT
V
= 1.0 V or V
OUT
V
= 1.5 V or V
OUT
V
= 0.5 V or V
OUT
V
= 1.0 V or V
OUT
V
= 1.5 V or V
OUT
VIN=GND or VCC 5.0
VIN=GND or VCC 5.0
- 0.5V
CC
- 1.0 V
CC
- 1.5V
CC
- 0.5V
CC
- 1.0 V
CC
- 1.5V
CC
5.0
10
15
5.0
10
15
10
15
10
15
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
VIN= GND or VCC 18 ±0.1 ±0.1 ±1.0 µA
Leakage Current
ICC Maximum Quiescent
Supply Current
(per Package)
IOL Minimum Output Low
(Sink) Current
VIN= GND or VCC 5.0
10
15
20
VIN= GND or VCC
UOL=0.4 V
UOL=0.5 V
UOL=1.5 V
5.0
10
15
5
10
20
100
0.64
1.6
4.2
5
10
20
100
0.51
1.3
3.4
150
300
600
3000
0.36
0.9
2.4
Unit
V
V
V
V
µA
mA
IOH Minimum Output High
(Source) Current
System Logic
SLS
VIN= GND or VCC
UOH=2.5 V
UOH=4.6 V
UOH=9.5 V
UOH=13.5 V
5.0
5.0
10
15
-2
-0.64
-1.6
-4.2
-1.6
-0.51
-1.3
-3.4
-1.15
-0.36
-0.9
-2.4
mA

SL4518B
AC ELECTRICAL CHARACTERISTICS(C
=50pF, RL=200kΩ, Input tr=tf=20 ns)
L
VCC Guaranteed Limit
Symbol Parameter V ≥-55°C 25°C ≤125°C Unit
f
Maximum Clock Frequency, (Figure 1) 5.0
max
t
, t
PHL
Maximum Propagation Delay, Clock or Enable to
PLH
Output (Figures 1,3)
t
Maximum Propagation Delay, Reset to Output
PHL
(Figure 2)
t
, t
THL
Maximum Output Transition Time, Any Output
TLH
(Figure 1)
10
15
5.0
10
15
5.0
10
15
5.0
10
15
1.5
3
4
560
230
160
650
225
170
200
100
80
1.5
3
4
560
230
160
650
225
170
200
100
80
0.75
1.5
2
1120
460
320
1300
450
340
400
200
160
CIN Maximum Input Capacitance - 7.5 pF
TIMING REQUIREMENTS(C
=50pF, RL=200 kΩ, Input tr=tf=20 ns)
L
MHz
ns
ns
ns
VCC Guaranteed Limit
Symbol Parameter V ≥-55°C 25°C ≤125°C Unit
tw Minimum Pulse Width, Clock (Figure 1) 5.0
tw Minimum Pulse Width, Reset (Figure 2) 5.0
tw Minimum Pulse Width, Enable (Figure 3) 5.0
tr, tf Maximum Input Rise and Fall Times
(Figure 1)
10
15
10
15
10
15
5.0
10
15
200
100
70
250
110
80
400
200
140
15
5
5
200
100
70
250
110
80
400
200
140
15
5
5
400
200
140
500
220
160
800
400
280
15
5
5
ns
ns
ns
µs
SLS
System Logic

SL4518B
Figure 1. Switching Waveforms Figure 2. Switching Waveforms
Figure 3. Switching Waveforms
TIMING DIAGRAM
EXPANDED LOGIC DIAGRAM
(1/2 of the Device)
SLS
System Logic