Datasheet SL4028BN, SL4028BD Datasheet (SLS)

Semiconductor

BCD-to-Decimal Decoder

High-Voltage Silicon-Gate CMOS

The SL4028B types are BCD-to-decimal or binary -to-octal decoders consisting of buffering on all 4 inputs, decoding-logic gates, and 10 output buffers. A BCD code applied to the four inputs, A0 to A3 results in a high level at the selected one of 10 decimal decoded outputs. Similarly, a 3-bit binary code applied to inputs A0 through A2 is decoded in octal code at output 0 to7 if A3=“0”. High drive capability is provided at all outputs to enhance dc and dynamic performance in high fan-out applications.

• BCD-to-decimal decoding or binary-to-octal decoding

• Operating Voltage Range: 3.0 to 18 V

• Maximum input current of 1 µA at 18 V over full package-

temperature range; 100 nA at 18 V and 25°C

• Noise margin (over full package temperature range):

1.0 V min @ 5.0 V supply

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

SL4028B

ORDERING INFORMATION

SL4028BN Plastic

SL4028BD SOIC

TA = -55° to 125° C for all packages

PIN ASSIGNMENT

SLS

LOGIC DIAGRAM

PIN 16=VCC

PIN 8= GND

System Logic

SL4028B

Semiconductor

MAXIMUM RATINGS*

Symbol Parameter Value Unit

VCC DC Supply Voltage (Referenced to GND) -0.5 to +20 V VIN DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V

V

DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V

OUT

IIN DC Input Current, per Pin ±10 mA PD Power Dissipation in Still Air, Plastic DIP+

SOIC Package+

PD Power Dissipation per Output Transistor 100 mW

Tstg Storage Temperature -65 to +150 °C

TL Lead Temperature, 1 mm from Case for 10 Seconds

(Plastic DIP or SOIC Package)

*

Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C

SOIC Package: : - 7 mW/°C from 65° to 125°C

750 500

260 °C

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Max Unit

VCC DC Supply Voltage (Referenced to GND) 3.0 18 V

VIN, V

DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V

OUT

TA Operating Temperature, All Package Types -55 +125 °C

mW

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and V GND≤(VIN or V

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

OUT

)≤VCC.

should be constrained to the range

OUT

System Logic

SLS

Semiconductor

DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)

VCC Guaranteed Limit

SL4028B

Symbol Parameter Test Conditions V ≥-55°C 25°C ≤125

°C

VIH Minimum High-Level

Input Voltage

VIL Maximum Low -Level

Input Voltage

VOH Minimum High-Level

Output Voltage

VOL Maximum Low -Level

Output Voltage

IIN Maximum Input

V

= 0.5 V or V

OUT

V

= 1.0 V or V

OUT

V

= 1.5 V or V

OUT

V

= 0.5 V or V

OUT

V

= 1.0 V or V

OUT

V

= 1.5 V or V

OUT

VIN=GND or VCC 5.0

- 0.5V

CC

- 1.0 V

CC

- 1.5V

CC

- 0.5V

CC

- 1.0 V

CC

- 1.5V

CC

5.0 10 15

10 15

3.5 7

11

1.5 3 4

4.95

9.95

14.95

0.05

3.5 7

11

1.5 3 4

4.95

9.95

14.95

0.05

3.5 7

11

1.5 3 4

4.95

9.95

14.95

0.05

VIN= GND or VCC 18 ±0.1 ±0.1 ±1.0 µA

Leakage Current

ICC Maximum Quiescent

Supply Current (per Package)

IOL Minimum Output Low

(Sink) Current

VIN= GND or VCC 5.0

10 15 20

VIN= GND or VCC UOL=0.4 V UOL=0.5 V UOL=1.5 V

5.0 10 15

5 10 20

100

0.64

1.6

4.2

5 10 20

100

0.51

1.3

3.4

150 300 600

3000

0.36

0.9

2.4

Unit

V

µA

mA

IOH Minimum Output High

(Source) Current

System Logic

SLS

VIN= GND or VCC UOH=2.5 V UOH=4.6 V UOH=9.5 V UOH=13.5 V

5.0

5.0 10 15

-2

-0.64

-1.6

-4.2

-1.6

-0.51

-1.3

-3.4

-1.15

-0.36

-0.9

-2.4

mA

SL4028B

Semiconductor

AC ELECTRICAL CHARACTERISTICS(C

VCC Guaranteed Limit

Symbol Parameter V ≥-55°C 25°C ≤125°C Unit

t

, t

PHL

t

THL

Maximum Propagation Delay, Input A to Output

PLH

Y (Figure 1)

, t

Maximum Output Transition Time, Any Output

TLH

(Figure 1)

CIN Maximum Input Capacitance - 7.5 pF

=50pF, RL=200kΩ, Input tr=tf=20 ns)

L

5.0 10 15

350 160 120

200 100

80

350 160 120

200 100

80

700 320 240

400 200 160

FUNCTION TABLE

Inputs Outputs

A3 A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9

L L L L H L L L L L L L L L

ns

L L L H L H L L L L L L L L L L H L L L H L L L L L L L L L H H L L L H L L L L L L L H L L L L L L H L L L L L L H L H L L L L L H L L L L L H H L L L L L L L H L L L

L H H H L L L L L L L H L L H L L L L L L L L L L L H L H L L H L L L L L L L L L H H L H L L L L L L L L L L L H L H H L L L L L L L L L L H H L L L L L L L L L L L L H H L H L L L L L L L L L L H H H L L L L L L L L L L L H H H H L L L L L L L L L L

System Logic

SLS

SL4028B

Semiconductor

Figure 1. Switching Waveforms

EXPANDED LOGIC DIAGRAM

System Logic

SLS