Datasheet IRLZ24S, IRLZ24L, SiHLZ24S, SiHLZ24L DataSheet (Vishay)

D2PAK (TO-263)

G

D

S

I2PAK (TO-262)

G

D

S

IRLZ24S, IRLZ24L, SiHLZ24S, SiHLZ24L

Vishay Siliconix

Power MOSFET

PRODUCT SUMMARY

VDS (V) 60

()V

R

DS(on)

Q

(Max.) (nC) 18

g

Q

(nC) 4.5

gs

Q

(nC) 12

gd

Configuration Single

= 5 V 0.10

GS

D

FEATURES

• Halogen-free According to IEC 61249-2-21
Definition

• Surface Mount

• Available in Tape and Reel

• Dynamic dV/dt Rating

• Logic-Level Gate Drive

•R

Specified at VGS = 4 V and 5 V

DS (on)

• 175°C Operating Temperature

•Fast Switching

• Compliant to RoHS Directive 2002/95/EC

DESCRIPTION

Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and

G

cost-effectiveness.

2

The D

PAK is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible

S

N-Channel MOSFET

on-resistance in any existing surface mount package. The
D2PAK is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0 W in a typical surface mount application.
The through-hole version (IRLZ24L, SiHLZ24L) is available
for low-profile application.

ORDERING INFORMATION

Package D2PAK (TO-263) I2PAK (TO-262)
Lead (Pb)-free and Halogen-free SiHLZ24S-GE3 SiHLZ24L-GE3

Lead (Pb)-free

- IRLZ24LPbF

- SiHLZ24L-E3

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V
Gate-Source Voltage V

= 25 °C

T

Continuous Drain Current V

Pulsed Drain Current
Linear Derating Factor 0.40
Linear Derating Factor (PCB Mount)
Single Pulse Avalanche Energy
Maximum Power Dissipation T
Maximum Power Dissipation (PCB Mount)
Peak Diode Recovery dV/dt
Operating Junction and Storage Temperature Range T
Soldering Recommendations (Peak Temperature) for 10 s 300

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V

= 25 V, starting TJ = 25 °C, L = 444 μH, Rg = 25 , IAS = 17 A (see fig. 12).

DD

c. I

 17 A, dI/dt  140 A/μs, VDD  VDS, TJ  175 °C.

SD

d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material)

* Pb containing terminations are not RoHS compliant, exemptions may apply

Document Number: 90416
S11-1044-Rev. C, 30-May-11 1

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

a

e

b

e

c

This document is subject to change without notice.

GS

at 5 V

C

= 100 °C 12

C

= 25 °C

C

TA = 25 °C 3.7

www.vishay.com

DS

± 10

GS

I

D

IDM 68

E

AS

P

D

dV/dt 4.5 V/ns

, T

J

stg

60

17

0.025
110 mJ

60

- 55 to + 175

d

www.vishay.com/doc?91000

V

AT

W/°C

W

°C

D

S

G

IRLZ24S, IRLZ24L, SiHLZ24S, SiHLZ24L

Vishay Siliconix

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient R
Maximum Junction-to-Ambient

(PCB Mount)

a

Maximum Junction-to-Case (Drain) R

thJA

R

thJA

thJC

Note

a. When mounted on 1" square PCB (FR-4 or G-10 material).

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage V

V

Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.060 - V/°C

DS

Gate-Source Threshold Voltage V

Gate-Source Leakage I

Zero Gate Voltage Drain Current I

Drain-Source On-State Resistance R

Forward Transconductance g

Dynamic

Input Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Gate-Drain Charge Q

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

Dynamic

Internal Drain Inductance L

Internal Source Inductance L

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current I

Pulsed Diode Forward Current

a

Body Diode Voltage V

Body Diode Reverse Recovery Time t

Body Diode Reverse Recovery Charge Q

Forward Turn-On Time t

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.

www.vishay.com Document Number: 90416
2 S11-1044-Rev. C, 30-May-11

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

DS

GS(th)

V

GSS

DSS

V

VGS = 5 V ID = 10 A

DS(on)

fs

iss

- 360 -

oss

-53-

rss

g

--4.5

gs

--12

gd

d(on)

r

-23-

d(off)

-41-

f

D

V

GS

V

GS

Between lead,
6 mm (0.25") from
package and center of

S

S

I

SM

SD

rr

rr

on

die contact

MOSFET symbol
showing the
integral reverse
p - n junction diode

TJ = 25 °C, IF = 17 A, dI/dt = 100 A/μs

This document is subject to change without notice.

-62

-40

°C/W

-2.5

VGS = 0, ID = 250 μA 60 - - V

VDS = VGS, ID = 250 μA 1.0 - 2.0 V

= ± 10 V - - ± 100 nA

GS

VDS = 60 V, VGS = 0 V - - 25

= 48 V, VGS = 0 V, TJ = 150 °C - - 250

DS

= 4 V ID = 8.5 A

VDS = 25 V, ID = 10 A

b

VGS = 0 V,

V

= 25 V,

DS

f = 1.0 MHz, see fig. 5

b

b

- - 0.10

- - 0.14

7.3 - - S

- 870 -

--18

= 17 A, VDS = 48 V,

I

= 5 V

D

see fig. 6 and 13

b

-11-

V

= 30 V, ID = 17 A,

DD

R

= 9 , RD = 1.7 , see fig. 10

g

b

- 110 -

-4.5-

-7.5-

G

TJ = 25 °C, IS = 17 A, VGS = 0 V

D

S

b

--17

--68

--1.5V

- 110 260 ns

b

- 0.49 1.5 μC

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

www.vishay.com/doc?91000

μA



pFOutput Capacitance C

nC Gate-Source Charge Q

ns

nH

A

IRLZ24S, IRLZ24L, SiHLZ24S, SiHLZ24L

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Vishay Siliconix

Fig. 1 - Typical Output Characteristics, TC = 25 °C

Fig. 2 - Typical Output Characteristics, T

= 175 °C

C

Fig. 3 - Typical Transfer Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

Document Number: 90416 www.vishay.com
S11-1044-Rev. C, 30-May-11 3

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

This document is subject to change without notice.

www.vishay.com/doc?91000

IRLZ24S, IRLZ24L, SiHLZ24S, SiHLZ24L

Vishay Siliconix

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

www.vishay.com Document Number: 90416
4 S11-1044-Rev. C, 30-May-11

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

This document is subject to change without notice.

www.vishay.com/doc?91000

V

DS

90 %

10 %

V

GS

t

d(on)

t

r

t

d(off)

t

f

IRLZ24S, IRLZ24L, SiHLZ24S, SiHLZ24L

Vishay Siliconix

R

D.U.T.

D

+

V

-

DD

V

DS

V

GS

R

g

5 V

Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

Fig. 10a - Switching Time Test Circuit

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig. 10b - Switching Time Waveforms

Document Number: 90416 www.vishay.com
S11-1044-Rev. C, 30-May-11 5

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

www.vishay.com/doc?91000

R

g

I

AS

0.01 W

t

p

D.U.T

L

V

DS

+

-

V

DD

5 V

Var y t

p

to obtain

required I

AS

D.U.T.

3 mA

V

GS

V

DS

I

G

I

D

0.3 µF

0.2 µF

50 kΩ

12 V

Current regulator

Current sampling resistors

Same type as D.U.T.

+

-

IRLZ24S, IRLZ24L, SiHLZ24S, SiHLZ24L

Vishay Siliconix

Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms

V

DS

t

p

V

DS

I

AS

V

DD

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Q

G

Q

GD

Charge

This document is subject to change without notice.

www.vishay.com/doc?91000

5 V

Q

GS

V

G

www.vishay.com Document Number: 90416
6 S11-1044-Rev. C, 30-May-11

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit

IRLZ24S, IRLZ24L, SiHLZ24S, SiHLZ24L

Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

D.U.T.

+

-

R

g

Driver gate drive

P.W.

+

-

Period

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

• dV/dt controlled by R

• Driver same type as D.U.T.

I

controlled by duty factor “D”

•

SD

• D.U.T. - device under test

-

D =

g

P.W.

Period

+

+

V

DD

-

= 10 Va

V

GS

D.U.T. l

waveform

SD

Reverse
recovery
current

Re-applied
voltage

D.U.T. V

Inductor current

Note

a. V

waveform

DS

= 5 V for logic level devices

GS

Body diode forward

current

dI/dt

Diode recovery

dV/dt

Body diode forward drop

Ripple ≤ 5 %

V

DD

I

SD

Fig. 14 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?90416

.

Document Number: 90416 www.vishay.com
S11-1044-Rev. C, 30-May-11 7

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

www.vishay.com/doc?91000

TO-252AA (HIGH VOLTAGE)

E1

Package Information

Vishay Siliconix

E

b3

L3

D1

A

c

MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX.

E 6.40 6.73 0.252 0.265

L 1.40 1.77 0.055 0.070

L1 2.743 REF 0.108 REF

L2 0.508 BSC 0.020 BSC

L3 0.89 1.27 0.035 0.050

L4 0.64 1.01 0.025 0.040

D 6.00 6.22 0.236 0.245

H 9.40 10.40 0.370 0.409

b 0.64 0.88 0.025 0.035

b2 0.77 1.14 0.030 0.045

b3 5.21 5.46 0.205 0.215

e 2.286 BSC 0.090 BSC

A 2.20 2.38 0.087 0.094

A1 0.00 0.13 0.000 0.005

c 0.45 0.60 0.018 0.024

c2 0.45 0.58 0.018 0.023

D1 5.30 - 0.209 -

E1 4.40 - 0.173 -

θ 0' 10' 0' 10'

ECN: S-81965-Rev. A, 15-Sep-08
DWG: 5973

Notes

1. Package body sizes exclude mold flash, protrusion or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 0.10 mm per side.

2. Package body sizes determined at the outermost extremes of the plastic body exclusive of mold flash, gate burrs and interlead flash, but
including any mismatch between the top and bottom of the plastic body.

3. The package top may be smaller than the package bottom.

4. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.10 mm total in excess of "b" dimension at maximum
material condition. The dambar cannot be located on the lower radius of the foot.

Document Number: 91344 www.vishay.com
Revision: 15-Sep-08 1

D

b

c2

A1

L1

L

θ

L2

b2

e

H

L4

TO-251AA (HIGH VOLTAGE)

Package Information

Vishay Siliconix

4

E1

View A - A

Thermal PAD

D1

4

(Datum A)

3

E

b4

θ2

5

C

L3

L1

B

B

2 x e

Lead tip

A

4

C

3 x b2

3 x b

0.010 C BMA

0.010 BA

L2

B

D

3

L

M

0.25

4

0.25

Plating

(c)

Section B - B and C - C

C

5

b1, b3

(b, b2)

Base
metal

c1

A

c2

θ1

5

A

C

Seating
plane

A

A1

c

MILLIMETERS INCHES MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.

A 2.18 2.39 0.086 0.094 D1 5.21 - 0.205 -

A1 0.89 1.14 0.035 0.045 E 6.35 6.73 0.250 0.265

b 0.64 0.89 0.025 0.035 E1 4.32 - 0.170 -

b1 0.65 0.79 0.026 0.031 e 2.29 BSC 2.29 BSC

b2 0.76 1.14 0.030 0.045 L 8.89 9.65 0.350 0.380

b3 0.76 1.04 0.030 0.041 L1 1.91 2.29 0.075 0.090

b4 4.95 5.46 0.195 0.215 L2 0.89 1.27 0.035 0.050

c 0.46 0.61 0.018 0.024 L3 1.14 1.52 0.045 0.060

c1 0.41 0.56 0.016 0.022 θ1 0' 15' 0' 15'

c2 0.46 0.86 0.018 0.034 θ2 25' 35' 25' 35'

D 5.97 6.22 0.235 0.245

ECN: S-82111-Rev. A, 15-Sep-08
DWG: 5968

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimension are shown in inches and millimeters.

3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.13 mm (0.005") per side. These dimensions are measured at the
outermost extremes of the plastic body.

4. Thermal pad contour optional with dimensions b4, L2, E1 and D1.

5. Lead dimension uncontrolled in L3.

6. Dimension b1, b3 and c1 apply to base metal only.

7. Outline conforms to JEDEC outline TO-251AA.

Document Number: 91362 www.vishay.com
Revision: 15-Sep-08 1

I2PAK (TO-262) (HIGH VOLTAGE)

(Datum A)

E

L1

Package Information

Vishay Siliconix

A

A

B

c2

A

E

D

L2

0.010 A B

Lead tip

B

2 x e

M

Seating

plane

C

C

B

M

3 x b2

3 x b

L

A1

A

E1

Section A - A

Plating

c

b1, b3

(b, b2)

Section B - B and C - C

Scale: None

c

D1

Base
metal

c1

MILLIMETERS INCHES MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.

A 4.06 4.83 0.160 0.190 D 8.38 9.65 0.330 0.380

A1 2.03 3.02 0.080 0.119 D1 6.86 - 0.270 -

b 0.51 0.99 0.020 0.039 E 9.65 10.67 0.380 0.420

b1 0.51 0.89 0.020 0.035 E1 6.22 - 0.245 -

b2 1.14 1.78 0.045 0.070 e 2.54 BSC 0.100 BSC

b3 1.14 1.73 0.045 0.068 L 13.46 14.10 0.530 0.555

c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.065

c1 0.38 0.58 0.015 0.023 L2 3.56 3.71 0.140 0.146

c2 1.14 1.65 0.045 0.065

ECN: S-82442-Rev. A, 27-Oct-08
DWG: 5977

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost
extremes of the plastic body.

3. Thermal pad contour optional within dimension E, L1, D1, and E1.

4. Dimension b1 and c1 apply to base metal only.

Document Number: 91367 www.vishay.com
Revision: 27-Oct-08 1

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Vishay

Disclaimer



ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.

Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of
typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding
statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a
particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk.
Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for
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Revision: 13-Jun-16

1

Document Number: 91000