Datasheet IRFR420, IRFU420, SiHFR420, SiHFU420 DataSheet (Vishay)

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IRFR420, IRFU420, SiHFR420, SiHFU420

Vishay Siliconix

Power MOSFET

PRODUCT SUMMARY

VDS (V) 500

R

()V

DS(on)

Q

max. (nC) 19

g

Q

(nC) 3.3

gs

Q

(nC) 13

gd

Configuration Single

DPAK

(TO-252)

D

IPAK

(TO-251)

D

= 10 V 3.0

GS

G

D

FEATURES

• Dynamic dV/dt rating

• Repetitive avalanche rated

• Surface mount (IRFR420, SiHFR420)

• Straight lead (IRFU420, SiHFU420)

• Available in tape and reel

• Fast switching

• Ease of paralleling

• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912

DESCRIPTION

Third generation power MOSFETs from Vishay provide the

S

G

S

D

G

N-Channel MOSFET

S

designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The DPAK is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU, SiHFU series) is for through-hole
mounting applications. Power dissipation levels up to 1.5 W
are possible in typical surface mount applications.

ORDERING INFORMATION

Package DPAK (TO-252) DPAK (TO-252) DPAK (TO-252) DPAK (TO-252) IPAK (TO-251)

Lead (Pb)-free and Halogen-free SiHFR420-GE3 SiHFR420TR-GE3

Lead (Pb)-free IRFR420PbF IRFR420TRPbF

Note

a. See device orientation.

a

SiHFR420TRL-GE3 aSiHFR420TRR-GE3 aSiHFU420-GE3

a

IRFR420TRLPbF a IRFR420TRRPbF a IRFU420PbF

Available

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V

Gate-Source Voltage V

T

= 25 °C

Continuous Drain Current V

Pulsed Drain Current

a

at 10 V

GS

C

= 100 °C 1.5

C

DS

± 20

GS

I

D

IDM 8.0

Linear Derating Factor 0.33

Linear Derating Factor (PCB mount)

Single Pulse Avalanche Energy

Repetitive Avalanche Current

Repetitive Avalanche Energy

Maximum Power Dissipation T

Maximum Power Dissipation (PCB mount)

Peak Diode Recovery dV/dt

Operating Junction and Storage Temperature Range T

Soldering Recommendations (Peak temperature)

e

b

a

a

= 25 °C

e

c

d

C

TA = 25 °C 2.5

for 10 s 260

E

AS

I

AR

E

AR

P

D

dV/dt 3.5 V/ns

, T

J

stg

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V

= 50 V, starting TJ = 25 °C, L = 124 mH, Rg = 25 , IAS = 2.4 A (see fig. 12).

DD

c. I

 2.4 A, dI/dt  50 A/μs, VDD  VDS, TJ  150 °C.

SD

d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).

S16-1522-Rev. E, 08-Aug-16

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500

2.4

0.020

400 mJ

2.4 A

4.2 mJ

42

-55 to +150

Document Number: 91275

V

AT

W/°C

W

°C

IRFR420, IRFU420, SiHFR420, SiHFU420

D

S

G

S

D

G

www.vishay.com

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP MAX. UNIT

Maximum Junction-to-Ambient R

a

Maximum Junction-to-Case (Drain) R

thJA

R

thJA

thJC

- 110

-50

-3.0

Note

a. When mounted on 1" square PCB (FR-4 or G-10 material).

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage V

V

Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.59 - V/°C

DS

Gate-Source Threshold Voltage V

Gate-Source Leakage I

Zero Gate Voltage Drain Current I

Drain-Source On-State Resistance R

Forward Transconductance g

DS

GS(th)

V

GSS

DSS

VGS = 10 V ID =1.4 A

DS(on)

fs

Dynamic

Input Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Gate-Drain Charge Q

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

Internal Drain Inductance L

iss

-92-

oss

-37-

rss

g

--3.3

gs

--13

gd

d(on)

r

-33-

d(off)

-16-

f

D

Between lead,
6 mm (0.25") from
package and center of

Internal Source Inductance L

S

die contact

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current I

Pulsed Diode Forward Current

a

Body Diode Voltage V

Body Diode Reverse Recovery Time t

Body Diode Reverse Recovery Charge Q

Forward Turn-On Time t

S

I

SM

SD

rr

rr

on

MOSFET symbol
showing the 
integral reverse
p - n junction diode

TJ = 25 °C, IF = 2.1 A, dI/dt = 100 A/μs

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.

VGS = 0 V, ID = 250 μA 500 - - V

VDS = VGS, ID = 250 μA 2.0 - 4.0 V

= ± 20 V - - ± 100 nA

GS

VDS = 500 V, VGS = 0 V - - 25

= 400 V, VGS = 0 V, TJ = 125 °C - - 250

V

DS

b

VDS = 50 V, ID = 1.4 A 1.5 - - S

VGS = 0 V,

V

= 25 V,

DS

f = 1.0 MHz, see fig. 5

= 2.1 A, VDS = 400 V,

I

= 10 V

V

GS

V

R

= 18 , RD = 120 , see fig. 10

g

TJ = 25 °C, IS = 2.4 A, VGS = 0 V

D

see fig. 6 and 13

= 250 V, ID = 2.1 A,

DD

b

b

b

b

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Vishay Siliconix

°C/WMaximum Junction-to-Ambient (PCB mount)

--3.0

- 360 -

--19

-8.0-

-8.6-

-4.5-

-7.5-

--2.4

--8.0

--1.6V

- 260 520 ns

-0.701.4μC

μA

pFOutput Capacitance C

nC Gate-Source Charge Q

ns

nH

A

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

For technical questions, contact: [e-mail]

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Document Number: 91275

IRFR420, IRFU420, SiHFR420, SiHFU420

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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Vishay Siliconix

Fig. 1 - Typical Output Characteristics, TC = 25 °C

Fig. 2 - Typical Output Characteristics, T

= 150 °C

C

Fig. 3 - Typical Transfer Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

S16-1522-Rev. E, 08-Aug-16

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Document Number: 91275

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IRFR420, IRFU420, SiHFR420, SiHFU420

Vishay Siliconix

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

S16-1522-Rev. E, 08-Aug-16

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Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

R

D

V

GS

R

g

D.U.T.

10 V

+

-

V

DS

V

DD

V

DS

90 %

10 %

V

GS

t

d(on)

t

r

t

d(off)

t

f

R

g

I

AS

0.01 Ω

t

p

D.U.T.

L

V

DS

+

-

V

DD

10 V

Var y tp to obtain
required I

AS

IRFR420, IRFU420, SiHFR420, SiHFU420

Vishay Siliconix

Fig. 10a - Switching Time Test Circuit

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig. 10b - Switching Time Waveforms

V

DS

t

p

V

DD

V

DS

S16-1522-Rev. E, 08-Aug-16

Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms

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I

AS

Document Number: 91275

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Q

GS

Q

GD

Q

G

V

G

Charge

10 V

IRFR420, IRFU420, SiHFR420, SiHFU420

Vishay Siliconix

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Current regulator

Same type as D.U.T.

50 kΩ

0.2 µF

12 V

V

GS

0.3 µF

D.U.T.

3 mA

I

G

Current sampling resistors

I

D

+

-

Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit

V

DS

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IRFR420, IRFU420, SiHFR420, SiHFU420

Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

D.U.T.

+

-

R

g

Driver gate drive

P.W.

+

-

Period

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

• dV/dt controlled by R

• Driver same type as D.U.T.

I

controlled by duty factor “D”

•

SD

• D.U.T. - device under test

-

D =

g

P.W.

Period

+

+

V

DD

-

V

= 10 Va

GS

D.U.T. l

Reverse
recovery
current

D.U.T. V

Re-applied
voltage

Inductor current

Note

a. V

waveform

SD

Body diode forward

waveform

DS

Body diode forward drop

Ripple ≤ 5 %

= 5 V for logic level devices

GS

current

dI/dt

Diode recovery

dV/dt

V

DD

I

SD

Fig. 14 - For N-Channel












Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91275

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.

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Package Information

Vishay Siliconix

TO-252AA Case Outline

E

b3

L3

A

C2

DIM. MIN. MAX. MIN. MAX.

MILLIMETERS INCHES

A 2.18 2.38 0.086 0.094

A1 - 0.127 - 0.005

b 0.64 0.88 0.025 0.035

D

H

b2 0.76 1.14 0.030 0.045

b3 4.95 5.46 0.195 0.215

C 0.46 0.61 0.018 0.024

C2 0.46 0.89 0.018 0.035

L4

L5

L

D 5.97 6.22 0.235 0.245

D1 4.10 - 0.161 -

E 6.35 6.73 0.250 0.265

b

e1

b2

e

C

A1

E1 4.32 - 0.170 -

H 9.40 10.41 0.370 0.410

e 2.28 BSC 0.090 BSC

e1 4.56 BSC 0.180 BSC

gage plane height (0.5 mm)

L 1.40 1.78 0.055 0.070

L3 0.89 1.27 0.035 0.050

D1

L4 - 1.02 - 0.040

L5 1.01 1.52 0.040 0.060

ECN: T16-0236-Rev. P, 16-May-16

E1

DWG: 5347

Notes

• Dimension L3 is for reference only.

Revision: 16-May-16

1

Document Number: 71197

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TO-251AA (HIGH VOLTAGE)

Package Information

Vishay Siliconix

4

E1

View A - A

Thermal PAD

D1

4

(Datum A)

3

E

b4

θ2

5

C

L3

L1

B

B

2 x e

Lead tip

A

4

L2

D

C

L

3 x b2

3 x b

0.010 C BMA

0.010 BA

B

3

M

0.25

C

4

0.25

Plating

(c)

Section B - B and C - C

5

b1, b3

(b, b2)

Base
metal

c1

A

c2

θ1

5

A

C

Seating
plane

A

A1

c

MILLIMETERS INCHES MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.

A 2.18 2.39 0.086 0.094 D1 5.21 - 0.205 -

A1 0.89 1.14 0.035 0.045 E 6.35 6.73 0.250 0.265

b 0.64 0.89 0.025 0.035 E1 4.32 - 0.170 -

b1 0.65 0.79 0.026 0.031 e 2.29 BSC 2.29 BSC

b2 0.76 1.14 0.030 0.045 L 8.89 9.65 0.350 0.380

b3 0.76 1.04 0.030 0.041 L1 1.91 2.29 0.075 0.090

b4 4.95 5.46 0.195 0.215 L2 0.89 1.27 0.035 0.050

c 0.46 0.61 0.018 0.024 L3 1.14 1.52 0.045 0.060

c1 0.41 0.56 0.016 0.022 θ1 0' 15' 0' 15'

c2 0.46 0.86 0.018 0.034 θ2 25' 35' 25' 35'

D 5.97 6.22 0.235 0.245

ECN: S-82111-Rev. A, 15-Sep-08
DWG: 5968

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimension are shown in inches and millimeters.

3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.13 mm (0.005") per side. These dimensions are measured at the
outermost extremes of the plastic body.

4. Thermal pad contour optional with dimensions b4, L2, E1 and D1.

5. Lead dimension uncontrolled in L3.

6. Dimension b1, b3 and c1 apply to base metal only.

7. Outline conforms to JEDEC outline TO-251AA.

Document Number: 91362 www.vishay.com
Revision: 15-Sep-08 1

RECOMMENDED MINIMUM PADS FOR DPAK (TO-252)

0.224

(5.690)

Application Note 826

Vishay Siliconix

0.243
(6.180)

Return to Index

Return to Index

0.420
(10.668)

0.180

(4.572)

Recommended Minimum Pads

Dimensions in Inches/(mm)

0.087

0.090

0.055

(1.397)

(2.202)

(2.286)

APPLICATION NOTE

Document Number: 72594 www.vishay.com
Revision: 21-Jan-08 3

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

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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a
particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s
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including but not limited to the warranty expressed therein.

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
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Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for
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Revision: 13-Jun-16

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Document Number: 91000