Page 1
IRFPS43N50K, SiHFPS43N50K
Available
RoHS*
COMPLIANT
Power MOSFET
Vishay Siliconix
PRODUCT SUMMARY
VDS (V) 500
R
()V
DS(on)
Q
(Max.) (nC) 350
g
Q
(nC) 85
gs
Q
(nC) 180
gd
= 10 V 0.078
GS
Configuration Single
Super-247
G
S
D
G
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
FEATURES
• Low Gate Charge Qg Results in Simple Drive
Requirement
• Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
• Fully Characterized Capacitance and Avalanche Voltage
and Current
D
•Low R
DS(on)
• Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
• Switch Mode Power Supply (SMPS)
• Uninterruptible Power Supply
S
• High Speed Power Switching
• Hard Switched and High Frequency Circuits
Super-247
IRFPS43N50KPbF
SiHFPS43N50K-E3
IRFPS43N50K
SiHFPS43N50K
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage V
Gate-Source Voltage V
= 25 °C
T
Continuous Drain Current V
Pulsed Drain Current
a
at 10 V
GS
C
= 100 °C 29
C
DS
± 30
GS
I
D
IDM 190
Linear Derating Factor 4.3 W/°C
Single Pulse Avalanche Energy
Repetitive Avalanche Current
Repetitive Avalanche Energy
Maximum Power Dissipation T
Peak Diode Recovery dV/dt
b
a
a
= 25 °C P
c
C
Operating Junction and Storage Temperature Range T
E
AS
I
AR
E
AR
D
dV/dt 9.0 V/ns
, T
J
stg
Soldering Recommendations (Peak Temperature) for 10 s 300
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting T
c. I
SD
= 25 °C, L = 0.82 mH, Rg = 25 , IAS = 47 A (see fig. 12c).
J
47 A, dI/dt 230 A/μs, VDD VDS, TJ 150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91262 www.vishay.com
S11-0112-Rev. C, 31-Jan-11 1
500
47
910 mJ
47 A
54 mJ
540 W
- 55 to + 150
d
V
AT
°C
Page 2
IRFPS43N50K, SiHFPS43N50K
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient R
Maximum Junction-to-Case (Drain) R
thJA
thCS
thJC
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage V
V
Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.60 - V/°C
DS
Gate-Source Threshold Voltage V
Gate-Source Leakage I
Zero Gate Voltage Drain Current I
Drain-Source On-State Resistance R
Forward Transconductance g
Dynamic
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Output Capacitance C
Effective Output Capacitance C
Total Gate Charge Q
Gate-Drain Charge Q
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current I
Pulsed Diode Forward Current
a
Body Diode Voltage V
Body Diode Reverse Recovery Time t
Body Diode Reverse Recovery Charge Q
Body Diode Recovery Current I
Forward Turn-On Time t
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width 400 μs; duty cycle 2 %.
c. C
eff. is a fixed capacitance that gives the same charging time as C
oss
DS
GS(th)
V
GSS
DSS
VGS = 10 V ID = 28 A
DS(on)
fs
iss
- 960 -
oss
- 120 -
rss
oss
eff. VDS = 0 V to 400 V
oss
g
--85
gs
- - 180
gd
d(on)
r
-55-
d(off)
-74-
f
S
I
SM
SD
rr
rr
RRM
on
V
V
GS
V
GS
MOSFET symbol
showing the
integral reverse
p - n junction diode
TJ = 25 °C, IF = 47 A, dI/dt = 100 A/μs
-40
0.24 -
°C/WCase-to-Sink, Flat, Greased Surface R
-0.23
VGS = 0 V, ID = 250 μA 500 - - V
VDS = VGS, ID = 250 μA 3.0 - 5.0 V
= ± 30 V - - ± 100 nA
GS
VDS = 500 V, VGS = 0 V - - 50
= 400 V, VGS = 0 V, TJ = 125 °C - - 250
DS
b
- 0.078 0.090
VDS = 50 V, ID = 28 A 23 - - S
VGS = 0 V,
V
= 25 V,
DS
f = 1.0 MHz, see fig. 5
V
= 1.0 V, f = 1.0 MHz - 10170 -
DS
= 0 V
= 400 V, f = 1.0 MHz - 240 -
V
DS
c
- 8310 -
- 440 -
- - 350
= 47 A, VDS = 400 V,
I
D
see fig. 6 and 13
= 10 V
V
= 250 V, ID = 47 A,
DD
R
= 1.0 , see fig. 10
G
TJ = 25 °C, IS = 47 A, VGS = 0 V
b
-25-
- 140 -
b
D
G
S
b
--47
- - 190
--1.5V
- 620 940 ns
b
-1421μC
-38-A
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
while VDS is rising from 0 % to 80 % VDS.
oss
μA
pF
nC Gate-Source Charge Q
ns
A
www.vishay.com Document Number: 91262
2 S11-0112-Rev. C, 31-Jan-11
Page 3
IRFPS43N50K, SiHFPS43N50K
0.01
0.1
1
10
100
1000
0.1 1 10 100
20µs PULSE WIDTH
T = 25 C
J
°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
0.1
1
10
100
1000
0.1 1 10 100
20µs PULSE WIDTH
T = 150 C
J
°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
0.1
1
10
100
1000
4 5 6 7 8 9 10 11 12
V = 50V
20µs PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J
°
T = 150 C
J
°
-60 -40 -20 0 20 40 60 80 100 120 140 160
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
48A
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Vishay Siliconix
Fig. 1 - Typical Output Characteristics
Fig. 2 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91262 www.vishay.com
S11-0112-Rev. C, 31-Jan-11 3
Page 4
IRFPS43N50K, SiHFPS43N50K
1 10 100 1000
VDS, Drain-to-Source Voltage (V)
10
100
1000
10000
100000
1000000
C
,
C
a
p
a
c
i
t
a
n
c
e
(
p
F
)
Coss
Crss
Ciss
V
GS
= 0V, f = 1 MHZ
C
iss
= C
gs
+ Cgd, C
ds
SHORTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
0 50 100 150 200 250 300 350
0
5
10
15
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
I =
D
48A
V = 100V
DS
V = 250V
DS
V = 400V
DS
0.1
1
10
100
1000
0.2 0.7 1.2 1.7 2.2
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J
°
T = 150 C
J
°
1
10
100
1000
10 100 1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
Single Pulse
T T= 150 C
= 25 C
°
°
J
C
V , Drain-to-Source Voltage (V)
I , Drain Current (A)I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
Vishay Siliconix
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
www.vishay.com Document Number: 91262
4 S11-0112-Rev. C, 31-Jan-11
Page 5
IRFPS43N50K, SiHFPS43N50K
25 50 75 100 125 150
0
10
20
30
40
50
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
V
DS
90 %
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
0.001
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D =t / t
2. Peak T = P x Z + T
1 2
J DM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response
(Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
Vishay Siliconix
R
D.U.T.
D
+
V
-
DD
V
DS
V
GS
R
G
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91262 www.vishay.com
S11-0112-Rev. C, 31-Jan-11 5
Page 6
IRFPS43N50K, SiHFPS43N50K
A
R
G
I
AS
0.01 Ω
t
p
D.U.T
L
V
DS
+
-
V
DD
Driver
15 V
20 V
I
AS
V
DS
t
p
25 50 75 100 125 150
0
500
1000
1500
2000
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
I
D
TOP
BOTTOM
22A
30A
47A
D.U.T.
3 mA
V
GS
V
DS
I
G
I
D
0.3 µF
0.2 µF
50 kΩ
12 V
Current regulator
Current sampling resistors
Same type as D.U.T.
+
-
Vishay Siliconix
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Q
Q
G
GD
10 V
V
Q
GS
G
Charge
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit
www.vishay.com Document Number: 91262
6 S11-0112-Rev. C, 31-Jan-11
Page 7
P.W.
Period
dI/dt
Diode recovery
dV/dt
Ripple ≤ 5 %
Body diode forward drop
Re-applied
voltage
Reverse
recovery
current
Body diode forward
current
V
GS
= 10 Va
I
SD
Driver gate drive
D.U.T. l
SD
waveform
D.U.T. V
DS
waveform
Inductor current
D =
P.W.
Period
+
-
+
+
+
-
-
-
Peak Diode Recovery dV/dt Test Circuit
V
DD
• dV/dt controlled by R
g
• Driver same type as D.U.T.
•
I
SD
controlled by duty factor “D”
• D.U.T. - device under test
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
R
g
Note
a. V
GS
= 5 V for logic level devices
V
DD
IRFPS43N50K, SiHFPS43N50K
Vishay Siliconix
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91262
Document Number: 91262 www.vishay.com
S11-0112-Rev. C, 31-Jan-11 7
.
Page 8
TO-274AA (HIGH VOLTAGE)
B
E4
E
R
Package Information
Vishay Siliconix
A
A
A1
E1
D2
D
L1
L
e
10°
5°
Detail “A”
b
0.10 (0.25)
Lead Tip
MM
B A
C
A2
b2
Detail “A”
Scale: 2:1
b4
D1
MILLIMETERS INCHES MILLIMETERS INCHES
DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.
A 4.70 5.30 0.185 0.209 D1 15.50 16.10 0.610 0.634
A1 1.50 2.50 0.059 0.098 D2 0.70 1.30 0.028 0.051
A2 2.25 2.65 0.089 0.104 E 15.10 16.10 0.594 0.634
b 1.30 1.60 0.051 0.063 E1 13.30 13.90 0.524 0.547
b2 1.80 2.20 0.071 0.087 e 5.45 BSC 0.215 BSC
b4 3.00 3.25 0.118 0.128 L 13.70 14.70 0.539 0.579
c 0.80 1.20 0.031 0.047 L1 1.00 1.60 0.039 0.063
D 19.80 20.80 0.780 0.819 R 2.00 3.00 0.079 0.118
ECN: S-82247-Rev. A, 06-Oct-08
DWG: 5975
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the
outer extremes of the plastic body.
3. Outline conforms to JEDEC outline to TO-274AA.
Document Number: 91365 www.vishay.com
Revision: 06-Oct-08 1
Page 9
Legal Disclaimer Notice
www.vishay.com
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of
typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding
statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a
particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
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Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk.
Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for
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Revision: 13-Jun-16
1
Document Number: 91000
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