Datasheet IRFL9014, SiHFL9014 DataSheet (Vishay)

www.vishay.com

SOT-223

G

D

S

D

IRFL9014, SiHFL9014

Vishay Siliconix

Power MOSFET

PRODUCT SUMMARY

VDS (V) -60

R

()V

DS(on)

Q

(Max.) (nC) 12

g

Q

(nC) 3.8

gs

Q

(nC) 5.1

gd

Configuration Single

= -10 V 0.50

GS

S

FEATURES

• Surface mount

• Available in tape and reel

• Dynamic dV/dt rating

• Repetitive avalanche rated

•P-channel

• Fast switching

• Ease of paralleling

• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912

G

DESCRIPTION

Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The SOT-223 package is designed for surface-mounting
using vapor phase, infrared, or wave soldering techniques.
Its unique package design allows for easy automatic

Marking code: FE

D

P-Channel MOSFET

pick-and-place as with other SOT or SOIC packages but
has the added advantage of improved thermal performance
due to an enlarged tab for heatsinking. Power dissipation of
greater than 1.25 W is possible in a typical surface mount
application.

ORDERING INFORMATION

Package SOT-223 SOT-223
Lead (Pb)-free and Halogen-free SiHFL9014-GE3 SiHFL9014TR-GE3

Lead (Pb)-free

Note

a. See device orientation.

IRFL9014PbF IRFL9014TRPbF
SiHFL9014-E3 SiHFL9014T-E3

Available

a

a

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V

Gate-Source Voltage V

Continuous Drain Current V

Pulsed Drain Current

a

Linear Derating Factor 0.025

Linear Derating Factor (PCB Mount)

Single Pulse Avalanche Energy

Repetitive Avalanche Current

Repetitive Avalanche Energy

e

b

a

a

Maximum Power Dissipation T

Maximum Power Dissipation (PCB Mount)

Peak Diode Recovery dV/dt

c

e

Operating Junction and Storage Temperature Range T

Soldering Recommendations (Peak Temperature)

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).

= - 25 V, starting TJ = 25 °C, L = 50 mH, Rg = 25 , IAS = - 1.8 A (see fig. 12).

b. V

DD

c. ISD  - 6.7 A, dI/dt  90 A/μs, VDD  VDS, TJ  150 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).

S14-1686-Rev. F, 18-Aug-14

For technical questions, contact: [e-mail]

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

at - 10 V

GS

= 25 °C

C

TA = 25 °C 2.0

d

for 10 s 300

DS

± 20

GS

T

= 25 °C

C

= 100 °C -1.1

C

I

D

IDM -14

E

AS

I

AR

E

AR

P

D

dV/dt -4.5 V/ns

, T

J

stg

-55 to +150

1

-60

-1.8

0.017

W/°C

140 mJ

-1.8 A

0.31 mJ

3.1

Document Number: 91195

V

AT

W

°C

IRFL9014, SiHFL9014

D

S

G

S

D

G

www.vishay.com

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient 
(PCB Mount)

a

Maximum Junction-to-Case (Drain) R

R

thJA

thJC

-60

-40

Note

a. When mounted on 1" square PCB (FR-4 or G-10 material).

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage V

V

Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - -0.059 - V/°C

DS

Gate-Source Threshold Voltage V

Gate-Source Leakage I

Zero Gate Voltage Drain Current I

Drain-Source On-State Resistance R

Forward Transconductance g

DS

GS(th)

V

GSS

DSS

VGS = -10 V ID = 1.1 A

DS(on)

fs

Dynamic

Input Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Gate-Drain Charge Q

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

Internal Drain Inductance L

Internal Source Inductance L

iss

- 170 -

oss

-31-

rss

g

--3.8

gs

--5.1

gd

d(on)

r

d(off)

-31-

f

D

V

-9.6-

Between lead,
6 mm (0.25") from
package and center of

S

die contact

VGS = 0 V, ID = 250 μA -60 - - V

VDS = VGS, ID = 250 μA -2.0 - -4.0 V

= ± 20 V - - ± 100 nA

GS

VDS = -60 V, VGS = 0 V - - - 100

V

= -48 V, VGS = 0 V, TJ = 125 °C - - -500

DS

b

VDS = - 25 V, ID = 1.1 A

b

VGS = 0 V,

V

= 25 V,

DS

f = 1.0 MHz, see fig. 5

= - 6.7 A, VDS = - 48 V,

I

= - 10 V

GS

V

R

= 24 , RD = 4.0 , see fig. 10

g

D

see fig. 6 and 13

= - 30 V, ID = - 6.7 A,

DD

b

b

Vishay Siliconix

°C/W

- - 0.50 

1.3 - - S

- 270 -

--12

-11-

-63-

-4.0-

-6.0-

μA

pFOutput Capacitance C

nC Gate-Source Charge Q

ns

nH

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current I

Pulsed Diode Forward Current

a

Body Diode Voltage V

Body Diode Reverse Recovery Time t

Body Diode Reverse Recovery Charge Q

Forward Turn-On Time t

S

I

SM

SD

rr

rr

on

MOSFET symbol
showing the 
integral reverse
p - n junction diode

TJ = 25 °C, IS = - 1.8 A, VGS = 0 V

b

TJ = 25 °C, IF = - 6.7 A, dI/dt = 100 A/μs

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

--- 1.8

--- 14

--- 5.5V

- 80 160 ns

b

- 0.096 0.19 μC

A

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.

S14-1686-Rev. F, 18-Aug-14

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

For technical questions, contact: [e-mail]

2

Document Number: 91195

www.vishay.com

20 µs Pulse Width
T

C

= 25 °C

4.5 V

Bottom

To p

V

GS

-

15 V

-10 V

-8.0 V

-7.0 V

-6.0 V

-5.5 V

-5.0 V

-4.5 V

91195_01

- VDS, Drain-to-Source Voltage (V)

- I

D

, Drain Current (A)

10

1

10

0

10

-1

10

0

10

1

10

-1

91195_02

4.5 V

Bottom

To p

V

GS

-15 V

-10 V

-8.0 V

-7.0 V

-6.0 V

-5.5 V

-5.0 V

-4.5 V

10

1

10

0

10

0

10

1

10

-1

- V

DS

,

Drain-to-Source Voltage (V)

- I

D

, Drain Current (A)

20 µs Pulse Width
T

C

= 150 °C

91195_03

25 °C

150 °C

20 µs Pulse Width
V

DS

= - 25 V

10

1

10

0

- I

D

, Drain Current (A)

- V

GS

,

Gate-to-Source Voltage (V)

5678910

4

10

-1

91195_06

ID = -6.7 A

V

DS

= -48 V

For test circuit
see figure 13

V

DS

= -30 V

QG, Total Gate Charge (nC)

- V

GS

, Gate-to-Source Voltage (V)

20

16

12

8

0

4

0

41612

8

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Fig. 1 - Typical Output Characteristics, TC = 25 °C

IRFL9014, SiHFL9014

Vishay Siliconix

2.5

I

= - 6.7 A

D

= 10 V

V

GS

2.0

1.5

1.0

(Normalized)

0.5

, Drain-to-Source On Resistance

DS(on)

0.0

R

- 60 - 40 - 20 0 20 40 60 80 100 120 140 160

91195_04

Fig. 4 - Normalized On-Resistance vs. Temperature

T

Junction Temperature (°C)

,

J

Fig. 2 - Typical Output Characteristics, T

= 150 °C

C

600

500

V

= 0 V, f = 1 MHz

GS

= Cgs + Cgd, Cds Shorted

C

iss

= C

C

rss

gd

C

= Cds + C

oss

gd

400

C

300

200

Capacitance (pF)

100

0

0

10

91195_05

- V

Drain-to-Source Voltage (V)

,

DS

iss

C

oss

C

rss

1

10

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

S14-1686-Rev. F, 18-Aug-14

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

Fig. 3 - Typical Transfer Characteristics

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

3

Document Number: 91195

For technical questions, contact: [e-mail]

www.vishay.com

91195_08

100 µs

1 ms

10 ms

Operation in this area limited

by R

DS(on)

TC = 25 °C
T

J

= 150 °C

Single Pulse

- I

D

, Drain Current (A)

10

2

2

5

2

5

2

5

- VDS, Drain-to-Source Voltage (V)

1

10

10

2

25 25 2

5

0.1

1

10

0.1

25

10

3

Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

R

D

V

GS

R

g

D.U.T.

- 10 V

+

-

V

DS

V

DD

V

GS

10 %

90 %

V

DS

t

d(on)

t

r

t

d(off)

t

f

1

10

150 °C

25 °C

IRFL9014, SiHFL9014

Vishay Siliconix

2.0

1.5

0

10

, Reverse Drain Current (A)

SD

- I

91195_07

-1

10

1.0

4.03.02.0

- VSD, Source-to-Drain Voltage (V)

V

5.0

= 0 V

GS

6.0

Fig. 7 - Typical Source-Drain Diode Forward Voltage

1.0

, Drain Current (A)

D

- I

0.5

0.0

25 1501251007550

91195_09

TC, Case Temperature (°C)

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10a - Switching Time Test Circuit

Fig. 8 - Maximum Safe Operating Area

Fig. 10b - Switching Time Waveforms

2

10

)

τηJC

0 − 0.5

10

0.2

0.1

0.05

1

0.02

0.01

0.1

Thermal Response (Z

-2

10

-5

91195_11

S14-1686-Rev. F, 18-Aug-14

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

10

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

10

-4

Single Pulse
(Thermal Response)

-3

10

-2

10

0.1 1 10

t1, Rectangular Pulse Duration (s)

4

For technical questions, contact: [e-mail]

Notes:

1. Duty Factor, D = t

2. Peak Tj = PDM x Z

P

DM

2

10

Document Number: 91195

t

1

t

2

1/t2

+ T

thJC

C

3

10

www.vishay.com

R

g

I

AS

0.01 Ω

t

p

D.U.T

L

V

DS

+

­V

DD

- 10 V

Var y tp to obtain
required I

AS

I

AS

V

DS

V

DD

V

DS

t

p

91195_12c

Bottom

To p

I

D

- 0.80 A

- 1.1 A

- 1.8 A

VDD = - 25 V

400

0

100

200

300

25 150

125

10075

50

Starting T

J

, Junction Temperature (°C)

E

AS

, Single Pulse Energy (mJ)

IRFL9014, SiHFL9014

Vishay Siliconix

Fig. 12a - Unclamped Inductive Test Circuit

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Fig. 12b - Unclamped Inductive Waveforms

Current regulator

Same type as D.U.T.

S14-1686-Rev. F, 18-Aug-14

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

- 10 V

V

Q

G

Q

GS

G

Q

GD

12 V

V

GS

0.2 µF

50 kΩ

0.3 µF

D.U.T.

- 3 mA

Charge

Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit

I

G

Current sampling resistors

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

5

For technical questions, contact: [e-mail]

Document Number: 91195

-

V

+

DS

I

D

www.vishay.com

P.W.

Period

dI/dt

Diode recovery

dV/dt

Body diode forward drop

Body diode forward

current

Driver gate drive

Inductor current

D =

P.W.

Period

+

-

-

-

-

+

+

+

Peak Diode Recovery dV/dt Test Circuit

• dV/dt controlled by R

g

• D.U.T. - device under test

D.U.T.

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

R

g

• Compliment N-Channel of D.U.T. for driver

V

DD

• I

SD

controlled by duty factor “D”

Note

Note

a. V

GS

= - 5 V for logic level and - 3 V drive devices

V

GS

= - 10 V

a

D.U.T. lSD waveform

D.U.T. V

DS

waveform

V

DD

Re-applied
voltage

Ripple ≤ 5 %

I

SD

Reverse
recovery
current

IRFL9014, SiHFL9014

Vishay Siliconix

Fig. 14 - For P-Channel











Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91195

S14-1686-Rev. F, 18-Aug-14

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

.

6

For technical questions, contact: [e-mail]

Document Number: 91195

SOT-223 (HIGH VOLTAGE)

Package Information

Vishay Siliconix

3

B

B1

0.10 (0.004)

0.10 (0.004)

0.20 (0.008)

3 x B

0.10 (0.004)

H

D

3

A

4

3

E

1

2

e

e1

MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX.

A 1.55 1.80 0.061 0.071

B 0.65 0.85 0.026 0.033

B1 2.95 3.15 0.116 0.124

C 0.25 0.35 0.010 0.014

D 6.30 6.70 0.248 0.264

E 3.30 3.70 0.130 0.146

e 2.30 BSC 0.0905 BSC

e1 4.60 BSC 0.181 BSC

H 6.71 7.29 0.264 0.287

L 0.91 - 0.036 -

L1 0.061 BSC 0.0024 BSC

θ - 10' - 10'

ECN: S-82109-Rev. A, 15-Sep-08
DWG: 5969

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimensions are shown in millimeters (inches).

3. Dimension do not include mold flash.

4. Outline conforms to JEDEC outline TO-261AA.

A

M

M

M

M

C

C B

M

M

C A

M

M

C B

C

L1

4 x L

θ

0.08 (0.003)

4 x C

Document Number: 91363 www.vishay.com
Revision: 15-Sep-08 1

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Disclaimer



ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s
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including but not limited to the warranty expressed therein.

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
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Revision: 13-Jun-16

1

Document Number: 91000