Datasheet IRFL214, SiHFL214 DataSheet (Vishay)

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SOT-223
G
D
S
D
IRFL214, SiHFL214
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V) 250
R
()V
DS(on)
Q
(Max.) (nC) 8.2
g
Q
(nC) 1.8
gs
Q
(nC) 4.5
gd
Configuration Single
= 10 V 2.0
GS
FEATURES
• Surface mount
• Available in tape and reel
• Dynamic dV/dt rating
• Repetitive avalanche rated
• Fast switching
• Ease of paralleling
• Simple drive requirements
• Material categorization: for definitions of compliance please see www.vishay.com/doc?99912
D
DESCRIPTION
Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness.
G
The SOT-223 package is designed for surface-mounting using vapor phase, infrared, or wave soldering techniques. Its unique package design allows for easy automatic pick-and-place as with other SOT or SOIC packages but
Marking code: FD
N-Channel MOSFET
S
has the added advantage of improved thermal performance due to an enlarged tab for heatsinking. Power dissipation of greater than 1.25 W is possible in a typical surface mount application.
ORDERING INFORMATION
Package SOT-223 SOT-223
Lead (Pb)-free and Halogen-free SiHFL214-GE3
Lead (Pb)-free
IRFL214PbF IRFL214TRPbF SiHFL214-E3 SiHFL214T-E3
Note
a. See device orientation.
SiHFL214TR-GE3
Available
a
a
a
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage V
Gate-Source Voltage V
Continuous Drain Current V
Pulsed Drain Current
a
Linear Derating Factor 0.025
Linear Derating Factor (PCB Mount)
Single Pulse Avalanche Energy
Repetitive Avalanche Current
Repetitive Avalanche Energy
e
b
a
a
Maximum Power Dissipation T
Maximum Power Dissipation (PCB Mount)
Peak Diode Recovery dV/dt
c
e
Operating Junction and Storage Temperature Range T
Soldering Recommendations (Peak Temperature)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. V
= 50 V, starting TJ = 25 °C, L = 128 mH, Rg = 25 , IAS = 0.79 A (see fig. 12).
DD
c. I
2.7 A, dI/dt 65 A/μs, VDD VDS, TJ 150 °C.
SD
d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material).
S14-1685-Rev. E, 18-Aug-14
For technical questions, contact: hvm@vishay.com
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
at 10 V
GS
= 25 °C
C
TA = 25 °C 2.0
d
for 10 s 300
DS
± 20
GS
T
= 25 °C
C
= 100 °C 0.50
C
I
D
IDM 6.3
E
AS
I
AR
E
AR
P
D
dV/dt 4.8 V/ns
, T
J
stg
-55 to +150
1
250
0.79
0.017
W/°C
50 mJ
0.79 A
0.31 mJ
3.1
Document Number: 91194
V
AT
W
°C
Page 2
IRFL214, SiHFL214
D
G
S
D
G
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THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL MIN. TYP. MAX. UNIT
Maximum Junction-to-Ambient (PCB Mount)
a
Maximum Junction-to-Case (Drain) R
R
thJA
thJC
--60
--40
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage V
V
Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.39 - V/°C
DS
Gate-Source Threshold Voltage V
Gate-Source Leakage I
Zero Gate Voltage Drain Current I
Drain-Source On-State Resistance R
Forward Transconductance g
DS
GS(th)
V
GSS
DSS
VGS = 10 V ID = 0.47 A
DS(on)
fs
Dynamic
Input Capacitance C
Reverse Transfer Capacitance C
Total Gate Charge Q
Gate-Drain Charge Q
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Internal Drain Inductance L
Internal Source Inductance L
iss
-42-
oss
-9.6-
rss
g
--1.8
gs
--4.5
gd
d(on)
r
-16-
d(off)
-7.0-
f
D
S
V
Between lead, 6 mm (0.25") from package and center of die contact
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current I
Pulsed Diode Forward Current
a
Body Diode Voltage V
Body Diode Reverse Recovery Time t
Body Diode Reverse Recovery Charge Q
Forward Turn-On Time t
S
I
SM
SD
rr
rr
on
MOSFET symbol showing the integral reverse p - n junction diode
TJ = 25 °C, IF = 2.7 A, dI/dt = 100 A/μs
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 μs; duty cycle  2 %.
VGS = 0 V, ID = 250 μA 250 - - V
VDS = VGS, ID = 250 μA 2.0 - 4.0 V
= ± 20 V - - ± 100 nA
GS
VDS = 250 V, VGS = 0 V - - 25
= 200 V, VGS = 0 V, TJ = 125 °C - - 250
V
DS
b
VDS = 50 V, ID = 0.47 A 0.50 - - S
VGS = 0 V,
V
= 25 V,
DS
f = 1.0 MHz, see fig. 5
= 2.7 A, VDS = 200 V,
I
= 10 V
GS
V
R
= 24 , RD = 45 , see fig. 10
g
TJ = 25 °C, IS = 0.79 A, VGS = 0 V
D
see fig. 6 and 13
= 125 V, ID = 2.7 A,
DD
b
b
b
b
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Vishay Siliconix
°C/W
--2.0
- 140 -
--8.2
-7.0-
-7.6-
-4.0-
-6.0-
- - 0.79
--6.3
--2.0V
- 190 390 ns
-0.641.C
μA
pFOutput Capacitance C
nC Gate-Source Charge Q
ns
nH
A
S14-1685-Rev. E, 18-Aug-14
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
For technical questions, contact: hvm@vishay.com
2
Document Number: 91194
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
IRFL214, SiHFL214
Vishay Siliconix
Fig. 1 - Typical Output Characteristics
Fig. 2 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 3 - Typical Transfer Characteristics
S14-1685-Rev. E, 18-Aug-14
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3
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Document Number: 91194
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Pulse width 1 µs Duty factor 0.1 %
R
D
V
GS
R
g
D.U.T.
10 V
+
-
V
DS
V
DD
V
DS
90 %
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
IRFL214, SiHFL214
Vishay Siliconix
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10a - Switching Time Test Circuit
Fig. 10b - Switching Time Waveforms
S14-1685-Rev. E, 18-Aug-14
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
4
Document Number: 91194
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Page 5
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R
g
I
AS
0.01 Ω
t
p
D.U.T.
L
V
DS
+
-
V
DD
10 V
Var y t
p
to obtain
required I
AS
Q
GS
Q
GD
Q
G
V
G
Charge
V
GS
IRFL214, SiHFL214
Vishay Siliconix
V
DS
t
p
V
DS
I
AS
V
DD
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Fig. 12b - Unclamped Inductive Waveforms
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit
S14-1685-Rev. E, 18-Aug-14
Current regulator
Same type as D.U.T.
50 kΩ
0.2 µF
12 V
V
GS
3 mA
Current sampling resistors
5
For technical questions, contact: hvm@vishay.com
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
0.3 µF
+
V
D.U.T.
I
G
I
DS
-
D
Document Number: 91194
Page 6
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IRFL214, SiHFL214
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
D.U.T.
+
-
R
g
Driver gate drive
P.W.
+
-
Period
Circuit layout considerations
Low stray inductance
Ground plane
Low leakage inductance
current transformer
dV/dt controlled by R
Driver same type as D.U.T.
I
controlled by duty factor “D”
SD
D.U.T. - device under test
-
D =
g
P.W.
Period
+
+
V
DD
-
V
= 10 Va
GS
D.U.T. l
Reverse recovery current
D.U.T. V
Re-applied voltage
Inductor current
Note
a. V
waveform
SD
Body diode forward
waveform
DS
Body diode forward drop
Ripple 5 %
= 5 V for logic level devices
GS
current
dI/dt
Diode recovery
dV/dt
V
DD
I
SD
Fig.14 - For N-Channel
     
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91194
.
S14-1685-Rev. E, 18-Aug-14
6
Document Number: 91194
For technical questions, contact: hvm@vishay.com
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Page 7
SOT-223 (HIGH VOLTAGE)
Package Information
Vishay Siliconix
3
B
B1
0.10 (0.004)
0.10 (0.004)
0.20 (0.008)
3 x B
0.10 (0.004)
H
D
3
A
4
3
E
1
2
e
e1
MILLIMETERS INCHES
DIM. MIN. MAX. MIN. MAX.
A 1.55 1.80 0.061 0.071
B 0.65 0.85 0.026 0.033
B1 2.95 3.15 0.116 0.124
C 0.25 0.35 0.010 0.014
D 6.30 6.70 0.248 0.264
E 3.30 3.70 0.130 0.146
e 2.30 BSC 0.0905 BSC
e1 4.60 BSC 0.181 BSC
H 6.71 7.29 0.264 0.287
L 0.91 - 0.036 -
L1 0.061 BSC 0.0024 BSC
θ - 10' - 10'
ECN: S-82109-Rev. A, 15-Sep-08 DWG: 5969
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension do not include mold flash.
4. Outline conforms to JEDEC outline TO-261AA.
A
M
M
M
M
C
C B
M
M
C A
M
M
C B
C
L1
4 x L
θ
0.08 (0.003)
4 x C
Document Number: 91363 www.vishay.com Revision: 15-Sep-08 1
Page 8
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Disclaimer
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Revision: 13-Jun-16
1
Document Number: 91000
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