Datasheet IRFL110, SiHFL110 DataSheet (Vishay)

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IRFL110, SiHFL110
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V) 100
R
()V
DS(on)
Q
(Max.) (nC) 8.3
g
Q
(nC) 2.3
gs
Q
(nC) 3.8
gd
Configuration Single
SOT-223
D
S
D
G
= 10 V 0.54
GS
G
D
FEATURES
• Surface mount
• Available in tape and reel
• Dynamic dV/dt rating
• Repetitive avalanche rated
• Fast switching
• Ease of paralleling
• Simple drive requirements
• Material categorization: for definitions of compliance please see www.vishay.com/doc?99912
DESCRIPTION
Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SOT-223 package is designed for surface-mounting using vapor phase, infrared, or wave soldering techniques. Its unique package design allows for easy automatic
Marking code: FB
S
N-Channel MOSFET
pick-and-place as with other SOT or SOIC packages but has the added advantage of improved thermal performance due to an enlarged tab for heatsinking. Power dissipation of greater than 1.25 W is possible in a typical surface mount application.
ORDERING INFORMATION
Package SOT-223 SOT-223
Lead (Pb)-free and Halogen-free SiHFL110-GE3 SiHFL110TR-GE3
Lead (Pb)-free
Note
a. See device orientation.
IRFL110PbF IRFL110TRPbF
SiHFL110-E3 SiHFL110T-E3
Available
a
a
a
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage V
Gate-Source Voltage V
T
= 25 °C
Continuous Drain Current V
Pulsed Drain Current
a
at 10 V
GS
C
= 100 °C 0.96
C
DS
± 20
GS
I
D
IDM 12
Linear Derating Factor 0.025
Linear Derating Factor (PCB Mount)
Single Pulse Avalanche Energy
Repetitive Avalanche Current
Repetitive Avalanche Energy
Maximum Power Dissipation T
Maximum Power Dissipation (PCB Mount)
Peak Diode Recovery dV/dt
Operating Junction and Storage Temperature Range T
Soldering Recommendations (Peak Temperature)
e
b
a
a
= 25 °C
e
c
d
C
TA = 25 °C 2.0
for 10 s 300
E
AS
I
AR
E
AR
P
D
dV/dt 5.5 V/ns
, T
J
stg
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. V
= 25 V, starting TJ = 25 °C, L = 25 mH, Rg = 25 , IAS = 3.0 A (see fig. 12).
DD
5.6 A, dI/dt 75 A/μs, VDD VDS, TJ 150 °C.
c. I
SD
d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material).
S14-1685-Rev. E, 18-Aug-14
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
100
1.5
0.017
150 mJ
1.5 A
0.31 mJ
3.1
-55 to +150
Document Number: 91192
V
AT
W/°C
W
°C
Page 2
IRFL110, SiHFL110
D
S
G
S
D
G
www.vishay.com
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL MIN. TYP. MAX. UNIT
Maximum Junction-to-Ambient (PCB Mount)
a
Maximum Junction-to-Case (Drain) R
R
thJA
thJC
--60
--40
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage V
V
Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.63 - V/°C
DS
Gate-Source Threshold Voltage V
Gate-Source Leakage I
Zero Gate Voltage Drain Current I
Drain-Source On-State Resistance R
Forward Transconductance g
DS
GS(th)
V
GSS
DSS
VGS = 10 V ID = 0.90 A
DS(on)
fs
Dynamic
Input Capacitance C
Reverse Transfer Capacitance C
Total Gate Charge Q
Gate-Drain Charge Q
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Internal Drain Inductance L
Internal Source Inductance L
iss
-81-
oss
-15-
rss
g
--2.3
gs
--3.8
gd
d(on)
r
-15-
d(off)
-9.4-
f
D
V
Between lead, 6 mm (0.25") from package and center of
S
die contact
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current I
Pulsed Diode Forward Current
a
Body Diode Voltage V
Body Diode Reverse Recovery Time t
Body Diode Reverse Recovery Charge Q
Forward Turn-On Time t
S
I
SM
SD
rr
rr
on
MOSFET symbol showing the integral reverse p - n junction diode
TJ = 25 °C, IF = 5.6 A, dI/dt = 100 A/μs
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 μs; duty cycle  2 %.
VGS = 0 V, ID = 250 μA 100 - - V
VDS = VGS, ID = 250 μA 2.0 - 4.0 V
= ± 20 V - - ± 100 nA
GS
VDS = 100 V, VGS = 0 V - - 25
= 80 V, VGS = 0 V, TJ = 125 °C - - 250
V
DS
b
VDS = 50 V, ID = 0.90 A 1.1 - - S
VGS = 0 V,
V
= 25 V,
DS
f = 1.0 MHz, see fig. 5
= 5.6 A, VDS = 80 V,
I
= 10 V
GS
V
R
= 24 , RD = 8.4 , see fig. 10
g
TJ = 25 °C, IS = 1.5 A, VGS = 0 V
D
see fig. 6 and 13
= 50 V, ID = 5.6 A,
DD
b
b
b
b
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Vishay Siliconix
°C/W
- - 0.54
- 180 -
--8.3
-6.9-
-16-
-4.0-
-6.0-
--1.5
--12
--2.5V
- 100 200 ns
-0.440.8C
μA
pFOutput Capacitance C
nC Gate-Source Charge Q
ns
nH
A
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Document Number: 91192
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
IRFL110, SiHFL110
Vishay Siliconix
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 2 - Typical Output Characteristics, T
= 150 °C
C
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
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Document Number: 91192
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IRFL110, SiHFL110
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
S14-1685-Rev. E, 18-Aug-14
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Document Number: 91192
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Pulse width 1 µs Duty factor 0.1 %
R
D
V
GS
R
g
D.U.T.
10 V
+
-
V
DS
V
DD
V
DS
90 %
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
IRFL110, SiHFL110
Vishay Siliconix
Fig. 10a -Switching Time Test Circuit
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig. 10b - Switching Time Waveforms
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R
g
I
AS
0.01 Ω
t
p
D.U.T
L
V
DS
+
-
V
DD
10 V
Var y t
p
to obtain
required I
AS
Q
GS
Q
GD
Q
G
V
G
Charge
10 V
IRFL110, SiHFL110
Vishay Siliconix
V
DS
t
p
V
DS
I
AS
V
DD
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Fig. 12b - Unclamped Inductive Waveforms
Current regulator
Same type as D.U.T.
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit
S14-1685-Rev. E, 18-Aug-14
50 kΩ
0.2 µF
12 V
V
GS
6
0.3 µF
3 mA
I
G
Current sampling resistors
For technical questions, contact: hvm@vishay.com
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
+
V
D.U.T.
I
DS
-
D
Document Number: 91192
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P.W.
Period
dI/dt
Diode recovery
dV/dt
Ripple 5 %
Body diode forward drop
Re-applied voltage
Reverse recovery current
Body diode forward
current
V
GS
= 10 Va
I
SD
Driver gate drive
D.U.T. l
SD
waveform
D.U.T. V
DS
waveform
Inductor current
D =
P.W.
Period
+
-
+
+
+
-
-
-
Peak Diode Recovery dV/dt Test Circuit
V
DD
dV/dt controlled by R
g
Driver same type as D.U.T.
I
SD
controlled by duty factor “D”
D.U.T. - device under test
D.U.T.
Circuit layout considerations
Low stray inductance
Ground plane
Low leakage inductance
current transformer
R
g
Note
a. V
GS
= 5 V for logic level devices
V
DD
IRFL110, SiHFL110
Vishay Siliconix
Fig.14 - For N-Channel
       
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91192
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
.
7
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Document Number: 91192
Page 8
SOT-223 (HIGH VOLTAGE)
Package Information
Vishay Siliconix
3
B
B1
0.10 (0.004)
0.10 (0.004)
0.20 (0.008)
3 x B
0.10 (0.004)
H
D
3
A
4
3
E
1
2
e
e1
MILLIMETERS INCHES
DIM. MIN. MAX. MIN. MAX.
A 1.55 1.80 0.061 0.071
B 0.65 0.85 0.026 0.033
B1 2.95 3.15 0.116 0.124
C 0.25 0.35 0.010 0.014
D 6.30 6.70 0.248 0.264
E 3.30 3.70 0.130 0.146
e 2.30 BSC 0.0905 BSC
e1 4.60 BSC 0.181 BSC
H 6.71 7.29 0.264 0.287
L 0.91 - 0.036 -
L1 0.061 BSC 0.0024 BSC
θ - 10' - 10'
ECN: S-82109-Rev. A, 15-Sep-08 DWG: 5969
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension do not include mold flash.
4. Outline conforms to JEDEC outline TO-261AA.
A
M
M
M
M
C
C B
M
M
C A
M
M
C B
C
L1
4 x L
θ
0.08 (0.003)
4 x C
Document Number: 91363 www.vishay.com Revision: 15-Sep-08 1
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Disclaimer
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Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.
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Revision: 13-Jun-16
1
Document Number: 91000
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