Datasheet IRFD9210, SiHFD9210 DataSheet (Vishay)

S

G

D

P-Channel MOSFET

HVMDIP

D

S

G

Available

RoHS*

COMPLIANT

Power MOSFET

IRFD9210, SiHFD9210

Vishay Siliconix

PRODUCT SUMMARY

VDS (V) - 200

()V

R

DS(on)

Q

(Max.) (nC) 8.9

g

Q

(nC) 2.1

gs

Q

(nC) 3.9

gd

Configuration Single

= - 10 V 3.0

GS

FEATURES

• Dynamic dV/dt Rating

• Repetitive Avalanche Rated

• For Automatic Insertion

• End Stackable

• P-Channel

• Fast Switching

• Ease of Paralleling

• Compliant to RoHS Directive 2002/95/EC

DESCRIPTION

The Power MOSFETs technology is the key to Vishay
advanced line of Power MOSFET transistors. The efficient
geometry and unique processing of the Power MOSFETs
design archieve very low on-state resistance combined with
high transconductance and extreme device ruggedness.
The 4 pin DIP package is a low cost machine-insertable case
style which can be stacked in multiple combinations on
standard 0.1
link to the mounting surface for power dissipation levels up to
1 W.

ORDERING INFORMATION

Package HVMDIP

Lead (Pb)-free

SnPb

IRFD9210PbF
SiHFD9210-E3
IRFD9210
SiHFD9210

" pin centers. The dual drain serves as a thermal

ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V

Gate-Source Voltage V

T

= 25 °C

Continuous Drain Current V

Pulsed Drain Current

a

at - 10 V

GS

A

T

= 100 °C - 0.25

A

DS

± 20

GS

I

D

IDM - 3.2

Linear Derating Factor 0.0083 W/°C

Single Pulse Avalanche Energy

Repetitive Avalanche Current

Repetitive Avalanche Energy

Maximum Power Dissipation T

Peak Diode Recovery dV/dt

Operating Junction and Storage Temperature Range T

b

a

a

= 25 °C P

c

A

E

AS

I

AR

E

AR

D

dV/dt - 5.0 V/ns

, T

J

stg

Soldering Recommendations (Peak Temperature) for 10 s 300

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V

= - 50 V, starting TJ = 25 °C, L = 123 mH, Rg = 25 , IAS = - 1.6 A (see fig. 12).

DD

c. I

 - 2.3 A, dI/dt  70 A/µs, VDD  VDS, TJ  150 °C.

SD

d. 1.6 mm from case.

* Pb containing terminations are not RoHS compliant, exemptions may apply

Document Number: 91140 www.vishay.com
S10-2464-Rev. C, 25-Oct-10 1

- 200

- 0.40

210 mJ

- 0.40 A

0.10 mJ

1.0 W

- 55 to + 150

d

V

A

°C

IRFD9210, SiHFD9210

Vishay Siliconix

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient R

thJA

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage V

Temperature Coefficient

V

DS

Gate-Source Threshold Voltage V

Gate-Source Leakage I

Zero Gate Voltage Drain Current I

Drain-Source On-State Resistance R

Forward Transconductance g

Dynamic

Input Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Gate-Drain Charge Q

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

Internal Drain Inductance L

Internal Source Inductance L

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current I

Pulsed Diode Forward Current

a

Body Diode Voltage V

Body Diode Reverse Recovery Time t

Body Diode Reverse Recovery Charge Q

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 µs; duty cycle  2 %.

DS

V

DS/TJ

GS(th)

V

GSS

DSS

VGS = - 10 V ID = - 0.24 A

DS(on)

fs

iss

-54-

oss

-16-

rss

g

--2.1

gs

--3.9

gd

d(on)

r

-11-

d(off)

-13-

f

D

V

V

GS

Between lead,
6 mm (0.25") from
package and center of

S

S

die contact

MOSFET symbol
showing the

integral reverse

I

SM

SD

rr

rr

p - n junction diode

TJ = 25 °C, IF = - 2.3 A, dI/dt = 100 A/µs

- 120 °C/W

VGS = 0 V, ID = - 250 µA - 200 - - V

Reference to 25 °C, I

= - 1 mA

D

- - 0.23 -

VDS = VGS, ID = - 250 µA - 2.0 - - 4.0 V

= ± 20 V - - ± 100 nA

GS

VDS = - 200 V, VGS = 0 V - - - 100

= - 160 V, VGS = 0 V, TJ = 125 °C - - - 500

DS

b

--3.0

VDS = - 50 V, ID = - 0.24 A 0.27 - - S

VGS = 0 V,

= - 25 V,

V

DS

- 170 -

f = 1.0 MHz, see fig. 5

--8.9

= - 1.3 A, VDS = - 160 V

I

= - 10 V

V

TJ = 25 °C, IS = - 0.40 A, VGS = 0 V

D

see fig. 6 and 13

= - 100 V, ID = - 2.3 A

DD

R

= 24 , RD = 41

g

see fig. 10

b

b

-8.0-

-12-

D

G

S

D

G

S

b

-4.0-

-6.0-

- - - 0.40

--- 3.2

--- 5.8V

- 110 220 ns

b

- 0.56 1.1 µC

V/°C

µA

pFOutput Capacitance C

nC Gate-Source Charge Q

ns

nH

A

www.vishay.com Document Number: 91140
2 S10-2464-Rev. C, 25-Oct-10

TA = 25 °C

TA = 150 °C

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

IRFD9210, SiHFD9210

Vishay Siliconix

Fig. 1 - Typical Output Characteristics, TA = 25 °C

Fig. 2 - Typical Output Characteristics, T

= 150 °C

A

Fig. 3 - Typical Transfer Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

Document Number: 91140 www.vishay.com
S10-2464-Rev. C, 25-Oct-10 3

IRFD9210, SiHFD9210

TA = 25 °C
T

J

= 150 °C

SINGLE PULSE

Vishay Siliconix

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

www.vishay.com Document Number: 91140
4 S10-2464-Rev. C, 25-Oct-10

I

D

, Drain Current (A)

TA, Ambient Temperature (°C)

Thermal Response (Z

thJA

)

t1, Rectangular Pulse Duration (s)t1, Rectangular Pulse Duration (s)

R

g

I

AS

0.01 W

t

p

D.U.T.

L

V

DS

+

-

V

DD

- 10 V

Vary tp to obtain
required I

AS

I

AS

V

DS

V

DD

V

DS

t

p

IRFD9210, SiHFD9210

Vishay Siliconix

R

D.U.T.

D

-

+

V

DD

V

DS

V

GS

R

g

- 10 V

Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

Fig. 10a - Switching Time Test Circuit

Fig. 9 - Maximum Drain Current vs. Ambient Temperature

V

10 %

90 %

V

t

t

d(on)

GS

DS

r

t

d(off)

t

f

Fig. 10b - Switching Time Waveforms

Document Number: 91140 www.vishay.com
S10-2464-Rev. C, 25-Oct-10 5

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Ambient

Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms

IRFD9210, SiHFD9210

Q

GS

Q

GD

Q

G

V

G

Charge

- 10 V

D.U.T.

- 3 mA

V

GS

V

DS

I

G

I

D

0.3 µF

0.2 µF

50 kΩ

12 V

Current regulator

Current sampling resistors

Same type as D.U.T.

+

-

Vishay Siliconix

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit

www.vishay.com Document Number: 91140
6 S10-2464-Rev. C, 25-Oct-10

IRFD9210, SiHFD9210

Peak Diode Recovery dV/dt Test Circuit

Vishay Siliconix

D.U.T.

+

-

R

g

Note

• Compliment N-Channel of D.U.T. for driver

Driver gate drive

P.W.

+

-

Period

Circuit layout considerations

• dV/dt controlled by R

• I

controlled by duty factor “D”

SD

• D.U.T. - device under test

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

-

g

P.W.

D =

Period

+

V

= - 10 V

GS

+

V

DD

-

a

D.U.T. lSD waveform

Reverse
recovery
current

Re-applied
voltage

D.U.T. V

Inductor current

Note

a. V

waveform

DS

= - 5 V for logic level and - 3 V drive devices

GS

Body diode forward

current

Body diode forward drop

Ripple ≤ 5 %

dI/dt

Diode recovery

dV/dt

V

DD

I

SD

Fig. 14 - For P-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91140

.

Document Number: 91140 www.vishay.com
S10-2464-Rev. C, 25-Oct-10 7

HVM DIP (High voltage)

Package Information

Vishay Siliconix

0.248 [6.29]

0.240 [6.10]

0.043 [1.09]

0.035 [0.89]

0.094 [2.38]

0.086 [2.18]

0.017 [0.43]

0.013 [0.33]

0° to 15°
2 x

E min.

E max.

0.133 [3.37]

0.125 [3.18]

0.045 [1.14]

2 x

0.035 [0.89]

A

0.100 [2.54] typ.

L

0.197 [5.00]

0.189 [4.80]

0.160 [4.06]

0.140 [3.56]

0.024 [0.60]

0.020 [0.51]

0.180 [4.57]

0.160 [4.06]

4 x

INCHES MILLIMETERS

DIM. MIN. MAX. MIN. MAX.

A 0.310 0.330 7.87 8.38

E 0.300 0.425 7.62 10.79

L 0.270 0.290 6.86 7.36

ECN: X10-0386-Rev. B, 06-Sep-10
DWG: 5974

Note

1. Package length does not include mold flash, protrusions or gate burrs. Package width does not include interlead flash or protrusions.

Document Number: 91361 www.vishay.com
Revision: 06-Sep-10 1

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

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Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
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including but not limited to the warranty expressed therein.

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Revision: 13-Jun-16

1

Document Number: 91000