Datasheet SiHFBF20S, IRFBF20L, SiHFBF20L DataSheet (Vishay)

D2PAK (TO-263)

G

D

S

I2PAK (TO-262)

IRFBF20S, SiHFBF20S, IRFBF20L, SiHFBF20L

Vishay Siliconix

Power MOSFET

PRODUCT SUMMARY

VDS (V) 900

()V

R

DS(on)

Q

(Max.) (nC) 38

g

Q

(nC) 4.7

gs

Q

(nC) 21

gd

Configuration Single

= 10 V 8.0

GS

D

FEATURES

• Halogen-free According to IEC 61249-2-21
Definition

• Surface Mount (IRFBF20S, SiHFBF20S)

•

Low-Profile Through-Hole (IRFBF20L, SiHFBF20L)

•

Available in Tape and Reel (IRFBF20S, SiHFBF20S)

• Dynamic dV/dt Rating

• 150 °C Operating Temperature

•Fast Switching

• Fully Avalanche Rated

• Compliant to RoHS Directive 2002/95/EC

DESCRIPTION

Third generation Power MOSFETs form Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.

2

The D

G

PAK is a surface mount power package capabel of
the accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible
on-resistance in any existing surface mount package. The

2

D

S

N-Channel MOSFET

PAK is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0 W in a typical surface mount application. The
through-hole version (IRFBF20L, SiHFBF20L) is available for
low-profile applications.

ORDERING INFORMATION

Package D2PAK (TO-263) D2PAK (TO-263) D2PAK (TO-263) I2PAK (TO-262)
Lead (Pb)-free and Halogen-free SiHFBF20S-GE3 SiHFBF20STRL-GE3

Lead (Pb)-free

IRFBF20SPbF IRFBF20STRLPbF
SiHFBF20S-E3 SiHFBF20STL-E3

Note

a. See device orientation.

a

SiHFBF20STRR-GE3a SiHFBF20L-GE3

a

IRFBF20STRRPbFa IRFBF20LPbF

a

SiHFBF20STR-E3

a

SiHFBF20L-E3

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage

Gate-Source Voltage

Continuous Drain Current V

Pulsed Drain Current
Linear Derating Factor 0.43 W/°C

Single Pulse Avalanche Energy

Repetitive Avalanche Current

Repetitive Avalanche Energy

Maximum Power Dissipation

Peak Diode Recovery dV/dt

Operating Junction and Storage Temperature Range

Soldering Recommendations (Peak Temperature) for 10 s

Mounting Torque 6-32 or M3 screw 10 N

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).

= 50 V; starting TJ = 25 °C, L = 117 mH, Rg = 25 , IAS = 1.7 A (see fig. 12).

b. V

DD

c. I

 1.7 A, dI/dt  70 A/μs, VDD  VDS, TJ  150 °C.

SD

d. 1.6 mm from case.
e. Uses IRFBF20, SiHFBF20 data and test conditions.

* Pb containing terminations are not RoHS compliant, exemptions may apply

Document Number: 91121
S11-1053-Rev. B, 30-May-11 1

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

e

a,e

e

V

DS

VGS

T

= 25 °C

at 10 V

GS

C

T

= 100 °C

C

I

D

IDM

c, e

b, e

a

a

T

= 25 °C

C

= 25 °C

T

A

E

AS

I

AR

E

AR

P

D

dV/dt 1.5 V/ns

T

, T

J

stg

900

± 20

1.7

1.1

6.8

180 mJ

1.7 A

5.4 mJ

54

3.1

- 55 to + 150

d

300

V

A

W

°C

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This document is subject to change without notice.

www.vishay.com/doc?91000

IRFBF20S, SiHFBF20S, IRFBF20L, SiHFBF20L

Vishay Siliconix

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient (PCB
Mounted, steady-state)

a

Maximum Junction-to-Case R

Note

a. When mounted on 1" square PCB ( FR-4 or G-10 material).

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage V

V

Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 1.1 - mV/°C

DS

Gate-Source Threshold Voltage V

Gate-Source Leakage I

Zero Gate Voltage Drain Current I

Drain-Source On-State Resistance R

Forward Transconductance g

Dynamic

Input Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Gate-Drain Charge Q

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

R

thJA

thJC

DS

GS(th)

V

GSS

-40
°C/W

-2.3

VGS = 0, ID = 250 μA 900 - - V

VDS = VGS, ID = 250 μA 2.0 - 4.0 V

= ± 20 V - - ± 100 nA

GS

VDS = 900 V, VGS = 0 V - - 100

DSS

VGS = 10 V ID = 1.0 A

DS(on)

fs

iss

-55-

oss

-18-

rss

g

--4.7

gs

--21

gd

d(on)

r

-56-

d(off)

-32-

f

V

= 720 V, VGS = 0 V, TJ = 125 °C - - 500

DS

VDS = 50 V, ID = 1.0 A

VGS = 0 V,

V

= 25 V,

DS

f = 1.0 MHz, see fig. 5

b

b

--8.0

0.6 - - S

- 490 -

--38

= 1.7 A, VDS = 360 V,

I

V

GS

= 10 V

D

see fig. 6 and 13

b

-8.0-

V

= 450 V, ID = 1.7 A,

DD

R

= 18 , VGS = 10 V, see fig. 10

g

b

-21-

μA

pFOutput Capacitance C

nC Gate-Source Charge Q

ns

www.vishay.com Document Number: 91121
2 S11-1053-Rev. B, 30-May-11

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

www.vishay.com/doc?91000

S

D

G

IRFBF20S, SiHFBF20S, IRFBF20L, SiHFBF20L

Vishay Siliconix

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current I

Pulsed Diode Forward Current

a

Body Diode Voltage V

Body Diode Reverse Recovery Time t

Body Diode Reverse Recovery Charge Q

Forward Turn-On Time t

S

I

SM

SD

rr

rr

on

MOSFET symbol
showing the
integral reverse
p - n junction diode

TJ = 25 °C, IS = 1.7 A, VGS = 0 V

TJ = 25 °C, IF = 1.7 A, dI/dt = 100 A/μs

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.
c. Uses IRFBF20/SiHFBF20 data and test conditions.

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

b

--1.7

--6.8

--1.5V

- 350 530 ns

b

- 0.85 1.3 μC

A

Fig. 1 - Typical Output Characteristics Fig. 2 - Typical Output Characteristics

Document Number: 91121 www.vishay.com
S11-1053-Rev. B, 30-May-11 3

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

www.vishay.com/doc?91000

IRFBF20S, SiHFBF20S, IRFBF20L, SiHFBF20L

Vishay Siliconix

Fig. 3 - Typical Transfer Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

www.vishay.com Document Number: 91121
4 S11-1053-Rev. B, 30-May-11

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

This document is subject to change without notice.

www.vishay.com/doc?91000

V

DS

90 %

10 %

V

GS

t

d(on)

t

r

t

d(off)

t

f

IRFBF20S, SiHFBF20S, IRFBF20L, SiHFBF20L

Vishay Siliconix

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

Fig. 9 - Maximum Drain Current vs. Case Temperature

R

D.U.T.

D

+

V

-

DD

V

DS

V

GS

R

g

10 V

Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

Fig. 10a - Switching Time Test Circuit

Fig. 10b - Switching Time Waveforms

Document Number: 91121 www.vishay.com
S11-1053-Rev. B, 30-May-11 5

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

www.vishay.com/doc?91000

IRFBF20S, SiHFBF20S, IRFBF20L, SiHFBF20L

Vishay Siliconix

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

L

V

Var y tp to obtain
required I

AS

DS

t

p

R

g

D.U.T.

I

AS

+

V

DD

-

V

DS

10 V

t

p

0.01 Ω

I

AS

Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms

V

DS

V

DD

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

www.vishay.com Document Number: 91121
6 S11-1053-Rev. B, 30-May-11

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

www.vishay.com/doc?91000

Q

GS

Q

GD

Q

G

V

G

Charge

10 V

P.W.

Period

dI/dt

Diode recovery

dV/dt

Ripple ≤ 5 %

Body diode forward drop

Re-applied
voltage

Reverse
recovery
current

Body diode forward

current

V

GS

= 10 Va

I

SD

Driver gate drive

D.U.T. l

SD

waveform

D.U.T. V

DS

waveform

Inductor current

D =

P.W.

Period

+

-

+

+

+

-

-

-

Peak Diode Recovery dV/dt Test Circuit

V

DD

• dV/dt controlled by R

g

• Driver same type as D.U.T.

•

I

SD

controlled by duty factor “D”

• D.U.T. - device under test

D.U.T.

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

R

g

Note

a. V

GS

= 5 V for logic level devices

V

DD

IRFBF20S, SiHFBF20S, IRFBF20L, SiHFBF20L

Vishay Siliconix

Current regulator

Same type as D.U.T.

50 kΩ

0.2 µF

12 V

V

GS

3 mA

0.3 µF

D.U.T.

+

V

DS

-

Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit

I

G

Current sampling resistors

I

D

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91121

Document Number: 91121 www.vishay.com
S11-1053-Rev. B, 30-May-11 7

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

Fig. 14 - For N-Channel

.

This document is subject to change without notice.

www.vishay.com/doc?91000

TO-263AB (HIGH VOLTAGE)

(Datum A)

34

E

L1

4

D

L2

4

C

1

B

B

C

3

2

B

B

Package Information

Vishay Siliconix

A

A

5

H

Detail A

B

A

c2

Gauge
plane

0° to 8°

L

L3

L4

Detail “A”
Rotated 90° CW
scale 8:1

H

B

Seating plane

A1

2 x e

Lead tip

2 x b2

2 x b

0.010 A B

MM

Plating

(c)

Section B - B and C - C

c

± 0.004 B

5

b1, b3

(b, b2)

Scale: none

M

Base
metal

c1

A

E

D1

4

5

E1

View A - A

4

MILLIMETERS INCHES MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.

A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 -

A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420

b 0.51 0.99 0.020 0.039 E1 6.22 - 0.245 -

b1 0.51 0.89 0.020 0.035 e 2.54 BSC 0.100 BSC

b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625

b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110

c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066

c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070

c2 1.14 1.65 0.045 0.065 L3 0.25 BSC 0.010 BSC

D 8.38 9.65 0.330 0.380 L4 4.78 5.28 0.188 0.208

ECN: S-82110-Rev. A, 15-Sep-08
DWG: 5970

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimensions are shown in millimeters (inches).

3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the
outmost extremes of the plastic body at datum A.

4. Thermal PAD contour optional within dimension E, L1, D1 and E1.

5. Dimension b1 and c1 apply to base metal only.

6. Datum A and B to be determined at datum plane H.

7. Outline conforms to JEDEC outline to TO-263AB.

Document Number: 91364 www.vishay.com
Revision: 15-Sep-08 1

I2PAK (TO-262) (HIGH VOLTAGE)

(Datum A)

E

L1

Package Information

Vishay Siliconix

A

A

B

c2

A

E

D

L2

0.010 A B

Lead tip

B

2 x e

M

Seating

plane

C

C

B

M

3 x b2

3 x b

L

A1

A

E1

Section A - A

Plating

c

b1, b3

(b, b2)

Section B - B and C - C

Scale: None

c

D1

Base
metal

c1

MILLIMETERS INCHES MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.

A 4.06 4.83 0.160 0.190 D 8.38 9.65 0.330 0.380

A1 2.03 3.02 0.080 0.119 D1 6.86 - 0.270 -

b 0.51 0.99 0.020 0.039 E 9.65 10.67 0.380 0.420

b1 0.51 0.89 0.020 0.035 E1 6.22 - 0.245 -

b2 1.14 1.78 0.045 0.070 e 2.54 BSC 0.100 BSC

b3 1.14 1.73 0.045 0.068 L 13.46 14.10 0.530 0.555

c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.065

c1 0.38 0.58 0.015 0.023 L2 3.56 3.71 0.140 0.146

c2 1.14 1.65 0.045 0.065

ECN: S-82442-Rev. A, 27-Oct-08
DWG: 5977

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost
extremes of the plastic body.

3. Thermal pad contour optional within dimension E, L1, D1, and E1.

4. Dimension b1 and c1 apply to base metal only.

Document Number: 91367 www.vishay.com
Revision: 27-Oct-08 1

RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead

0.420

(10.668)

0.635
(16.129)

0.355

AN826

Vishay Siliconix

(9.017)

Return to Index

0.135

(3.429)

0.200

(5.080)

Recommended Minimum Pads

Dimensions in Inches/(mm)

0.050

(1.257)

0.145

(3.683)

Document Number: 73397
11-Apr-05

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1

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

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particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
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including but not limited to the warranty expressed therein.

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Revision: 13-Jun-16

1

Document Number: 91000