Datasheet IRFBC40A, SiHFBC40A DataSheet (Vishay)

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N-Channel MOSFET

G

D

S

TO-220AB

G

D

S

IRFBC40A, SiHFBC40A

Vishay Siliconix

Power MOSFET

PRODUCT SUMMARY

VDS (V) 600

R

()V

DS(on)

Q

max. (nC) 42

g

Q

(nC) 10

gs

Q

(nC) 20

gd

Configuration Single

= 10 V 1.2

GS

FEATURES

• Low gate charge Qg results in simple drive
Requirement

• Improved gate, avalanche and dynamic dV/dt
ruggedness

• Fully characterized capacitance and avalanche voltage
and current

• Effective C

• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912

Note

*

Thi s datasheet pro vi des information about parts that are
RoHS-compliant and / or parts that are non-RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details.

APPLICATIONS

• Switch mode power supply (SMPS)

• Uninterruptible power supply

• High speed power switching

TYPICAL SMPS TOPOLOGIES

• Single transistor forward

ORDERING INFORMATION

Package TO-220AB

Lead (Pb)-free

SnPb

IRFBC40APbF

SiHFBC40A-E3

IRFBC40A

SiHFBC40A

specified

oss

Available

Available





ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V

Gate-Source Voltage V

T

= 25 °C

Continuous Drain Current V

Pulsed Drain Current

a

at 10 V

GS

C

= 100 °C 3.9

C

DS

± 30

GS

I

D

IDM 25

Linear Derating Factor 1.0 W/°C

Single Pulse Avalanche Energy

Repetitive Avalanche Current

Repetitive Avalanche Energy

Maximum Power Dissipation T

Peak Diode Recovery dV/dt

Operating Junction and Storage Temperature Range T

Soldering Recommendations (Peak temperature)

b

a

a

= 25 °C P

c

d

C

for 10 s 300

E

AS

I

AR

E

AR

D

dV/dt 6.0 V/ns

, T

J

stg

Mounting Torque 6-32 or M3 screw

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting T
c. ISD  6.2 A, dI/dt  80 A/μs, VDD  VDS, TJ  150 °C.

= 25 °C, L = 29.6 mH, Rg = 25 , IAS = 6.2 A (see fig. 12).

J

d. 1.6 mm from case.

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600

6.2

570 mJ

6.2 A

13 mJ

125 W

-55 to +150

10 lbf · in

1.1 N · m

Document Number: 91112

V

AT

°C

IRFBC40A, SiHFBC40A

S

D

G

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THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient R

Maximum Junction-to-Case (Drain) R

thJA

thCS

thJC

-62

0.50 -

-1.0

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage V

V

Temperature Coefficient

DS

Gate-Source Threshold Voltage V

Gate-Source Leakage I

Zero Gate Voltage Drain Current I

Drain-Source On-State Resistance R

Forward Transconductance g

DS

V

DS/TJ

GS(th)

V

GSS

DSS

VGS = 10 V ID = 3.7 A

DS(on)

fs

Dynamic

Input Capacitance C

Output Capacitance C

Reverse Transfer Capacitance C

Output Capacitance C

Effective Output Capacitance C

Total Gate Charge Q

Gate-Drain Charge Q

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

Gate Input Resistance R

iss

- 136 -

oss

-7.0-

rss

oss

eff. VDS = 0 V to 480 V

oss

g

--10

gs

--20

gd

d(on)

r

-31-

d(off)

-18-

f

g

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current I

Pulsed Diode Forward Current

a

Body Diode Voltage V

Body Diode Reverse Recovery Time t

Body Diode Reverse Recovery Charge Q

Forward Turn-On Time t

S

I

SM

SD

rr

rr

on

MOSFET symbol
showing the 

integral reverse
p - n junction diode

TJ = 25 °C, IF = 6.2 A, dI/dt = 100 A/μs

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.
c. C

eff. is a fixed capacitance that gives the same charging time as C

oss

VGS = 0 V, ID = 250 μA 600 - - V

Reference to 25 °C, I

= 1 mA

D

VDS = VGS, ID = 250 μA 2.0 - 4.0 V

= ± 30 V - - ± 100 nA

GS

VDS = 600 V, VGS = 0 V - - 25

= 480 V, VGS = 0 V, TJ = 125 °C - - 250

V

DS

b

VDS = 50 V, ID = 3.7 A 3.4 - - S

VGS = 0 V,

V

= 25 V,

DS

f = 1.0 MHz, see fig. 5

= 1.0 V, f = 1.0 MHz - 1487 -

V

DS

V

V

GS

= 0 V

GS

= 10 V

V

= 480 V, f = 1.0 MHz - 36 -

DS

= 6.2 A, VDS = 480 V

I

D

see fig. 6 and 13

V

= 300 V, ID = 6.2 A

DD

R

= 9.1 , RD = 47

g

see fig. 10

c

b

b

f = 1 MHz, open drain 0.6 - 3.9 

TJ = 25 °C, IS = 6.2 A, VGS = 0 V

b

b

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

while VDS is rising from 0 % to 80 % VDS.

oss

Vishay Siliconix

°C/WCase-to-Sink, Flat, Greased Surface R

-0.66-

--1.2

- 1036 -

-48-

--42

-13-

-23-

--6.2

--25

--1.5V

- 431 647 ns

-1.82.8μC

V/°C

μA

pF

nC Gate-Source Charge Q

ns

A

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VDS, Drain-to-Source Voltage (V)

I

D

, Drain-to-Source Current (A)

0.1

1

10

100

0.01

0.1

1

10

100

VGS
15 V
10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

Top

Bottom

4.5 V

20 µs PULSE WIDTH
TJ = 25 °C

TJ = 25 °C

TJ = 150 °C

5.0

4.0

7.0

6.0

8.0

9.0

10.0

0.1

1

10

100

VGS, Gate-to-Source Voltage (V)

I

D

, Drain-to-Source Current (A)

VDS = 50 V
20 µs PULSE WIDTH

ID = 6.2 A

VGS = 10 V

TJ, Junction Temperature

R

DS(on)

, Drain-to-Source On Resistance (Normalized)

20 40 60 80 100 120 140 160

0.0

0.5

1.0

1.5

2.0

2.5

3.0

-60 -40 -20 0

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

IRFBC40A, SiHFBC40A

Vishay Siliconix

Fig. 1 - Typical Output Characteristics

100

10

, Drain-to-Source Current (A)

D

I

0.1

VGS

Top

15 V
10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

Bottom

4.5 V

1

1

VDS, Drain-to-Source Voltage (V)

Fig. 2 - Typical Output Characteristics

4.5 V

20 µs PULSE WIDTH
TJ = 150 °C

10

Fig. 3 - Typical Transfer Characteristics

100

Fig. 4 - Normalized On-Resistance vs. Temperature

S16-0763-Rev. D, 02-May-16

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C

rss

C

oss

C

iss

1

10

100

1000

1

10

100

1000

10000

C, Capacitance (pF)

VDS, Drain-to-Source Voltage (V)

100000

VGS = 0 V, f = 1 MHz
C

iss

= Cgs + Cgd, Cds SHORTED

C

rss

= C

gd

C

oss

= Cds + C

gd

0

8

16

24

32

40

0

4

8

12

16

20

QG, Total Gate Charge (nC)

V

GS

, Gate-to-Source Voltage (V)

ID = 6.2 A

VDS = 480 V
VDS = 300 V
VDS = 120 V

For Test Circuit

See Fig. 13

VSD, Source-to-Drain Voltage (V)

I

SD

, Reverse Drain Current (A)

TJ = 150 °C

TJ = 25 °C

VGS = 0 V

100

0.4

0.8

0.6

1.0

1.2

0.1

1

10

10

100

1000

10000

0.1

10

100

1

I

D

, Drain Current (A)

VDS, Drain-to-Source Voltage (V)

OPERATING IN THIS AREA LIMITED

BY R

DS(on)

10 ms

1 ms

100 µs

10 µs

TC = 25 °C
TJ = 150 °C
Single Pulse

IRFBC40A, SiHFBC40A

Vishay Siliconix

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

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7.0

Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

R

D

V

GS

R

G

D.U.T.

10 V

+

-

V

DS

V

DD

V

DS

90 %

10 %

V

GS

t

d(on)

t

r

t

d(off)

t

f

0.01

0.1

1

10

0.00001 0.0001 0.001 0.01 0.1 1

t 1, Rectangular Pulse Duration (s)

Thermal Response (Z

thJC

)

0.01

0.02

0.05

0.10

0.20

D = 0.50

SINGLE PULSE

(THERMAL RESPONSE)

t

1

t

2

Notes:

1. Duty factor D = t1/ t

2

2. Peak TJ = PDM x Z

thJC

+ T

C

P

DM

6.0

5.0

4.0

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IRFBC40A, SiHFBC40A

Vishay Siliconix

3.0

, Drain Current (A)

D

I

2.0

1.0

0

25

50

75

100

125

150

TC, Case Temperature (°C)

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10a - Switching Time Test Circuit

Fig. 10b - Switching Time Waveforms

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

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25

1000

800

600

400

200

0

150

125

100

75

50

I

D

TOP 2.8 A

3.9 A
BOTTOM 6.2 A

Starting TJ, Junction Temperature (°C)

E

AS

, Single Pulse Avalanche Energy (mJ)

1200

1400

IAV, Avalanche Current (A)

V

DSav,

Avalanche Voltage (V)

820

800

780

760

740

720

0 1.0 2.0 3.0 4.0 5.0 7.06.0

Q

GS

Q

GD

Q

G

V

G

Charge

10 V

IRFBC40A, SiHFBC40A

Vishay Siliconix

15 V

Driver

+

V

-

R

V

G

20 V

DS

L

D.U.T

I

AS

0.01 Ω

t

p

Fig. 12a - Unclamped Inductive Test Circuit

V

DS

t

p

I

AS

Fig. 12b - Unclamped Inductive Waveforms

A

DD

Fig. 12d - Typical Drain-to-Source Voltage vs.

Avalanche Current

S16-0763-Rev. D, 02-May-16

Fig. 13a - Basic Gate Charge Waveform

Current regulator

Same type as D.U.T.

50 kΩ

0.2 µF

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

12 V

V

GS

Fig. 13b - Gate Charge Test Circuit

6

0.3 µF

D.U.T.

3 mA

I

G

Current sampling resistors

I

D

Document Number: 91112

+

-

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V

DS

www.vishay.com

IRFBC40A, SiHFBC40A

Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

D.U.T.

+

-

R

g

Driver gate drive

P.W.

+

-

Period

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

• dV/dt controlled by R

• Driver same type as D.U.T.

I

controlled by duty factor “D”

•

SD

• D.U.T. - device under test

-

D =

g

P.W.

Period

+

+

V

DD

-

V

= 10 Va

GS

D.U.T. l

Reverse
recovery
current

D.U.T. V

Re-applied
voltage

Inductor current

Note

a. V

waveform

SD

Body diode forward

waveform

DS

Body diode forward drop

Ripple ≤ 5 %

= 5 V for logic level devices

GS

current

dI/dt

Diode recovery

dV/dt

V

DD

I

SD

Fig. 14 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91112

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M

*

3

2

1

L

L(1)

D

H(1)

Q

Ø P

A

F

J(1)

b(1)

e(1)

e

E

b

C

Package Information

Vishay Siliconix

TO-220-1

DIM.

A 4.24 4.65 0.167 0.183

b 0.69 1.02 0.027 0.040

b(1) 1.14 1.78 0.045 0.070

c 0.36 0.61 0.014 0.024

D 14.33 15.85 0.564 0.624

E 9.96 10.52 0.392 0.414

e 2.41 2.67 0.095 0.105

e(1) 4.88 5.28 0.192 0.208

F 1.14 1.40 0.045 0.055

H(1) 6.10 6.71 0.240 0.264

J(1) 2.41 2.92 0.095 0.115

L 13.36 14.40 0.526 0.567

L(1) 3.33 4.04 0.131 0.159

Ø P 3.53 3.94 0.139 0.155

Q 2.54 3.00 0.100 0.118

ECN: X15-0364-Rev. C, 14-Dec-15
DWG: 6031

Note

• M* = 0.052 inches to 0.064 inches (dimension including

protrusion), heatsink hole for HVM

MILLIMETERS INCHES

MIN. MAX. MIN. MAX.

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Revison: 14-Dec-15

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ASE Xi’an

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Package Picture

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Document Number: 66542

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

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Revision: 13-Jun-16

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Document Number: 91000