Datasheet IRFB18N50K, SiHFB18N50K DataSheet (Vishay)

IRFB18N50K, SiHFB18N50K

Power MOSFET

Vishay Siliconix

PRODUCT SUMMARY

VDS (V) 500

(Ω)V

R

DS(on)

Q

(Max.) (nC) 120

g

Q

(nC) 34

gs

Q

(nC) 54

gd

Configuration Single

TO-220

= 10 V 0.26

GS

D

FEATURES

• Low Gate Charge Qg Results in Simple Drive
Requirement

• Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness

• Fully Characterized Capacitance and Avalanche Voltage
and Current

•Low R

• Lead (Pb)-free Available

APPLICATIONS

G

S

D

G

N-Channel MOSFET

S

• Switch Mode Power Supply (SMPS)

• Uninterruptible Power Supply

• High Speed Power Switching

• Hard Switched and High Frequency Circuits

ORDERING INFORMATION

Package TO-220

Lead (Pb)-free

SnPb

IRFB18N50KPbF

SiHFB18N50K-E3

IRFB18N50K

SiHFB18N50K

Available

RoHS*

COMPLIANT

DS(on)

ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V

Gate-Source Voltage V

= 25 °C

T

Continuous Drain Current V

Pulsed Drain Current

a

at 10 V

GS

C

= 100 °C 11

C

DS

± 30

GS

I

D

IDM 68

Linear Derating Factor 1.8 W/°C

Single Pulse Avalanche Energy

Repetitive Avalanche Current

Repetitive Avalanche Energy

Maximum Power Dissipation T

Peak Diode Recovery dV/dt

Operating Junction and Storage Temperature Range T

b

a

a

= 25 °C P

C

c

E

AS

I

AR

E

AR

D

dV/dt 7.8 V/ns

, T

J

stg

Soldering Recommendations (Peak Temperature) for 10 s 300

Mounting Torque 6-32 or M3 screw 10 N

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature.
b. Starting T
c. I

SD

d. 1.6 mm from case.

= 25 °C, L = 2.5 mH, RG = 25 Ω, IAS = 17 A.

J

≤ 17 A, dI/dt ≤ 376 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.

* Pb containing terminations are not RoHS compliant, exemptions may apply

Document Number: 91100 www.vishay.com
S09-0015-Rev. A, 19-Jan-09 1

500

17

370 mJ

17 A

22 mJ

220 W

- 55 to + 150

d

V

AT

°C

IRFB18N50K, SiHFB18N50K

Vishay Siliconix

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient

Maximum Junction-to-Case (Drain)

Note

a. R

is measured at TJ approximately 90 °C.

th

SPECIFICATIONS TJ = 25 °C, unless otherwise noted

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage V

V

Temperature Coefficient ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.59 - V/°C

DS

Gate-Source Threshold Voltage V

Gate-Source Leakage I

Zero Gate Voltage Drain Current I

Drain-Source On-State Resistance R

Forward Transconductance g

Dynamic

Input Capacitance C

Output Capacitance C

Reverse Transfer Capacitance C

Output Capacitance C

Effective Output Capacitance C

Total Gate Charge Q

Gate-Drain Charge Q

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current I

Pulsed Diode Forward Current

Body Diode Voltage V

Body Diode Reverse Recovery Time t

Body Diode Reverse Recovery Charge Q

Forward Turn-On Time t

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. C

eff. is a fixed capacitance that givs the same charging time as C

oss

www.vishay.com Document Number: 91100
2 S09-0015-Rev. A, 19-Jan-09

a

a

a

R

thJA

thCS

R

thJC

DS

GS(th)

V

GSS

-58

0.50 -

°C/WCase-to-Sink, Flat, Greased Surface R

-0.56

VGS = 0 V, ID = 250 µA 500 - - V

VDS = VGS, ID = 250 µA 3.0 - 5.0 V

= ± 30 V - - ± 100 nA

GS

VDS = 500 V, VGS = 0 V - - 50

DSS

VGS = 10 V ID = 10 A

DS(on)

fs

iss

- 330 -

oss

-38-

rss

oss

eff. VDS = 0 V to 400 V

oss

g

--34

gs

--54

gd

d(on)

r

-45-

d(off)

-30-

f

S

I

SM

SD

rr

rr

on

V

= 400 V, VGS = 0 V, TJ = 125 °C - - 250

DS

b

- 0.26 0.29 Ω

VDS = 50 V, ID = 10 A 6.4 - - S

- 2830 -

- 155 -

f = 1.0 MHz, see fig. 5

V

= 0 V

GS

VGS = 0 V,

V

= 25 V,

DS

= 1.0 V, f = 1.0 MHz - 3310 -

V

DS

V

= 400 V, f = 1.0 MHz - 93 -

DS

c

- - 120

I

= 17 A, VDS = 400 V,

D

see fig. 6 and 13

V

= 10 V

GS

V

= 250 V, ID = 17 A,

DD

R

= 7.5 Ω, see fig. 10

G

MOSFET symbol
showing the
integral reverse

p - n junction diode

TJ = 25 °C, IS = 17 A, VGS = 0 V

TJ = 25 °C, IF = 17 A, dI/dt = 100 A/µs

b

-22-

-60-

b

D

G

S

b

--17

--68

--1.5V

- 520 780 ns

b

-5.38.0µC

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

while VDS is rising from 0 to 80 % VDS.

oss

µA

pF

nC Gate-Source Charge Q

ns

A

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

)
A

(
t
n
e

r

r

u

C
e

c

r

u

o
S

­o

t

­n

i
a

r
D

,

D

I

100

10

1

0.1

0.01

0.001

VGS
TOP 15V
12V
10V

8.0V

7.0V

6.0V

5.5V
BOTTOM 5.0V

5.0V

20µs PULSE WIDTH
Tj = 25°C

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

Fig. 1 - Typical Output Characteristics

t (A)
n
e

r

r

u

C
e

c

r

u

o
S

­o

t

­n

i
a

r
D

,
I

IRFB18N50K, SiHFB18N50K

Vishay Siliconix

100.00

TJ= 150°C

10.00

1.00

TJ= 25°C

0.10

D

VDS= 100V

0.01

5.0 6.0 7.0 8.0 9.0 10.0

VGS , Gate-to-Source Voltage (V)

Fig. 3 - Typical Transfer Characteristics

20µs PULSE WIDTH

100

TOP 15V

10

1

0.1

12V
10V

8.0V

7.0V

6.0V

5.5V
BOTTOM 5.0V

)
A

(
t
n
e

r

r

u

C
e

c

r

u

o
S

­o

t

­n

i
a

r
D

,

D

I

VGS

5.0V

20µs PULSE WIDTH
Tj = 150°C

0.01

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

Fig. 2 - Typical Output Characteristics

R , Drain-to-Source On Resistance

3.0

2.5

2.0

1.5

(Normalized)

1.0

0.5

DS(on)

0.0

17A

I =

D

V =

GS

-60 -40 -20 0 20 40 60 80 100 120 140 160

T , Junction Tem perature ( C)

J

°

Fig. 4 - Normalized On-Resistance vs. Temperature

10V

Document Number: 91100 www.vishay.com
S09-0015-Rev. A, 19-Jan-09 3

IRFB18N50K, SiHFB18N50K

100

Vishay Siliconix

100000

10000

)
F
p

(
e
c
n
a

t

i

1000

c
a
p
a

C
,

C

100

V

= 0V, f = 1 MHZ

GS

C

= C

iss

rss

oss

= C

= C

gs

gd

ds

C

C

+ Cgd, C

+ C

gd

Ciss

Coss

SHORTED

ds

Crss

10

1 10 100 1000

VDS, Drain-to-Source Voltage (V)

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

20

I =

17A

D

16

12

8

4

GS

V , Gate-to-Source Voltage (V)

0

0 30 60 90 120 150

V = 400V

DS

V = 250V

DS

V = 100V

DS

Q , Total Gate Charge (nC)

G

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

°

T = 150 C

J

10

°

T = 25 C

J

1

SD

I , Reverse Drain Current (A)

V = 0 V

0.1

0.2 0.5 0.8 1.1 1.4

V ,Source-to-Drain Voltage (V)

SD

GS

Fig. 7 - Typical Source-Drain Diode Forward Voltage

1000

OPERATION IN THIS AREA LIMITED

100

10

D

I , Drain Current (A)I , Drain Current (A)

1

°

= 25 C

C

T T= 150 C

J

Single Pulse

0.1
10 100 1000 10000

V , Drain-to-Source Voltage (V)

DS

BY R

DS(on)

10us

100us

1ms

10ms

°

Fig. 8 - Maximum Safe Operating Area

www.vishay.com Document Number: 91100
4 S09-0015-Rev. A, 19-Jan-09

20

15

10

IRFB18N50K, SiHFB18N50K

Vishay Siliconix

R

D.U.T.

D

+

V

-

DD

V

DS

V

GS

R

G

10 V

Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

Fig. 10a - Switching Time Test Circuit

D

I , Drain Current (A)

5

0

25 50 75 100 125 150

T , Case Temperature ( C)

C

°

Fig. 9 - Maximum Drain Current vs. Case Temperature

1

D = 0.50

thJC

(Z )

0.01

0.1

0.20

0.10

0.05

0.02

0.01

SINGLE PULSE

(THERMAL RESPONSE)

V

DS

90 %

10 %

V

GS

t

t

d(on)

r

Fig. 10b - Switching Time Waveforms

P

DM

Thermal Response

Notes:

1. Duty factor D =t / t

0.001

0.00001 0.0001 0.001 0.01 0.1 1

t , Rectangular Pulse Duration (sec)

1

2. Peak T = P x Z + T

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

1 2

J DM thJC C

t

t

d(off)

f

t

1

t

2

V

DS

R

V

G

20 V

15 V

t

p

DS

t

L

D.U.T.

I

AS

0.01 Ω

p

Driver

+

V

A

DD

-

I

AS

Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms

Document Number: 91100 www.vishay.com
S09-0015-Rev. A, 19-Jan-09 5

IRFB18N50K, SiHFB18N50K

Vishay Siliconix

750

600

450

300

150

AS

E , Single Pulse Avalanche Energy (mJ)

0

25 50 75 100 125 150

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Q

V

GS

Q

GS

V

G

G

Q

GD

Charge

Fig. 13a - Basic Gate Charge Waveform

I

TOP

D

7.6A
11A

BOTTOM

Starting T , Junction Temperature ( C)

J

17A

°

Current regulator

Same type as D.U.T.

12 V

V

GS

Fig. 13b - Gate Charge Test Circuit

50 kΩ

0.2 µF

0.3 µF

3 mA

I

G

Current sampling resistors

D.U.T.

I

D

+

V

DS

-

www.vishay.com Document Number: 91100
6 S09-0015-Rev. A, 19-Jan-09

IRFB18N50K, SiHFB18N50K

Peak Diode Recovery dV/dt Test Circuit

Vishay Siliconix

D.U.T.

+

-

R

G

Driver gate drive

P.W.

+

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

-

• dV/dt controlled by R

• Driver same type as D.U.T.

• I

controlled by duty factor "D"

SD

• D.U.T. - device under test

Period

-

D =

G

P.W.

Period

+

+

V

DD

-

= 10 V*

V

GS

waveform

SD

Body diode forward

current

waveform

DS

Body diode forward drop

Ripple ≤ 5 %

= 5 V for logic level devices

GS

Diode recovery

dV/dt

dI/dt

V

DD

I

SD

Reverse
recovery
current

Re-applied
voltage

D.U.T. I

D.U.T. V

Inductor current

* V

Fig. 14 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91100

.

Document Number: 91100 www.vishay.com
S09-0015-Rev. A, 19-Jan-09 7

www.vishay.com

M

*

3

2

1

L

L(1)

D

H(1)

Q

Ø P

A

F

J(1)

b(1)

e(1)

e

E

b

C

Package Information

Vishay Siliconix

TO-220-1

DIM.

A 4.24 4.65 0.167 0.183

b 0.69 1.02 0.027 0.040

b(1) 1.14 1.78 0.045 0.070

c 0.36 0.61 0.014 0.024

D 14.33 15.85 0.564 0.624

E 9.96 10.52 0.392 0.414

e 2.41 2.67 0.095 0.105

e(1) 4.88 5.28 0.192 0.208

F 1.14 1.40 0.045 0.055

H(1) 6.10 6.71 0.240 0.264

J(1) 2.41 2.92 0.095 0.115

L 13.36 14.40 0.526 0.567

L(1) 3.33 4.04 0.131 0.159

Ø P 3.53 3.94 0.139 0.155

Q 2.54 3.00 0.100 0.118

ECN: X15-0364-Rev. C, 14-Dec-15
DWG: 6031

Note

• M* = 0.052 inches to 0.064 inches (dimension including
protrusion), heatsink hole for HVM

MILLIMETERS INCHES

MIN. MAX. MIN. MAX.

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Revison: 14-Dec-15

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ASE Xi’an

For technical questions, contact: [e-mail]

Package Picture

1

Document Number: 66542

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Revision: 13-Jun-16

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Document Number: 91000