Datasheet IRF840S, SiHF840S DataSheet (Vishay)

www.vishay.com

N-Channel MOSFET

G

D

S

D2PAK (TO-263)

G

D

S

Available

Available

IRF840S, SiHF840S

Vishay Siliconix

Power MOSFET

PRODUCT SUMMARY

VDS (V) 500

R

()V

DS(on)

Q

max. (nC) 63

g

Q

(nC) 9.3

gs

Q

(nC) 32

gd

Configuration Single

= 10 V 0.85

GS

FEATURES

• Surface mount

• Available in tape and reel

• Dynamic dV/dt rating

• Repetitive avalanche rated

• Fast switching

• Ease of paralleling

• Simple drive requirement

• Material categorization: for definitions of
compliance please see www.vishay.com/doc?99912

Note

*

Thi s datasheet pro vi des information about parts that are
RoHS-compliant and / or parts that are non-RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details.

DESCRIPTION

Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.

2

The D

PAK (TO-263) is a surface mount power package
capable of accommodating die size up to HEX-4. It provides
the highest power capability and the lowest possible
on-resistance in any existing surface mount package. The

2

D

PAK (TO-263) is suitable for high current applications
because of its low internal connection resistance and can
dissipate up to 2.0 W in a typical surface mount application.

ORDERING INFORMATION

Package D2PAK (TO-263) D2PAK (TO-263) D2PAK (TO-263)

Lead (Pb)-free and Halogen-free SiHF840S-GE3 SiHF840STRL-GE3

Lead (Pb)-free

IRF840SPbF IRF840STRLPbF

SiHF840S-E3 SiHF840STL-E3

a

a

a

SiHF840STRR-GE3

IRF840STRRPbF

SiHF840STR-E3

a

a

a

Note

a. See device orientation.

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V

Gate-Source Voltage V

T

= 25 °C

Continuous Drain Current V

Pulsed Drain Current

a

at 10 V

GS

C

= 100 °C 5.1

C

DS

± 20

GS

I

D

IDM 32

Linear Derating Factor 1.0

Linear Derating Factor (PCB mount)

Single Pulse Avalanche Energy

Avalanche Current

a

Repetitive Avalanche Energy

Maximum Power Dissipation T

Maximum Power Dissipation (PCB mount)

Peak Diode Recovery dV/dt

Operating Junction and Storage Temperature Range T

Soldering Recommendations (Peak temperature)

e

b

a

= 25 °C

e

c

d

C

TA = 25 °C 3.1

for 10 s 300

E

AS

I

AR

E

AR

P

D

dV/dt 3.5 V/ns

, T

J

stg

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V

= 50 V, starting TJ = 25 °C, L = 14 mH, Rg = 25 , IAS = 8.0 A (see fig. 12).

DD

c. ISD  8.0 A, dI/dt  100 A/μs, VDD  VDS, TJ  150 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).

S16-0754-Rev. D, 02-May-16

1

For technical questions, contact: [e-mail]

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

500

8.0

0.025

510 mJ

8.0 A

13 mJ

125

-55 to +150

Document Number: 91071

V

AT

W/°C

W

°C





IRF840S, SiHF840S

D

S

G

S

D

G

www.vishay.com

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient R

Maximum Junction-to-Ambient 
(PCB mount)

a

Maximum Junction-to-Case (Drain) R

thJA

R

thJA

thJC

-62

-40

-1.0

Note

a. When mounted on 1" square PCB (FR-4 or G-10 material).

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage V

V

Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.78 - V/°C

DS

Gate-Source Threshold Voltage V

Gate-Source Leakage I

Zero Gate Voltage Drain Current I

Drain-Source On-State Resistance R

Forward Transconductance g

DS

GS(th)

V

GSS

DSS

VGS = 10 V ID = 4.8 A

DS(on)

fs

Dynamic

Input Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Gate-Drain Charge Q

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

Internal Drain Inductance L

Internal Source Inductance L

Gate Input Resistance R

iss

- 310 -

oss

- 120 -

rss

g

--9.3

gs

--32

gd

d(on)

r

-49-

d(off)

-20-

f

D

V

Between lead,
6 mm (0.25") from
package and center of

S

g

die contact

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current I

Pulsed Diode Forward Current

a

Body Diode Voltage V

Body Diode Reverse Recovery Time t

Body Diode Reverse Recovery Charge Q

Forward Turn-On Time t

S

I

SM

SD

rr

rr

on

MOSFET symbol
showing the 
integral reverse
p - n junction diode

TJ = 25 °C, IF = 8.0 A, dI/dt = 100 A/μs

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.

VGS = 0, ID = 250 μA 500 - - V

VDS = VGS, ID = 250 μA 2.0 - 4.0 V

= ± 20 V - - ± 100 nA

GS

VDS = 500 V, VGS = 0 V - - 25

= 400 V, VGS = 0 V, TJ = 125 °C - - 250

V

DS

VDS = 50 V, ID = 4.8 A

b

b

VGS = 0 V,

V

= 25 V,

DS

f = 1.0 MHz, see fig. 5

= 8.0 A, VDS = 400 V,

I

= 10 V

GS

V

R

= 9.1 , RD = 31 , see fig. 10

g

D

see fig. 6 and 13

= 250 V, ID = 8.0 A,

DD

b

b

f = 1 MHz, open drain 0.6 - 2.8 

TJ = 25 °C, IS = 8.0 A, VGS = 0 V

b

b

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Vishay Siliconix

°C/W

- - 0.85 

4.9 - - S

- 1300 -

--63

-14-

-23-

-4.5-

-7.5-

--8.0

--32

--2.0V

- 460 970 ns

-4.28.9μC

μA

pFOutput Capacitance C

nC Gate-Source Charge Q

ns

nH

A

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

For technical questions, contact: [e-mail]

S16-0754-Rev. D, 02-May-16

2

Document Number: 91071

www.vishay.com

91071_01

VDS, Drain-to-Source Voltage (V)

I

D

, Drain Current (A)

10

1

10

0

10

0

10

1

Bottom

To p

V

GS

15 V
10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

20 µs Pulse Width
T

C

= 25 °C

4.5 V

91071_02

10

1

10

0

10

0

10

1

I

D

, Drain Current (A)

4.5 V

Bottom

To p

V

GS

15 V
10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

20 µs Pulse Width
T

C

= 150 °C

V

DS

,

Drain-to-Source Voltage (V)

91071_03

25 °C

150 °C

20 µs Pulse Width
V

DS

= 50 V

10

1

10

0

I

D

, Drain Current (A)

V

GS

,

Gate-to-Source Voltage (V)

5678910

4

91071_05

2500

2000

1500

1000

0

500

10

0

10

1

Capacitance (pF)

V

DS

,

Drain-to-Source Voltage (V)

C

iss

C

rss

C

oss

V

GS

= 0 V, f = 1 MHz

C

iss

= Cgs + Cgd, Cds Shorted

C

rss

= C

gd

C

oss

= Cds + C

gd

91071_06

QG, Total Gate Charge (nC)

V

GS

, Gate-to-Source Voltage (V)

20

16

12

8

0

4

0

15

75

6045

30

ID = 8.0 A

For test circuit
see figure 13

V

DS

= 250 V

V

DS

= 100 V

V

DS

= 400 V

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

IRF840S, SiHF840S

3.0

ID = 8.0 A

= 10 V

V

GS

2.5

2.0

1.5

(Normalized)

1.0

0.5

, Drain-to-Source On Resistance

DS(on)

0.0

R

- 60 - 40 - 20 0 20 40 60 80 100 120 140 160

T

Junction Temperature (°C)

91071_04

,

J

Vishay Siliconix

Fig. 1 - Typical Output Characteristics, TC = 25 °C

Fig. 2 - Typical Output Characteristics, T

= 150 °C

C

Fig. 4 - Normalized On-Resistance vs. Temperature

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

S16-0754-Rev. D, 02-May-16

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

Fig. 3 - Typical Transfer Characteristics

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

For technical questions, contact: [e-mail]

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

3

Document Number: 91071

www.vishay.com

91071_08

10 µs

100 µs

1 ms

10 ms

TC = 25 °C
T

J

= 150 °C

Single Pulse

VDS, Drain-to-Source Voltage (V)

I

D

, Drain Current (A)

10

2

0.1

2

5

2

1

5

10

2

5

25

1

251025

10

2

25

10

3

25

10

4

0.1

Operation in this area limited

by R

DS(on)

Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

R

D

V

GS

R

g

D.U.T.

10 V

+

-

V

DS

V

DD

V

DS

90 %

10 %

V

GS

t

d(on)

t

r

t

d(off)

t

f

IRF840S, SiHF840S

Vishay Siliconix

8.0

1

10

150 °C

25 °C

, Reverse Drain Current (A)

SD

I

91071_07

0

10

0.4 1.00.80.6

VSD, Source-to-Drain Voltage (V)

1.2

V

= 0 V

GS

1.4

Fig. 7 - Typical Source-Drain Diode Forward Voltage

6.0

4.0

, Drain Current (A)

D

2.0

I

0.0
25 1501251007550

91071_09

TC, Case Temperature (°C)

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10a - Switching Time Test Circuit

Fig. 8 - Maximum Safe Operating Area

Fig. 10b - Switching Time Waveforms

10

)

thJC

1

D = 0.5

0.2

0.1

0.1

0.05

Thermal Response (Z

S16-0754-Rev. D, 02-May-16

91071_11

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

0.02

0.01

-2

10

10

-3

-5

10

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Single Pulse
(Thermal Response)

-4

10

-3

10

-2

10

t1, Rectangular Pulse Duration (s)

4

For technical questions, contact: [e-mail]

Notes:

1. Duty Factor, D = t

2. Peak Tj = PDM x Z

0.1 1 10

P

DM

Document Number: 91071

t

1

t

2

1/t2

+ T

thJC

C

2

10

IRF840S, SiHF840S

R

g

I

AS

0.01 Ω

t

p

D.U.T.

L

V

DS

+

-

V

DD

10 V

Var y t

p

to obtain

required I

AS

91071_12c

Bottom

To p

I

D

3.6 A

5.1 A

8.0 A

VDD = 50 V

1200

0

200

400

600

800

1000

25 150

125

10075

50

Starting T

J

, Junction Temperature (°C)

E

AS

, Single Pulse Energy (mJ)

Q

GS

Q

GD

Q

G

V

G

Charge

10 V

www.vishay.com

V

DS

I

AS

Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms

Vishay Siliconix

V

DS

t

p

V

DD

S16-0754-Rev. D, 02-May-16

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Current regulator

Same type as D.U.T.

50 kΩ

0.2 µF

12 V

V

GS

0.3 µF

D.U.T.

3 mA

I

G

Current sampling resistors

Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

5

For technical questions, contact: [e-mail]

Document Number: 91071

+

V

DS

-

I

D

www.vishay.com

P.W.

Period

dI/dt

Diode recovery

dV/dt

Ripple ≤ 5 %

Body diode forward drop

Re-applied
voltage

Reverse
recovery
current

Body diode forward

current

V

GS

= 10 Va

I

SD

Driver gate drive

D.U.T. l

SD

waveform

D.U.T. V

DS

waveform

Inductor current

D =

P.W.

Period

+

-

+

+

+

-

-

-

Peak Diode Recovery dV/dt Test Circuit

V

DD

• dV/dt controlled by R

g

• Driver same type as D.U.T.

•

I

SD

controlled by duty factor “D”

• D.U.T. - device under test

D.U.T.

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

R

g

Note

a. V

GS

= 5 V for logic level devices

V

DD

IRF840S, SiHF840S

Vishay Siliconix

Fig. 14 - For N-Channel



Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91071

S16-0754-Rev. D, 02-May-16

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

.

6

For technical questions, contact: [e-mail]

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Document Number: 91071

TO-263AB (HIGH VOLTAGE)

(Datum A)

34

E

L1

4

D

L2

4

C

1

B

B

C

3

2

B

B

Package Information

Vishay Siliconix

A

A

5

H

Detail A

B

A

c2

Gauge
plane

0° to 8°

L

L3

L4

Detail “A”
Rotated 90° CW
scale 8:1

H

B

Seating plane

A1

2 x e

Lead tip

2 x b2

2 x b

0.010 A B

MM

Plating

(c)

Section B - B and C - C

c

± 0.004 B

5

b1, b3

(b, b2)

Scale: none

M

Base
metal

c1

A

E

D1

4

5

E1

View A - A

4

MILLIMETERS INCHES MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.

A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 -

A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420

b 0.51 0.99 0.020 0.039 E1 6.22 - 0.245 -

b1 0.51 0.89 0.020 0.035 e 2.54 BSC 0.100 BSC

b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625

b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110

c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066

c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070

c2 1.14 1.65 0.045 0.065 L3 0.25 BSC 0.010 BSC

D 8.38 9.65 0.330 0.380 L4 4.78 5.28 0.188 0.208

ECN: S-82110-Rev. A, 15-Sep-08
DWG: 5970

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimensions are shown in millimeters (inches).

3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the
outmost extremes of the plastic body at datum A.

4. Thermal PAD contour optional within dimension E, L1, D1 and E1.

5. Dimension b1 and c1 apply to base metal only.

6. Datum A and B to be determined at datum plane H.

7. Outline conforms to JEDEC outline to TO-263AB.

Document Number: 91364 www.vishay.com
Revision: 15-Sep-08 1

Legal Disclaimer Notice

www.vishay.com

Vishay

Disclaimer



ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.

Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of
typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding
statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a
particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk.
Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for
such applications.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document
or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.

Revision: 13-Jun-16

1

Document Number: 91000