Datasheet IRF840, SiHF840 DataSheet (Vishay)

Page 1
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N-Channel MOSFET
G
D
S
TO-220AB
G
D
S
IRF840, SiHF840
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V) 500
R
()V
DS(on)
Q
max. (nC) 63
g
Q
(nC) 9.3
gs
Q
(nC) 32
gd
Configuration Single
= 10 V 0.85
GS
FEATURES
• Dynamic dV/dt rating
• Repetitive avalanche rated
• Fast switching
• Ease of paralleling
• Simple drive requirements
• Material categorization: for definitions of compliance please see www.vishay.com/doc?99912
Note
*
Thi s datasheet pro vi des information about parts that are RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details.
DESCRIPTION
Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-220AB package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 W. The low thermal resistance and low package cost of the TO-220AB contribute to its wide acceptance throughout the industry.
ORDERING INFORMATION
Package TO-220AB
Lead (Pb)-free
SnPb
IRF840PbF
SiHF840-E3
IRF840
SiHF840
Available
Available
  
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage V
Gate-Source Voltage V
T
= 25 °C
Continuous Drain Current V
Pulsed Drain Current
a
at 10 V
GS
C
= 100 °C 5.1
C
DS
± 20 V
GS
I
D
IDM 32
Linear Derating Factor 1.0 W/°C
Single Pulse Avalanche Energy
Repetitive Avalanche Current
Repetitive Avalanche Energy
Maximum Power Dissipation T
Peak Diode Recovery dV/dt
Operating Junction and Storage Temperature Range T
Soldering Recommendations (Peak temperature)
b
a
a
= 25 °C P
c
d
C
for 10 s 300
E
AS
I
AR
E
AR
D
dV/dt 3.5 V/ns
, T
J
stg
Mounting Torque 6-32 or M3 screw
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. V
= 50 V, starting TJ = 25 °C, L = 14 mH, Rg = 25 , IAS = 8.0 A (see fig. 12).
DD
c. ISD 8.0 A, dI/dt 100 A/μs, VDD VDS, TJ 150 °C. d. 1.6 mm from case.
S16-0754-Rev. D, 02-May-16
1
For technical questions, contact: hvm@vishay.com
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
500 V
8.0
510 mJ
8.0 A
13 mJ
125 W
-55 to +150
10 lbf · in
1.1 N · m
Document Number: 91070
AT
°C
Page 2
IRF840, SiHF840
D
S
G
S
D
G
www.vishay.com
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient R
Maximum Junction-to-Case (Drain) R
thJA
thCS
thJC
-62
0.50 -
-1.0
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage V
V
Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.78 - V/°C
DS
Gate-Source Threshold Voltage V
Gate-Source Leakage I
Zero Gate Voltage Drain Current I
Drain-Source On-State Resistance R
Forward Transconductance g
DS
GS(th)
V
GSS
DSS
V
DS(on)
fs
Dynamic
Input Capacitance C
Reverse Transfer Capacitance C
Total Gate Charge Q
Gate-Drain Charge Q
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Internal Drain Inductance L
Internal Source Inductance L
Gate Input Resistance R
iss
-310-
oss
-120-
rss
g
--9.3
gs
--32
gd
d(on)
r
-49-
d(off)
-20-
f
D
Between lead, 6 mm (0.25") from package and center of
S
g
die contact
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current I
Pulsed Diode Forward Current
a
Body Diode Voltage V
Body Diode Reverse Recovery Time t
Body Diode Reverse Recovery Charge Q
Forward Turn-On Time t
S
I
SM
SD
rr
rr
on
MOSFET symbol showing the
integral reverse p - n junction diode
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 μs; duty cycle  2 %.
VGS = 0 V, ID = 250 μA 500 - - V
VDS = VGS, ID = 250 μA 2.0 - 4.0 V
= ± 20 V - - ± 100 nA
GS
VDS = 500 V, VGS = 0 V - - 25
= 400 V, VGS = 0 V, TJ = 125 °C - - 250
V
DS
= 10 V ID = 4.8 A
GS
VDS = 50 V, ID = 4.8 A
b
b
VGS = 0 V,
V
= 25 V,
DS
f = 1.0 MHz, see fig. 5
= 8 A, VDS = 400 V,
I
V
= 10 V
GS
V
R
= 9.1 , RD = 31, see fig. 10
g
D
see fig. 6 and 13
= 250 V, ID = 8 A
DD
b
b
f = 1 MHz, open drain 0.6 - 2.8
TJ = 25 °C, IS = 8 A, VGS = 0 V
TJ = 25 °C, IF = 8 A, dI/dt = 100 A/μs
b
b
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Vishay Siliconix
°C/WCase-to-Sink, Flat, Greased Surface R
- - 0.85
4.9 - - S
- 1300 -
--63
-14-
-23-
-4.5-
-7.5-
--8.0
--32
--2.0V
- 460 970 ns
-4.28.C
μA
pFOutput Capacitance C
nC Gate-Source Charge Q
ns
nH
A
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
For technical questions, contact: hvm@vishay.com
S16-0754-Rev. D, 02-May-16
2
Document Number: 91070
Page 3
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91070_01
VDS, Drain-to-Source Voltage (V)
I
D
, Drain Current (A)
10
1
10
0
10
0
10
1
Bottom
To p
V
GS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
4.5 V
20 µs Pulse Width T
C
= 25 °C
4.5 V
91070_03
25 °C
150 °C
20 µs Pulse Width V
DS
= 50 V
10
1
10
0
I
D
, Drain Current (A)
V
GS
,
Gate-to-Source Voltage (V)
5678910
4
91070_05
2500
2000
1500
1000
0
500
10
0
10
1
Capacitance (pF)
V
DS
,
Drain-to-Source Voltage (V)
C
iss
C
rss
C
oss
V
GS
= 0 V, f = 1 MHz
C
iss
= Cgs + Cgd, Cds Shorted
C
rss
= C
gd
C
oss
= Cds + C
gd
91070_06
QG, Total Gate Charge (nC)
V
GS
, Gate-to-Source Voltage (V)
20
16
12
8
0
4
0
15
75
6045
30
ID = 8.0 A
For test circuit see figure 13
V
DS
= 250 V
V
DS
= 100 V
V
DS
= 400 V
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
3.0
ID = 8.0 A
= 10 V
V
GS
2.5
2.0
1.5
(Normalized)
1.0
0.5
, Drain-to-Source On Resistance
DS(on)
0.0
R
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160
T
Junction Temperature (°C)
91070_04
,
J
IRF840, SiHF840
Vishay Siliconix
Fig. 1 - Typical Output Characteristics, TC = 25 °C
V
To p
1
10
Bottom
, Drain Current (A)
D
I
0
10
0
10
91070_02
Fig. 2 - Typical Output Characteristics, T
GS
15 V 10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
4.5 V
1
10
V
Drain-to-Source Voltage (V)
,
DS
4.5 V
20 µs Pulse Width
= 150 °C
T
C
= 150 °C
C
Fig. 4 - Normalized On-Resistance vs. Temperature
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
S16-0754-Rev. D, 02-May-16
Fig. 3 - Typical Transfer Characteristics
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For technical questions, contact: hvm@vishay.com
Fig. 6 - Typical Gate Charge vs. Drain-to-Source Voltage
3
Document Number: 91070
Page 4
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91070_08
10 µs
100 µs
1 ms
10 ms
TC = 25 °C T
J
= 150 °C
Single Pulse
VDS, Drain-to-Source Voltage (V)
I
D
, Drain Current (A)
10
2
0.1
2
5
2
1
5
10
2
5
25
1
251025
10
2
25
10
3
25
10
4
0.1
Operation in this area limited
by R
DS(on)
Pulse width 1 µs Duty factor 0.1 %
R
D
V
GS
R
G
D.U.T.
10 V
+
-
V
DS
V
DD
V
DS
90 %
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
0 - 0.5
0.2
0.1
0.05
0.02
0.01
Single Pulse (Thermal Response)
P
DM
t
1
t
2
Notes:
1. Duty Factor, D = t
1/t2
2. Peak Tj = PDM x Z
thJC
+ T
C
Thermal Response (Z
thJC
)
10
-5
10
-4
10
-3
10
-2
0.1 1 10
10
2
10
1
0.1
10
-3
10
-2
IRF840, SiHF840
Vishay Siliconix
8.0
150 °C
1
10
25 °C
, Reverse Drain Current (A)
SD
I
91070_07
0
10
0.4 1.00.80.6
VSD, Source-to-Drain Voltage (V)
1.2
V
= 0 V
GS
1.4
Fig. 7 - Typical Source-Drain Diode Forward Voltage
6.0
4.0
, Drain Current (A)
D
2.0
I
0.0 25 1501251007550
91070_09
TC, Case Temperature (°C)
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10a - Switching Time Test Circuit
Fig. 8 - Maximum Safe Operating Area
Fig. 10b - Switching Time Waveforms
S16-0754-Rev. D, 02-May-16
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
For technical questions, contact: hvm@vishay.com
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
4
Document Number: 91070
Page 5
IRF840, SiHF840
R
G
I
AS
0.01 Ω
t
p
D.U.T.
L
V
DS
+
-
V
DD
10 V
Var y tp to obtain required I
AS
91070_12c
Bottom
To p
I
D
3.6 A
5.1 A
8.0 A
VDD = 50 V
1200
0
200
400
600
800
1000
25 150
125
10075
50
Starting T
J
, Junction Temperature (°C)
E
AS
, Single Pulse Energy (mJ)
Q
GS
Q
GD
Q
G
V
G
Charge
10 V
www.vishay.com
t
p
V
DS
I
AS
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms
Vishay Siliconix
V
DS
V
DD
S16-0754-Rev. D, 02-May-16
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
0.2 µF
12 V
V
GS
0.3 µF
D.U.T.
3 mA
I
G
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit
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5
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Document Number: 91070
+
V
DS
-
I
D
Page 6
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P.W.
Period
dI/dt
Diode recovery
dV/dt
Ripple ≤ 5 %
Body diode forward drop
Re-applied voltage
Reverse recovery current
Body diode forward
current
VGS = 10 V a
V
DD
I
SD
Driver gate drive
D.U.T. I
SD
waveform
D.U.T. VDSwaveform
Inductor current
D =
P.W.
Period
+
-
+
+
+
-
-
-
Note
a. V
GS
= 5 V for logic level devices
Peak Diode Recovery dV/dt Test Circuit
V
DD
• dV/dt controlled by R
g
• Driver same type as D.U.T.
• I
SD
controlled by duty factor “D”
• D.U.T. - device under test
D.U.T.
Circuit layout considerations
• Low stray inductance
Ground plane
• Low leakage inductance current transformer
R
g
IRF840, SiHF840
Vishay Siliconix
Fig. 14 - For N-Channel
        
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91070
S16-0754-Rev. D, 02-May-16
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
.
6
For technical questions, contact: hvm@vishay.com
Document Number: 91070
Page 7
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M
*
3
2
1
L
L(1)
D
H(1)
Q
Ø P
A
F
J(1)
b(1)
e(1)
e
E
b
C
Package Information
Vishay Siliconix
TO-220-1
DIM.
A 4.24 4.65 0.167 0.183
b 0.69 1.02 0.027 0.040
b(1) 1.14 1.78 0.045 0.070
c 0.36 0.61 0.014 0.024
D 14.33 15.85 0.564 0.624
E 9.96 10.52 0.392 0.414
e 2.41 2.67 0.095 0.105
e(1) 4.88 5.28 0.192 0.208
F 1.14 1.40 0.045 0.055
H(1) 6.10 6.71 0.240 0.264
J(1) 2.41 2.92 0.095 0.115
L 13.36 14.40 0.526 0.567
L(1) 3.33 4.04 0.131 0.159
Ø P 3.53 3.94 0.139 0.155
Q 2.54 3.00 0.100 0.118
ECN: X15-0364-Rev. C, 14-Dec-15 DWG: 6031
Note
• M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM
MILLIMETERS INCHES
MIN. MAX. MIN. MAX.
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Revison: 14-Dec-15
ASE Xi’an
For technical questions, contact: hvm@vishay.com
Package Picture
1
Document Number: 66542
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Disclaimer
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Revision: 13-Jun-16
1
Document Number: 91000
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