Datasheet IRF730AS, SiHF730AS, IRF730AL, SiHF730AL DataSheet (Vishay)

N-Channel MOSFET

G

D

S

D2PAK (TO-263)

G

D

S

I2PAK (TO-262)

G

D

S

IRF730AS, SiHF730AS, IRF730AL, SiHF730AL

Vishay Siliconix

Power MOSFET

PRODUCT SUMMARY

VDS (V) 400

(Max.) ()V

R

DS(on)

Q

(Max.) (nC) 22

g

Q

(nC) 5.8

gs

Q

(nC) 9.3

gd

Configuration Single

= 10 V 1.0

GS

FEATURES

• Halogen-free According to IEC 61249-2-21
Definition

• Low Gate Charge Q
Requirement

• Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness

• Fully Characterized Capacitance and Avalanche Voltage
and Current

• Effective C

Specified

oss

Results in Simple Drive

g

• Compliant to RoHS Directive 2002/95/EC

APPLICATIONS

• Switch Mode Power Supply (SMPS)

• Uninterruptible Power Supply

• High Sspeed Power Switching

TYPICAL SMPS TOPOLOGIES

• Single Transistor Flyback Xfmr. Reset

• Single Transistor Forward Xfmr. Reset (Both US Line Input
Only)

ORDERING INFORMATION

Package D2PAK (TO-263) D2PAK (TO-263) D2PAK (TO-263) I2PAK (TO-262)
Lead (Pb)-free and Halogen-free SiHF730AS-GE3

Lead (Pb)-free

IRF730ASPbF IRF730ASTRLPbF
SiHF730AS-E3 SiHF730ASTL-E3

SiHF730ASTRL-GE3

Note

a. See device orientation.

a

SiHF730ASTRR-GE3a SiHF730AL-GE3

a

IRF730ASTRRPbFa IRF730ALPbF

a

SiHF730ASTR-E3

a

SiHF730AL-E3

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V
Gate-Source Voltage V

= 25 °C

T

Continuous Drain Current V

Pulsed Drain Current

a, e

at 10 V

GS

C

= 100 °C 3.5

C

DS

± 30

GS

I

D

IDM 22

Linear Derating Factor 0.6 W/°C

c, e

b, e

a

= 25 °C P

C

E

AS

I

AR

E

AR

D

dV/dt 4.6 V/ns

, T

J

stg

Single Pulse Avalanche Energy
Avalanche Current

a

Repetiitive Avalanche Energy
Maximum Power Dissipation T
Peak Diode Recovery dV/dt
Operating Junction and Storage Temperature Range T
Soldering Recommendations (Peak Temperature) for 10 s 300

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting T
c. I

SD

d. 1.6 mm from case.

= 25 °C, L = 19 mH, Rg = 25 , IAS = 5.5 A (see fig. 12).

J

 5.5 A, dI/dt  90 A/μs, VDD  VDS, TJ  150 °C.

e. Uses IRF730A, SiHF730A data and test conditions.

* Pb containing terminations are not RoHS compliant, exemptions may apply

Document Number: 91046
S11-1048-Rev. C, 30-May-11 1

This document is subject to change without notice.

www.vishay.com

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

400

5.5

290 mJ

5.5 A

7.4 mJ
74 W

- 55 to + 150

d

www.vishay.com/doc?91000

V

AT

°C

IRF730AS, SiHF730AS, IRF730AL, SiHF730AL

Vishay Siliconix

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient
(PCB Mounted, steady-state)

a

Maximum Junction-to-Case (Drain) R

Note

a. When mounted on 1" square PCB (FR-4 or G-10 material).

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage V

V

Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA

DS

Gate-Source Threshold Voltage V

Gate-Source Leakage I

Zero Gate Voltage Drain Current I

Drain-Source On-State Resistance R

Forward Transconductance g

Dynamic

Input Capacitance C

Reverse Transfer Capacitance C

Output Capacitance C

Effective Output Capacitance C

Total Gate Charge Q

Gate-Drain Charge Q

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current I

Pulsed Diode Forward Current

Body Diode Voltage V

Body Diode Reverse Recovery Time t

Body Diode Reverse Recovery Charge Q

Forward Turn-On Time t

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.
c. C

eff. is a fixed capacitance that gives the same charging time as C

oss

d. Uses IRF730A, SiHF730A data and test conditions.

www.vishay.com Document Number: 91046
2 S11-1048-Rev. C, 30-May-11

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

a

R

thJA

thJC

DS

GS(th)

V

GSS

-40

-1.7

VGS = 0, ID = 250 μA 400 - - V

d

-0.5-V/°C

VDS = VGS, ID = 250 μA 2.0 - 4.5 V

= ± 30 V - - ± 100 nA

GS

VDS = 400 V, VGS = 0 V - - 25

DSS

VGS = 10 V ID = 3.3 A

DS(on)

fs

iss

- 103 -

oss

-4.0-

rss

oss

eff. VDS = 0 V to 320 V

oss

g

--5.8

gs

--9.3

gd

d(on)

r

-20-

d(off)

-16-

f

S

I

SM

SD

rr

rr

on

V

= 320 V, VGS = 0 V, TJ = 125 °C - - 250

DS

VDS = 50 V, ID = 3.3 A

f = 1.0 MHz, see fig. 5

V

= 0 V

GS

b

d

VGS = 0 V,

V

= 25 V,

DS

V

= 1.0 V, f = 1.0 MHz - 890 -

DS

= 320 V, f = 1.0 MHz - 30 -

V

DS

d

c, d

--1.0

3.1 - - S

- 600 -

-45-

--22

= 3.5 A, VDS = 320 V,

I

V

GS

= 10 V

D

see fig. 6 and 13

b, d

-10-

V

= 200 V, ID = 3.5 A,

DD

R

= 12 , RD = 57 , see fig. 10

g

b, d

MOSFET symbol
showing the
integral reverse
p - n junction diode

TJ = 25 °C, IS = 5.5 A, VGS = 0 V

G

b

TJ = 25 °C, IF = 3.5 A, dI/dt = 100 A/μs

D

S

b, d

-22-

--5.5

--22

--1.6V

- 370 550 ns

-1.62.4μC

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

while VDS is rising from 0 % to 80 % VDS.

oss

This document is subject to change without notice.

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°C/W

μA

pFOutput Capacitance C

nC Gate-Source Charge Q

ns

A

91046_01

Bottom

To p

V

GS

15 V
10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

20 µs Pulse Width
T

C

= 25 °C

4.5 V

VDS, Drain-to-Source Voltage (V)

I

D

, Drain-to-Source Current (A)

1

10

10

2

10

10

-2

1

0.1

0.1

10

2

10

2

1

10

-2

1

10

V

DS

,

Drain-to-Source Voltage (V)

I

D

, Drain-to-Source Current (A)

Bottom

To p

V

GS

15 V
10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

20 µs Pulse Width
T

C

= 150 °C

91046_02

4.5 V

10

0.1

0.1

10

2

20 µs Pulse Width
V

DS

= 50 V

10

2

10

0.1

I

D

, Drain-to-Source Current (A)

V

GS

,

Gate-to-Source Voltage (V)

5.0 6.0 7.0 8.0 9.0 10.0

4.0

91046_03

TJ = 25 °C

TJ = 150 °C

1

IRF730AS, SiHF730AS, IRF730AL, SiHF730AL

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Vishay Siliconix

Fig. 1 - Typical Output Characteristics

Fig. 2 - Typical Output Characteristics

Fig. 3 - Typical Transfer Characteristics

2.5
I

= 5.5 A

D

= 10 V

V

GS

2.0

1.5

1.0

(Normalized)

0.5

, Drain-to-Source On Resistance

DS(on)

0.0

R

- 60 - 40 - 20 0 20 40 60 80 100 120 140 160

T

Junction Temperature (°C)

91046_04

,

J

Fig. 4 - Normalized On-Resistance vs. Temperature

Document Number: 91046 www.vishay.com
S11-1048-Rev. C, 30-May-11 3

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

This document is subject to change without notice.

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1

10

10

3

C, Capacitance (pF)

V

DS

,

Drain-to-Source Voltage (V)

C

iss

C

rss

C

oss

V

GS

= 0 V, f = 1 MHz

C

iss

= Cgs + Cgd, Cds Shorted

C

rss

= C

gd

C

oss

= Cds + C

gd

91046_05

10

10

5

10

3

10

2

10

4

10

2

1

10

2

10

VSD, Source-to-Drain Voltage (V)

I

SD

, Reverse Drain Current (A)

0.4

1.2

1.00.80.6

V

GS

= 0 V

91046_07

1

0.1

TJ = 150 °C

TJ = 25 °C

IRF730AS, SiHF730AS, IRF730AL, SiHF730AL

Vishay Siliconix

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

20

ID = 5.5 A

V

= 320 V

16

V

12

DS

V

= 200 V

DS

= 80 V

DS

8

4

, Gate-to-Source Voltage (V)

GS

V

91046_06

0

05 25

10

QG, Total Gate Charge (nC)

For test circuit
see figure 13

2015

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 7 - Typical Source-Drain Diode Forward Voltage

2

10

Operation in this area limited

by R

DS(on)

10 µs

10

100 µs

1 ms

1

, Drain Current (A)

D

I

10 ms

TC = 25 °C

= 150 °C

T

J

Single Pulse

2

91046_08

0.1
10 10

VDS, Drain-to-Source Voltage (V)

Fig. 8 - Maximum Safe Operating Area

3

10

www.vishay.com Document Number: 91046
4 S11-1048-Rev. C, 30-May-11

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

This document is subject to change without notice.

www.vishay.com/doc?91000

I

D

, Drain Current (A)

TC, Case Temperature (°C)

1.0

2.0

3.0

4.0

5.0

6.0

25 1501251007550

91046_09

0.0

V

DS

90 %

10 %

V

GS

t

d(on)

t

r

t

d(off)

t

f

A

R

g

I

AS

0.01 Ω

t

p

D.U.T

L

V

DS

+

-

V

DD

Driver

15 V

20 V

I

AS

V

DS

t

p

IRF730AS, SiHF730AS, IRF730AL, SiHF730AL

Vishay Siliconix

R

D.U.T.

D

+

V

-

DD

V

DS

V

GS

R

g

10 V

Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

Fig. 10a - Switching Time Test Circuit

Fig. 9 - Maximum Drain Current vs. Case Temperature

10

)

thJC

1

D = 0.5

0.2

0.1

0.05

0.1

0.02

Thermal Response (Z

0.01
Single Pulse

(Thermal Response)

-2

10

91046_11

-5

10

-4

10

t1, Rectangular Pulse Duration (s)

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig. 10b - Switching Time Waveforms

P

DM

t

1

t

1/t2

thJC

2

+ T

C

Notes:

1. Duty Factor, D = t

2. Peak Tj = PDM x Z

-3

10

-2

10

0.1 1

Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms

Document Number: 91046 www.vishay.com
S11-1048-Rev. C, 30-May-11 5

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

This document is subject to change without notice.

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700

0

200

300

400

500

600

25 150

125

10075

50

Starting TJ, Junction Temperature (°C)

E

AS

, Single Pulse Avalanche Energy (mJ)

Bottom

To p

I

D

2.5 A

3.5 A

5.5 A

91046_12c

100

D.U.T.

3 mA

V

GS

V

DS

I

G

I

D

0.3 µF

0.2 µF

50 kΩ

12 V

Current regulator

Current sampling resistors

Same type as D.U.T.

+

-

IRF730AS, SiHF730AS, IRF730AL, SiHF730AL

Vishay Siliconix

610

600

590

580

570

560

, Avalanche Voltage (V)

DSav

550

V

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Q

10 V

V

Q

GS

G

G

Q

GD

Charge

Fig. 13a - Maximum Avalanche Energy vs. Drain Current

540

91046_12d

2.0

1.00.0

3.0

IAV, Avalanche Current (A)

Fig. 12d - Typical Drain-to-Source Voltage vs.

Avalanche Current

Fig. 13b - Gate Charge Test Circuit

4.0

5.0

6.0

www.vishay.com Document Number: 91046
6 S11-1048-Rev. C, 30-May-11

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

This document is subject to change without notice.

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IRF730AS, SiHF730AS, IRF730AL, SiHF730AL

Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

D.U.T.

+

-

R

g

Driver gate drive

P.W.

+

-

Period

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

• dV/dt controlled by R

• Driver same type as D.U.T.

I

controlled by duty factor “D”

•

SD

• D.U.T. - device under test

-

D =

g

Period

P.W.

+

+

V

DD

-

= 10 Va

V

GS

D.U.T. l

Reverse
recovery
current

D.U.T. V

Re-applied
voltage

Inductor current

Note

a. V

waveform

SD

Body diode forward

waveform

DS

Body diode forward drop

Ripple ≤ 5 %

= 5 V for logic level devices

GS

current

dI/dt

Diode recovery

dV/dt

V

DD

I

SD

Fig. 14 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91046

.

Document Number: 91046 www.vishay.com
S11-1048-Rev. C, 30-May-11 7

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

www.vishay.com/doc?91000

TO-263AB (HIGH VOLTAGE)

(Datum A)

34

E

L1

4

D

L2

4

C

1

B

B

C

3

2

B

B

Package Information

Vishay Siliconix

A

A

5

H

Detail A

B

A

c2

Gauge
plane

0° to 8°

L

L3

L4

Detail “A”
Rotated 90° CW
scale 8:1

H

B

Seating plane

A1

2 x e

Lead tip

2 x b2

2 x b

0.010 A B

MM

Plating

(c)

Section B - B and C - C

c

± 0.004 B

5

b1, b3

(b, b2)

Scale: none

M

Base
metal

c1

A

E

D1

4

5

E1

View A - A

4

MILLIMETERS INCHES MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.

A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 -

A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420

b 0.51 0.99 0.020 0.039 E1 6.22 - 0.245 -

b1 0.51 0.89 0.020 0.035 e 2.54 BSC 0.100 BSC

b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625

b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110

c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066

c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070

c2 1.14 1.65 0.045 0.065 L3 0.25 BSC 0.010 BSC

D 8.38 9.65 0.330 0.380 L4 4.78 5.28 0.188 0.208

ECN: S-82110-Rev. A, 15-Sep-08
DWG: 5970

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimensions are shown in millimeters (inches).

3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the
outmost extremes of the plastic body at datum A.

4. Thermal PAD contour optional within dimension E, L1, D1 and E1.

5. Dimension b1 and c1 apply to base metal only.

6. Datum A and B to be determined at datum plane H.

7. Outline conforms to JEDEC outline to TO-263AB.

Document Number: 91364 www.vishay.com
Revision: 15-Sep-08 1

I2PAK (TO-262) (HIGH VOLTAGE)

(Datum A)

E

L1

Package Information

Vishay Siliconix

A

A

B

c2

A

E

D

L2

0.010 A B

Lead tip

B

2 x e

M

Seating

plane

C

C

B

M

3 x b2

3 x b

L

A1

A

E1

Section A - A

Plating

c

b1, b3

(b, b2)

Section B - B and C - C

Scale: None

c

D1

Base
metal

c1

MILLIMETERS INCHES MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.

A 4.06 4.83 0.160 0.190 D 8.38 9.65 0.330 0.380

A1 2.03 3.02 0.080 0.119 D1 6.86 - 0.270 -

b 0.51 0.99 0.020 0.039 E 9.65 10.67 0.380 0.420

b1 0.51 0.89 0.020 0.035 E1 6.22 - 0.245 -

b2 1.14 1.78 0.045 0.070 e 2.54 BSC 0.100 BSC

b3 1.14 1.73 0.045 0.068 L 13.46 14.10 0.530 0.555

c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.065

c1 0.38 0.58 0.015 0.023 L2 3.56 3.71 0.140 0.146

c2 1.14 1.65 0.045 0.065

ECN: S-82442-Rev. A, 27-Oct-08
DWG: 5977

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost
extremes of the plastic body.

3. Thermal pad contour optional within dimension E, L1, D1, and E1.

4. Dimension b1 and c1 apply to base metal only.

Document Number: 91367 www.vishay.com
Revision: 27-Oct-08 1

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

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Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
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including but not limited to the warranty expressed therein.

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Revision: 13-Jun-16

1

Document Number: 91000