Datasheet IRF530S, SiHF530S DataSheet (Vishay)

D2PAK (TO-263)

G

D

S

Power MOSFET

IRF530S, SiHF530S

Vishay Siliconix

PRODUCT SUMMARY

VDS (V) 100

()V

R

DS(on)

Q

(Max.) (nC) 26

g

(nC) 5.5

Q

gs

Q

(nC) 11

gd

= 10 V 0.16

GS

Configuration Single

G

N-Channel MOSFET

ORDERING INFORMATION

Package
Lead (Pb)-free and Halogen-free SiHF530S-GE3

Lead (Pb)-free

Note

a. See device orientation.

2

D

PAK (TO-263) D2PAK (TO-263) D2PAK (TO-263)

IRF530SPbF
SiHF530S-E3

FEATURES

• Halogen-free According to IEC 61249-2-21
Definition

• Surface Mount

• Available in Tape and Reel

• Dynamic dV/dt Rating

• Repetitive Avalanche Rated

• 175 °C Operating Temperature

•Fast Switching

• Ease of Paralleling

D

S

• Compliant to RoHS Directive 2002/95/EC

DESCRIPTION

Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.

2

The D

PAK (TO-263) is a surface mount power package
capable of accommodating die size up to HEX-4. It provides
the highest power capability and the lowest possible
on-resistance in any existing surface mount package. The

2

D

PAK (TO-263) is suitable for high current applications
because of its low internal connection resistance and can
dissipate up to 2.0 W in a typical surface mount application.

SiHF530STRL-GE3
IRF530STRLPbF
SiHF530STL-E3

a

a

a

SiHF530STRR-GE3
IRF530STRRPbF
SiHF530STR-E3

a

a

a

ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage

Gate-Source Voltage

Continuous Drain Current V

Pulsed Drain Current

a

at 10 V

GS

= 25 °C

T

C

= 100 °C

T

C

V

V

I

IDM

DS

GS

D

Linear Derating Factor 0.59

Linear Derating Factor (PCB Mount)

Single Pulse Avalanche Energy
Avalanche Current

a

Repetitive Avalanche Energy

Maximum Power Dissipation

Maximum Power Dissipation (PCB Mount)
Peak Diode Recovery dV/dt

Operating Junction and Storage Temperature Range

e

b

a

= 25 °C

T

e

c

C

TA = 25 °C

E

AS

I

AR

E

AR

P

D

dV/dt 5.5 V/ns

, T

T

J

stg

Soldering Recommendations (Peak Temperature) for 10 s

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V

= 25 V, starting TJ = 25 °C, L = 528 μH, Rg = 25 , IAS = 14 A (see fig. 12).

DD

c. I

 14 A, dI/dt  140 A/μs, VDD  VDS, TJ  175 °C.

SD

d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).

* Pb containing terminations are not RoHS compliant, exemptions may apply

Document Number: 91020

www.vishay.com

S11-1046-Rev. C, 30-May-11 1

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

100

± 20

14

10

56

0.025

69 mJ

14 A

8.8 mJ

88

3.7

- 55 to + 175

d

300

www.vishay.com/doc?91000

V

A

W/°C

W

°C

IRF530S, SiHF530S

Vishay Siliconix

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient R

Maximum Junction-to-Ambient
(PCB Mount)

a

Maximum Junction-to-Case (Drain) R

thJA

R

thJA

thJC

Note

a. When mounted on 1" square PCB (FR-4 or G-10 material).

SPECIFICATIONS TJ = 25 °C, unless otherwise noted

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage V

V

Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.12 - V/°C

DS

Gate-Source Threshold Voltage V

Gate-Source Leakage I

Zero Gate Voltage Drain Current I

Drain-Source On-State Resistance R

Forward Transconductance g

Dynamic

Input Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Gate-Drain Charge Q

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

Internal Drain Inductance L

Internal Source Inductance L

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current I

Pulsed Diode Forward Current

a

Body Diode Voltage V

Body Diode Reverse Recovery Time t

Body Diode Reverse Recovery Charge Q

Forward Turn-On Time t

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.

www.vishay.com Document Number: 91020
2 S11-1046-Rev. C, 30-May-11

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

DS

GS(th)

V

GSS

DSS

VGS = 10 V ID = 8.4 A

DS(on)

fs

iss

- 250 -

oss

-60-

rss

g

--5.5

gs

--11

gd

d(on)

r

-23-

d(off)

-24-

f

D

V

V

GS

R

Between lead,
6 mm (0.25") from
package and center of

S

S

I

SM

SD

rr

rr

on

die contact

MOSFET symbol
showing the
integral reverse
p - n junction diode

TJ = 25 °C, IF = 14 A, dI/dt = 100 A/μs

This document is subject to change without notice.

-62

-40

°C/W

-1.7

VGS = 0, ID = 250 μA 100 - - V

VDS = VGS, ID = 250 μA 2.0 - 4.0 V

= ± 20 V - - ± 100 nA

GS

VDS = 100 V, VGS = 0 V - - 25

= 80 V, VGS = 0 V, TJ = 150 °C - - 250

DS

VDS = 50 V, ID = 8.4 A

VGS = 0 V,

V

= 25 V,

DS

f = 1.0 MHz, see fig. 5

b

b

- - 0.16 

5.1 - - S

- 670 -

--26

= 14 A, VDS = 80 V,

I

= 10 V

D

see fig. 6 and 13

b

-10-

V

= 50 V, ID = 14 A,

DD

= 12 , RD = 3.6 , see fig. 10

g

G

G

TJ = 25 °C, IS = 14 A, VGS = 0 V

b

D

S

D

S

b

-34-

-4.5-

-7.5-

--14

--56

--2.5V

- 150 280 ns

b

- 0.85 1.7 μC

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

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μA

pFOutput Capacitance C

nC Gate-Source Charge Q

ns

nH

A

91020_01

20 µs Pulse Width
T

C

= 25 °C

4.5 V

VDS, Drain-to-Source Voltage (V)

I

D

, Drain Current (A)

Bottom

To p

V

GS

15 V
10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

10

1

10

0

10

-1

10

0

10

1

V

DS

,

Drain-to-Source Voltage (V)

I

D

, Drain Current (A)

4.5 V

20 µs Pulse Width
T

C

= 175 °C

91020_02

Bottom

To p

V

GS

15 V
10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

10

1

10

0

10

-1

10

0

10

1

20 µs Pulse Width
V

DS

= 50 V

I

D

, Drain Current (A)

V

GS

,

Gate-to-Source Voltage (V)

5678910

4

25 °C

175 °C

91020_03

10

1

10

0

I

D

= 14 A

V

GS

= 10 V

3.0

0.0

0.5

1.0

1.5

2.0

2.5

- 60- 40 - 20 0 20 40 60 80 100120 140 160

T

J

,

Junction Temperature (°C)

R

DS(on)

, Drain-to-Source On Resistance

(Normalized)

91020_04

3.5

180

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

IRF530S, SiHF530S

Vishay Siliconix

Fig. 1 - Typical Output Characteristics, TC = 25 °C

Fig. 2 - Typical Output Characteristics, T

= 175 °C

C

Fig. 3 - Typical Transfer Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

Document Number: 91020 www.vishay.com
S11-1046-Rev. C, 30-May-11 3

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

This document is subject to change without notice.

www.vishay.com/doc?91000

IRF530S, SiHF530S

1400

1200

1000

800

0

400

600

10

0

10

1

Capacitance (pF)

V

DS

,

Drain-to-Source Voltage (V)

C

iss

C

rss

C

oss

V

GS

= 0 V, f = 1 MHz

C

iss

= Cgs + Cgd, Cds Shorted

C

rss

= C

gd

C

oss

= Cds + C

gd

91020_05

200

QG, Total Gate Charge (nC)

V

GS

, Gate-to-Source Voltage (V)

20

16

12

8

0

4

0

5

25

2015

10

ID = 14 A

V

DS

= 20 V

V

DS

= 50 V

For test circuit
see figure 13

V

DS

= 80 V

91020_06

10

2

10 µs

100 µs

1 ms

10 ms

Operation in this area limited

by R

DS(on)

VDS, Drain-to-Source Voltage (V)

I

D

, Drain Current (A)

TC = 25 °C
T

J

= 175 °C

Single Pulse

0.1

10

3

0.1

2

5

1

2

5

10

2

5

2

5

25

1

25

10

25

10

2

25

10

3

91020_08

Vishay Siliconix

91020_07

1

175 °C

10

0

, Reverse Drain Current (A)

10

SD

I

0.4

25 °C

V

1.61.20.8

VSD, Source-to-Drain Voltage (V)

= 0 V

GS

2.0

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

www.vishay.com Document Number: 91020
4 S11-1046-Rev. C, 30-May-11

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

This document is subject to change without notice.

www.vishay.com/doc?91000

14

V

DS

90 %

10 %

V

GS

t

d(on)

t

r

t

d(off)

t

f

10

1

0.1

10

-2

10

-5

10

-4

10

-3

10

-2

0.1 1 10

P

DM

t

1

t

2

t1, Rectangular Pulse Duration (s)

Thermal Response (Z

thJC

)

Notes:

1. Duty Factor, D = t

1/t2

2. Peak Tj = PDM x Z

thJC

+ T

C

Single Pulse
(Thermal Response)

0 - 0.5

0.2

0.1

0.05

0.02

0.01

91020_11

12

10

8

6

, Drain Current (A)

4

D

I

2

IRF530S, SiHF530S

Vishay Siliconix

R

D.U.T.

D

+

V

-

DD

V

DS

V

GS

R

g

10 V

Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

Fig. 10a - Switching Time Test Circuit

0

175

91020_09

25 1501251007550

TC, Case Temperature (°C)

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10b - Switching Time Waveforms

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

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Document Number: 91020 www.vishay.com
S11-1046-Rev. C, 30-May-11 5

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

This document is subject to change without notice.

IRF530S, SiHF530S

R

g

I

AS

0.01 Ω

t

p

D.U.T

L

V

DS

+

-

V

DD

10 V

Var y t

p

to obtain

required I

AS

200

0

40

80

120

160

25 150

125

10075

50

Starting TJ, Junction Temperature (°C)

E

AS

, Single Pulse Energy (mJ)

Bottom

To p

I

D

5.7 A

9.9 A
14 A

VDD = 25 V

91020_12c

175

D.U.T.

3 mA

V

GS

V

DS

I

G

I

D

0.3 µF

0.2 µF

50 kΩ

12 V

Current regulator

Current sampling resistors

Same type as D.U.T.

+

-

Vishay Siliconix

Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms

V

DS

t

p

V

DS

I

AS

V

DD

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6 S11-1046-Rev. C, 30-May-11

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Q

V

GS

Q

GS

V

G

G

Q

GD

Charge

Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit

This document is subject to change without notice.

www.vishay.com/doc?91000

Peak Diode Recovery dV/dt Test Circuit

IRF530S, SiHF530S

Vishay Siliconix

D.U.T.

+

-

R

g

Driver gate drive

P.W.

+

-

Period

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

• dV/dt controlled by R

• Driver same type as D.U.T.

I

controlled by duty factor “D”

•

SD

• D.U.T. - device under test

-

D =

g

Period

P.W.

+

+

V

DD

-

V

= 10 Va

GS

D.U.T. l

Reverse
recovery
current

D.U.T. V

Re-applied
voltage

Inductor current

Note

a. V

waveform

SD

Body diode forward

waveform

DS

Body diode forward drop

Ripple ≤ 5 %

= 5 V for logic level devices

GS

current

dI/dt

Diode recovery

dV/dt

V

DD

I

SD

Fig. 14 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91020

.

Document Number: 91020 www.vishay.com
S11-1046-Rev. C, 30-May-11 7

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

www.vishay.com/doc?91000

TO-263AB (HIGH VOLTAGE)

(Datum A)

34

E

L1

4

D

L2

4

C

1

B

B

C

3

2

B

B

Package Information

Vishay Siliconix

A

A

5

H

Detail A

B

A

c2

Gauge
plane

0° to 8°

L

L3

L4

Detail “A”
Rotated 90° CW
scale 8:1

H

B

Seating plane

A1

2 x e

Lead tip

2 x b2

2 x b

0.010 A B

MM

Plating

(c)

Section B - B and C - C

c

± 0.004 B

5

b1, b3

(b, b2)

Scale: none

M

Base
metal

c1

A

E

D1

4

5

E1

View A - A

4

MILLIMETERS INCHES MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.

A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 -

A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420

b 0.51 0.99 0.020 0.039 E1 6.22 - 0.245 -

b1 0.51 0.89 0.020 0.035 e 2.54 BSC 0.100 BSC

b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625

b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110

c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066

c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070

c2 1.14 1.65 0.045 0.065 L3 0.25 BSC 0.010 BSC

D 8.38 9.65 0.330 0.380 L4 4.78 5.28 0.188 0.208

ECN: S-82110-Rev. A, 15-Sep-08
DWG: 5970

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimensions are shown in millimeters (inches).

3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the
outmost extremes of the plastic body at datum A.

4. Thermal PAD contour optional within dimension E, L1, D1 and E1.

5. Dimension b1 and c1 apply to base metal only.

6. Datum A and B to be determined at datum plane H.

7. Outline conforms to JEDEC outline to TO-263AB.

Document Number: 91364 www.vishay.com
Revision: 15-Sep-08 1

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Disclaimer



ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.

Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of
typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding
statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a
particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk.
Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for
such applications.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document
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Revision: 13-Jun-16

1

Document Number: 91000