Datasheet SiHB22N60S DataSheet (Vishay)

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SiHB22N60S

Vishay Siliconix

S Series Power MOSFET

PRODUCT SUMMARY

VDS at TJ max. (V) 650

R

max. at 25 °C (Ω)VGS = 10 V 0.190

DS(on)

Q

max. (nC) 98

g

Q

(nC) 17

gs

Q

(nC) 25

gd

Configuration Single

FEATURES

• Generation one

• High EAR capability

• Lower figure-of-merit R

• 100 % avalanche tested

• Ultra low R

• dV/dt ruggedness

• Ultra low gate charge (Qg)

D2PAK (TO-263)

D

• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912

APPLICATIONS

G

D

G

S

N-Channel MOSFET

S

• PFC power supply stages

• Hard switching topologies

• Solar inverters

•UPS

• Motor control

• Lighting

• Server telecom

ORDERING INFORMATION

Package D2PAK (TO-263)

Lead (Pb)-free and Halogen-free SiHB22N60S-GE3

Lead (Pb)-free SiHB22N60S-E3

x Q

on

g

on

Available

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V

Gate-Source Voltage V

T

= 25 °C

Continuous Drain Current V

Pulsed Drain Current

a

at 10 V

GS

Linear Derating Factor

Single Pulse Avalanche Energy

Repetitive Avalanche Energy

b

a

Maximum Power Dissipation

Drain-Source Voltage Slope T

Reverse Diode dV/dt

d

C

= 100 °C 13

C

2

D

PAK

(TO-263)

2

D

PAK

(TO-263)

= 125 °C

J

Operating Junction and Storage Temperature Range T

Soldering Recommendations (Peak Temperature)

c

for 10 s 300

DS

± 30

GS

I

D

IDM 65

E

AS

E

AR

P

D

dV/dt

, T

J

stg

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature.
b. V

= 50 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 Ω, IAS = 7 A.

DD

c. 1.6 mm from case.
d. I

≤ ID, dI/dt = 100 A/μs, starting TJ = 25 °C.

SD

S15-0982-Rev. F, 27-Apr-15

1

For technical questions, contact: [e-mail]

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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

600

22

2W/°C

690

25

250 W

37

5.3

-55 to +150

Document Number: 91395

V

AT

mJ

V/ns

°C

SiHB22N60S

S

D

G

www.vishay.com

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient D

Maximum Junction-to-Case (Drain) D

2

PAK (TO-263) R

2

PAK (TO-263) R

thJA

thJC

-62

-0.5

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage V

V

Temperature Coefficient ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.70 - V/°C

DS

Gate-Source Threshold Voltage (N) V

Gate-Source Leakage I

Zero Gate Voltage Drain Current I

Drain-Source On-State Resistance R

Forward Transconductance

a

g

DS

GS(th)

V

GSS

DSS

VGS = 10 V ID = 11 A - 0.160 0.190 Ω

DS(on)

fs

Dynamic

Input Capacitance C

Output Capacitance C

Reverse Transfer Capacitance C

Effective Output Capacitance
(Time Related)

Total Gate Charge Q

iss

- 1480 -

oss

-33-

rss

g

(TR)

a

C

oss eff.

V

Gate-Drain Charge Q

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

Gate Input Resistance R

-25-

gd

d(on)

r

- 77 115

d(off)

-5990

f

g

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current I

Pulsed Diode Forward Current I

Diode Forward Voltage V

Reverse Recovery Time t

Reverse Recovery Charge Q

Reverse Recovery Current I

S

SM

SD

rr

rr

RRM

MOSFET symbol
showing the
integral reverse
p - n junction diode

Note

a. C

(TR) is a fixed capacitance that gives the same charging time as C

oss eff.

VGS = 0 V, ID = 1 mA 600 - - V

VDS = VGS, ID = 250 μA 2.0 - 4.0 V

= ± 20 V - - ± 100 nA

GS

V

= ± 30 V - - ± 1 μA

GS

VDS = 600 V, VGS = 0 V - - 1

= 600 V, VGS = 0 V, TJ = 150 °C - - 100

V

DS

VDS = 50 V, ID = 13 A - 9.4 - S

VGS = 0 V,

V

= 25 V,

DS

f = 1.0 MHz

VGS = 0 V VDS = 0 V to 480 V - 155 -

= 10 V ID = 22 A, VDS = 480 V

GS

= 380 V, ID = 22 A,

V

DD

R

= 9.1 Ω, VGS = 10 V

g

f = 1 MHz, open drain - 0.65 - Ω

TJ = 25 °C, IS = 22 A, VGS = 0 V - - 1.2 V

TJ = 25 °C, IF = IS,

dI/dt = 100 A/μs, V

while VDS is rising from 0 % to 80 % VDS.

oss

= 25 V

R

Vishay Siliconix

°C/W

- 2810 -

- 75 110

-2450

- 68 100

--22

--88

- 462 690 ns

- 8.3 16 μC

-3060A

μA

pF

nC Gate-Source Charge Qgs -17-

ns

A

S15-0982-Rev. F, 27-Apr-15

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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Document Number: 91395

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VDS, Drain-to-Source Voltage (V)

I

D

, Drain Current (A)

0

10

20

30

40

50

04812162024

V

GS

Top 15 V

14 V
13 V
12 V
11 V
10 V

9 V

8 V
7 V
6 V
5 V

Bottom 4 V

TJ = 25 °C

4 V

0

6

12

18

24

30

0 4 8 12162024

4.0 V

VDS, Drain-to-Source Voltage (V)

I

D

, Drain Current (A)

V

GS

Top 15 V

14 V
13 V
12 V
11 V
10 V

9 V

8 V
7 V
6 V
5 V

Bottom 4 V

TJ = 150 °C

I

D

, Drain Current (A)

V

GS

,

Gate-to-Source Voltage (V)

0

10

20

30

40

50

60

46810

TJ = 25 °C

TJ = 150 °C

2

0

0.5

1

1.5

2

2.5

3

3.5

- 60 - 40 - 20 0 20 40 60 80 100 120 140 160 180

T

J

,

Junction Temperature (°C)

R

DS(on)

, Drain-to-Source On Resistance

(Normalized)

I

D

= 22 A

V

GS

= 10 V

10

100

1000

10 000

100 000

110100

Capacitance (pF)

V

DS

,

Drain-to-Source Voltage (V)

VGS = 0 V, f = 1 MHz
C

iss

= Cgs + Cgd • C

ds

shorted

C

rss

= C

gd

C

oss

= Cds + C

gd

C

rss

C

iss

C

oss

0.0

2.0

4.0

6.0

8.0

10.0

12.0

010203040506070 8090100

V

DS

= 120 V

V

DS

= 300 V

V

DS

= 480 V

ID = 22 A

QG, Total Gate Charge (nC)

V

GS

, Gate-to-Source Voltage (V)

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

SiHB22N60S

Vishay Siliconix

Fig. 1 - Typical Output Characteristics, TJ = 25 °C

Fig. 2 - Typical Output Characteristics, T

= 150 °C

J

Fig. 4 - Normalized On-Resistance vs. Temperature

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

S15-0982-Rev. F, 27-Apr-15

Fig. 3 - Typical Transfer Characteristics

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Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

3

Document Number: 91395

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0.0001

0.001

0.01

0.1

1

10

100

1000

0.2 0.4 0.6 0.8 1 1.2 1.4

VSD, Source-to-Drain Voltage (V)

I

SD

, Reverse Drain Current (A)

V

GS

= 0 V

T

J

= 150 °C

T

J

= 25 °C

0.1

1

10

100

1000

1 10 100 1000 10 000

100 µs

Operation in this area limited

by R

DS(on)

TC = 25 °C
T

J

= 150 °C

Single Pulse

VDS, Drain-to-Source Voltage (V)

I

D

, Drain Current (A)

1 ms

10 ms

0

5

10

15

20

25

25 50 75 100 125 150

I

D

, Drain Current (A)

TC, Case Temperature (°C)

550

575

600

625

650

675

700

725

- 60 - 40 - 20 0 20 40 60 80 100 120 140160 180

T

J

,

Junction Temperature (°C)

V

DS

,

Drain-to-Source Breakdown

Voltage (V)

10

-4

10

-3

10

-2

0.1 1

normalized Effective Transient

Thermal Impedance

0.01

0.1

1

Square Wave Pulse Duration (s)

Single Pulse

0.02

0.05

0.1

0.2

Duty Cycle = 0.5

SiHB22N60S

Vishay Siliconix

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10 - Drain-to-Source Breakdown Voltage

S15-0982-Rev. F, 27-Apr-15

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

Fig. 11 - Normalized Thermal Transient Impedance, Junction-to-Case

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

R

D

V

GS

R

g

D.U.T.

10 V

+

-

V

DS

V

DD

90 %

10 %

t

d(on)

t

r

t

d(off)

t

f

R

g

I

AS

0.01 W

t

p

D.U.T

L

V

DS

+

-

V

DD

10 V

Var y t

p

to obtain

required I

AS

I

AS

V

DS

V

DD

V

DS

t

p

Q

GS

Q

GD

Q

G

V

G

V

GS

SiHB22N60S

Vishay Siliconix

Fig. 12 - Switching Time Test Circuit

V

DS

V

GS

Fig. 13 - Switching Time Waveforms

Fig. 14 - Unclamped Inductive Test Circuit

Fig. 16 - Basic Gate Charge Waveform

Current regulator

Same type as D.U.T.

50 kΩ

0.2 µF

12 V

V

GS

0.3 µF

D.U.T.

3 mA

I

G

Current sampling resistors

I

D

+

V

DS

-

Fig. 17 - Gate Charge Test Circuit

Fig. 15 - Unclamped Inductive Waveforms

S15-0982-Rev. F, 27-Apr-15

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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SiHB22N60S

Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

D.U.T.

+

-

R

g

Driver gate drive

P.W.

+

-

Period

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

• dV/dt controlled by R

• Driver same type as D.U.T.

I

controlled by duty factor “D”

•

SD

• D.U.T. - device under test

-

D =

g

Period

P.W.

+

+

V

DD

-

V

= 10 Va

GS

D.U.T. l

Reverse
recovery
current

D.U.T. V

Re-applied
voltage

Inductor current

Note

a. V

waveform

SD

Body diode forward

waveform

DS

Body diode forward drop

Ripple ≤ 5 %

= 5 V for logic level devices

GS

current

dI/dt

Diode recovery

dV/dt

V

DD

I

SD

Fig. 18 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91395

S15-0982-Rev. F, 27-Apr-15

.

6

Document Number: 91395

For technical questions, contact: [e-mail]

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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Revision: 13-Jun-16

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Document Number: 91000