Datasheet si6924edq Datasheet

N-Channel 2.5-V (G-S) Battery Switch, ESD Protection

PRODUCT SUMMARY

V

(V) r

DS

28

FEATURES

D Low r
D VGS Max Rating: 14 V
D Exceeds 2-kV ESD Protection
D Low Profile TSSOP-8 Package

DS(on)

DESCRIPTION

DS(on)

0.033 @ VGS = 4.5 V "4.6

0.038 @ VGS = 3.0 V "4.3

0.042 @ VGS = 2.5 V "4.1

(W) I

Si6924EDQ

Vishay Siliconix

(A)

D

ESD Protected

2000 V

D r
D 28-V VDS Rated
D Symetrical Voltage Blocking (Off Voltage)

Rating at 2.5-V V

DS(on)

GS

The Si6924EDQ is a dual n-channel MOSFET with ESD
protection and gate over-voltage protection circuitry
incorporated into the MOSFET. The device is designed for use
in Lithium Ion battery pack circuits. The common-drain
contsruction takes advantage of the typical battery pack
topology, allowing a further reduction of the device’s
on-resistance. The 2-stage input protection circuit is a unique
design, consisting of two stages of back-to-back zener diodes
separated by a resistor. The first stage diode is designed to
absorb most of the ESD energy. The second stage diode is

APPLICATION CIRCUITS

ESD and

Overvoltage

Protection

ESD and

Overvoltage

Protection

designed to protect the gate from any remaining ESD energy
and over-voltages above the gates inherent safe operating
range. The series resistor used to limit the current through the
second stage diode during over voltage conditions has a
maximum value which limits the input current to v 10 mA @
14 V and the maximum t

to 12 ms. The Si6924EDQ has been

off

optimized as a battery or load switch in Lithium Ion applications
with the advantage of both a 2.5-V r

rating and a safe

DS(on)

14-V gate-to-source maximum rating.

D

G

R**

Battery Protection Circuit

*Thermal connection to drain pins is required to achieve specific performance.

FIGURE 1. Typical Use In a Lithium Ion Battery Pack FIGURE 2. Input ESD and Overvoltage Protection

Document Number: 70814
S-59522—Rev. C, 30-Nov-98

S

**R typical value is 1.8 kW by design.

See Typical Characteristics,

Gate-Current vs. Gate-Source Voltage, Page 3.

Circuit.

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Si6924EDQ

Vishay Siliconix

FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION

*D *D

TSSOP-8

D

1
S
S

G

D

2

1
1
1

Si6924EDQ

3

4

Top View

D

8

S

2

7

S

6

2

G

5

2

G

1

1.8 kW
G

2

S

N-Channel N-Channel

*Thermal connection to drain pins is required to achieve specific performance.

1

1.8 kW

FIGURE 3. FIGURE 4.

ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED)

Parameter Symbol Limit Unit

Drain-Source V oltage, Source-Drain Voltage V
Gate-Source Voltage V

a, b

Continuous Drain-to-Source Current (TJ = 150_C)

Pulsed Drain-to-Source Current I
Pulsed Source Current (Diode Conduction)a,

Maximum Power Dissipationa,

Operating Junction and Storage Temperature Range TJ, T

b

_

b

TA = 25_C "4.6
TA = 70_C

TA = 25_C 1.1
TA = 70_C

DS
GS

I

D

DM

I

S

P

D

stg

S

2

- to +

"14

"3.7

"20

1.25

0.72

-55 to 150 _C

V

A

W

THERMAL RESISTANCE RATINGS

Parameter Symbol Typical Maximum Unit

Maximum Junction-to-Ambient

Notes
a. Surface Mounted on FR4 Board.
b. t v 10 sec.

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2

a

t v 10 sec 125

Steady-State

R

thJA

115

Document Number: 70814

S-59522—Rev. C, 30-Nov-98

_C/W

SPECIFICATIONS (TJ = 25_C UNLESS OTHERWISE NOTED)

W

Parameter Symbol T est Condition Min Typ Max Unit

Static

Si6924EDQ

Vishay Siliconix

Gate Threshold Voltage V

Gate-Body Leakage I

Zero Gate Voltage Drain Current I

On-State Drain Current

Drain-Source On-State Resistance

Forward Transconductance
Diode Forward Voltage

Dynamic

a

b

b

b

b

Total Gate Charge Q
Gate-Source Charge Q
Gate-Drain Charge Q
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t

Notes
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width v 300 ms, duty cycle v 2%.

GS(th)

GSS

DSS

I

D(on)

r

DS(on)

DS(on)

g

V

d(on)

d(off)

fs

SD

g
gs
gd

r

f

VDS = VGS, I

VDS = 0 V, VGS = "4.5 V

VDS = 0 V, VGS = "14 V

= 250 mA 0.5 V

D

"1 mA

"10 mA

VDS = 22.4 V, VGS = 0 V 1

VDS = 22.4 V, VGS = 0 V, TJ = 55_C 5

VDS w 5 V, VGS = 5 V 10 A

VGS = 4.5 V, ID = 4.6 A 0.026 0.033
VGS = 3.0 V, I
VGS = 2.5 V, I

= 4.3 A

D

= 4.1 A

D

0.029 0.038

0.031 0.042

VDS = 10 V, ID = 4.6 A 18 S
IS = 1.25 A, VGS = 0 V 0.7 1.1 V

14 20

V

= 10 V, VGS = 4.5 V, ID = 4.6 A 2.1 nC

DS

4.2

0.55 1.0

VDD = 10 V, RL = 10 W

VDD = 10 V, RL = 10

ID ^ 1 A, V

GEN

= 4.5 V, RG = 6 W

2.0 4.0

7.0 12

4.5 8

mA

W

ms

TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)

Gate-Current vs. Gate-Source Voltage

8

6

4

- Gate Current (mA)I

GSS

2

0

0 4 8 12 16

VGS - Gate-to-Source Voltage (V)

Document Number: 70814
S-59522—Rev. C, 30-Nov-98

mA)

- Gate Current (I

GSS

10,000

Gate Current vs. Gate-Source Voltage

1,000

100

10

0.1

0.01

0.001

TJ = 150_C

1

04

2681012

TJ = 25_C

V

- Gate-to-Source Voltage (V)

GS

14

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Si6924EDQ

Vishay Siliconix

TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)

20

VGS = 5 thru 2,5 V

16

12

8

- Drain Current (A)I

D

4

0

0.0 0.5 1.0 1.5 2.0 2.5 3.0
VDS - Drain-to-Source Voltage (V)

2 V

On-Resistance vs. Drain Current

0.05

W )

0.04

VGS = 2.5 V

0.03

Output Characteristics Transfer Characteristics

1.5 V

1 V

20

16

12

8

- Drain Current (A)I

D

4

0

0.0 0.5 1.0 1.5 2.0 2.5

TC = 125_C

25_C

-55_C

VGS - Gate-to-Source Voltage (V)

Capacitance

1200

900

C

600

iss

- On-Resistance (r

0.02

DS(on)

0.01
048121620

4.5

3.6

2.7

1.8

- Gate-to-Source Voltage (V)

GS

0.9

V

0.0
0 4 8 12 16

VGS = 3 V

ID - Drain Current (A)

Gate Charge

VDS = 10 V
I

= 4.6 A

D

Qg - Total Gate Charge (nC)

VGS = 4.5 V

C - Capacitance (pF)

300

C

0

0 4 8 12 16 20 24 28

On-Resistance vs. Junction Temperature

1.8

VGS = 4.5 V
I

D

-50 -25 0 25 50 75 100 125 150

W)

(Normalized)

- On-Resistance (r

DS(on)

1.6

1.4

1.2

1.0

0.8

0.6

C

oss

rss

V

- Drain-to-Source Voltage (V)

DS

= 4.6 A

T

- Junction Temperature (_C)

J

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Document Number: 70814

S-59522—Rev. C, 30-Nov-98

TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)

Si6924EDQ

Vishay Siliconix

Source-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage

W )

- On-Resistance (r

DS(on)

0.08

0.06

ID = 4.6 A

0.04

0.02

0.00
012345

Single Pulse Power

30

25

20

20

10

TJ = 150_C

- Source Current (A)I

S

TJ = 25_C

1

0 0.4 0.6 0.8

1.0 1.2

VSD - Source-to-Drain Voltage (V) VGS - Gate-to-Source Voltage (V)

Threshold Voltage

0.2

0.1

-0.0

ID = 250 mA

-0.1

Variance (V)V

GS(th)

-0.2

-0.3

-0.4

-50 -25 0 25 50 75 100 125 150
TJ - Temperature (_C)

Normalized Thermal Transient Impedance, Junction-to-Ambient

2

1

Duty Cycle = 0.5

0.2

0.1

0.1

Thermal Impedance

Normalized Effective Transient

0.01

0.05

0.02

Single Pulse

-4

10

-3

10

15

Power (W)

10

5

0

0.01

0.1

1

10 30

Time (sec)

Notes:

P

DM

t

1

t

2

t

thJA

1

t

2

= 115_C/W

thJA

(t)

1. Duty Cycle, D =

2. Per Unit Base = R

3. TJM - TA = PDMZ

4. Surface Mounted

-2

10

-1

10

1 100 600

10

Square Wave Pulse Duration (sec)

Document Number: 70814
S-59522—Rev. C, 30-Nov-98

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Revision: 18-Jul-08 1