Datasheet si5410du Datasheet

Page 1
New Product
N-Channel 40-V (D-S) MOSFET
Si5410DU
Vishay Siliconix
PRODUCT SUMMARY
VDS (V) R
40
0.018 at V
0.021 at V
DS(on)
(Ω)
GS
GS
= 10 V
= 4.5 V
PowerPAK ChipFET Single
1
2
D
D
D
6
5
Bottom View
D
D
S
S
D
8
7
Ordering Information: Si5410DU-T1-GE3 (Lead (Pb)-free and Halogen-free)
Marking Code
3
4
G
a
I
(A)
D
12
12
AJ XXX
Part # Code
Qg (Typ.)
10 nC
Lot Traceability and Date Code
• Halogen-free
• TrenchFET
• New Thermally Enhanced PowerPAK ChipFET® Package
- Small Footprint Area
- Low On-Resistance
- Thin 0.8 mm Profile
• 100 % UIS Tested
®
Power MOSFET
APPLICATIONS
• Load Switch, PA Switch, and Battery Switch for Portable Applications
• DC-DC Synchronous Rectification
®
D
G
S
N-Channel MOSFET
RoHS
COMPLIANT
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter Symbol Limit Unit
Drain-Source Voltage
Gate-Source Voltage
T
= 25 °C
C
= 70 °C
T
Continuous Drain Current (T
= 150 °C)
J
C
TA = 25 °C
TA = 70 °C
Pulsed Drain Current
= 25 °C
T
Continuous Source-Drain Diode Current
Single Pulse Avalanche Current
Single Pulse Avalanche Energy E
Maximum Power Dissipation
C
TA = 25 °C
L = 0.1 mH
T
= 25 °C
C
= 70 °C
T
C
T
= 25 °C
A
TA = 70 °C
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
d, e
T
V
DS
V
GS
I
D
I
DM
I
S
I
AS
AS
P
D
, T
J
stg
40
± 20
a
12
a
12
b, c
9.8
b, c
7.9 30
a
12
b, c
2.6 19
18 mJ
31
20
b, c
3.1
b, c
2
- 55 to 150
260
V
A
W
°C
THERMAL RESISTANCE RATINGS
Parameter Symbol Typical Maximum Unit
Maximum Junction-to-Ambient
b, f
Maximum Junction-to-Case (Drain)
t ≤ 5 s
Steady State
Notes: a. Package limited. b. Surface Mounted on 1" x 1" FR4 board. c. t = 5 s. d. See Solder Profile (
http://www.vishay.com/ppg?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and
is not required to ensure adequate bottom side solder interconnection. e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under Steady State conditions is 90 °C/W.
Document Number: 69827 S-81448-Rev. B, 23-Jun-08
R
thJA
R
thJC
34 40
34
°C/W
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1
Page 2
New Product
Si5410DU
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter Symbol Test Conditions Min. Typ. Max. Unit
Static
Drain-Source Breakdown Voltage
V
Temperature Coefficient ΔVDS/T
DS
V
Temperature Coefficient ΔV
GS(th)
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
b
a
a
a
Input Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Tur n -O n De l ay Ti m e
Rise Time
Turn-Off Delay Time
Fall Time
Tur n -O n De l ay Ti m e
Rise Time
Turn-Off Delay Time
Fall Time
V
DS
J
GS(th)/TJ
V
GS(th)
I
GSS
I
DSS
I
V
D(on)
R
DS(on)
g
fs
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
R
g
t
d(on)
t
r
t
d(off)
t
f
t
d(on)
t
r
t
d(off)
t
f
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulse Diode Forward Current I
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Fall Time
Reverse Recovery Rise Time
I
S
SM
V
SD
t
rr
Q
rr
t
a
t
b
Notes: a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the de vice. These are stress rating s only, and functiona l operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
VGS = 0 V, ID = 250 µA
ID = 250 µA
V
= VGS, ID = 250 µA
DS
VDS = 0 V, VGS = ± 20 V
V
V
DS
= 40 V, V
DS
= 40 V, V
GS
≥ 5 V, V
DS
V
= 10 V, ID = 6.6 A
GS
V
= 4.5 V, ID = 6.1 A
GS
= 0 V
GS
= 0 V, TJ = 55 °C
= 10 V
GS
VDS = 15 V, ID = 6.6 A
VDS = 20 V, V
VDS = 20 V, V
V
= 20 V, V
DS
= 0 V, f = 1 MHz
GS
= 10 V, ID = 9.8 A
GS
= 4.5 V, ID = 9.8 A
GS
f = 1 MHz 3.5 Ω
V
= 20 V, RL = 2.5 Ω
DD
≅ 7.9 A, V
I
D
V
≅ 7.9 A, V
I
D
DD
= 4.5 V, Rg = 1 Ω
GEN
= 20 V, RL = 2.5 Ω
= 10 V, Rg = 1 Ω
GEN
TC = 25 °C
IS = 7.9 A, V
GS
= 0 V
IF = 7.9 A, dI/dt = 100 A/µs, TJ = 25 °C
40 V
45
- 7
mV/°C
1.2 3 V
± 100 nA
1
10
20 A
0.015 0.018
0.017 0.021
30 S
1350
150
70
21 32
10 15
4.5
nC
3.1
25 40
15 25
25 40
12 20
10 15
15 25
22 35
10 15
12
30
0.8 1.2 V
25 40 ns
22 35 nC
15
10
µA
Ω
pFOutput Capacitance
ns
A
ns
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Document Number: 69827
S-81448-Rev. B, 23-Jun-08
Page 3
New Product
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Si5410DU
Vishay Siliconix
30
V
=10thru 4 V
GS
25
20
15
- Drain Current (A)I 10
D
5
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0
V
- Drain-to-Source Voltage (V)
DS
Output Characteristics
0.025
0.022
0.019
0.016
- On-Resistance (Ω)R
DS(on)
0.013
VGS=4.5V
VGS=10V
10
TC= - 55 °C
8
6
4
- Drain Current (A)I
D
2
V
=3V
GS
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VGS-Gate-to-Source Voltage (V)
TC= 25 °C
TC= 125 °C
Transfer Characteristics
1800
C - Capacitance (pF)
1500
1200
900
600
300
C
oss
C
iss
0.010 0 5 10 15 20 25 30
On-Resistance vs. Drain Current and Gate Voltage
10
ID=9.8 A
8
6
4
- Gate-to-Source Voltage (V)
GS
2
V
0
0 5 10 15 20 25
Document Number: 69827 S-81448-Rev. B, 23-Jun-08
ID- Drain Current (A)
VDS=20V
VDS=32V
Qg- TotalGateCharge(nC)
Gate Charge
C
rss
0
0 5 10 15 20 25 30 35 40
VDS- Drain-to-Source Voltage (V)
Capacitance
1.8
ID=6.6A
1.6
1.4
1.2
- On-Resistance (Normalized)
1.0
DS(on)
R
0.8
0.6
- 50 - 25 0 25 50 75 100 125 150
TJ- JunctionTemperature(°C)
VGS=10V
On-Resistance vs. Junction Temperature
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3
Page 4
New Product
Si5410DU
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100
10
- Source Current (A)I
S
1
0.0 0.2 0.4 0.6 0.8 1.0 1.2
V
SD
TJ= 150 °C
- Source-to-DrainVoltage(V)
Source-Drain Diode Forward Voltage
2.6
2.4
2.2
2.0
(V)V
1.8
GS(th)
1.6
ID= 250 µA
TJ= 25 °C
0.040
ID=6.6A
0.035
0.030
0.025
- On-Resistance (Ω)R
0.020
DS(on)
0.015
0.010
02468 10
VGS- Gate-to-Source Voltage (V)
TA= 125 °C
TA= 25 °C
On-Resistance vs. Gate-to-Source Voltage
50
40
)W(
30
rewoP
20
1.4
1.2
- 50 - 25 0 25 50 75 100 125 150
TJ- Temperature (°C)
Threshold Voltage
100
Limited byR
10
1
- Drain Current (A)I
D
0.1
TA= 25 °C
Single Pulse
0.01
0.1 1 10 100
* V
GS
Safe Operating Area, Junction-to-Ambient
*
DS(on)
BVDSS Limited
VDS- Drain-to-Source Voltage (V)
> minimum VGSat which R
DS(on)
10
0
1 10000.1 0.01 0.001 10 100
Time (s)
Single Pulse Power, Junction-to-Ambient
100 µs
1ms
10 ms
100 ms
1s 10 s
DC
is specified
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Document Number: 69827
S-81448-Rev. B, 23-Jun-08
Page 5
New Product
3
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Si5410DU
Vishay Siliconix
40
30
20
- Drain Current (A)
D
I
10
0
0 25 50 75 100 125 150
Package Limited
TC- Case Temperature (°C)
Current Derating*
5
30
)W( noitapissiD rewoP
25
20
15
10
5
0
25 50 75 100 125 150
TC - Case Temperature (°C)
Power Derating
* The power dissipation PD is based on T dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
= 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
J(max)
limit.
Document Number: 69827 S-81448-Rev. B, 23-Jun-08
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5
Page 6
New Product
1
1
Si5410DU
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
tneisnarT evitceffE dezilamroN
Duty Cycle = 0.5
ecnadepmI lamrehT
0.1
0.01
10
-4
0.2
0.1
0.05
0.02
10
-3
Single Pulse
10
Notes:
P
DM
t
1
t
2
t
DM Z thJA
100
1
t
2
= 75 °C/W
thJA
(t)
1. Duty Cycle, D =
2. Per Unit Base = R
3. T
- T A = P
JM
4. Surface Mounted
-2
-1
1 10 1000 10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
Duty Cycle = 0.5
tneisnarT
ecnadepmI
ev i
tc e
ffE
l am
dez
r ehT
ilamroN
0.2
0.1
0.05
0.02
Single Pulse
0.1
10
-4
10
-3
10
-2
-1
1 10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Case
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?69827.
www.vishay.com 6
Document Number: 69827
S-81448-Rev. B, 23-Jun-08
Page 7
PowerPAK® ChipFET® SINGLE PAD
Z
D
E
C
A
b
e
H
E
2
D
2
K
L
K
1
E
3
D
3
A
1
S (5)D (6) D (7)D (8)
D (1) D (2) D (3) G (4)
D (2)D (1) D (3) G (4)
D (8) D (7) D (6) S (5)
DETAIL Z
Backside view of single pad
Package Information
Vishay Siliconix
MILLIMETERS INCHES
DIM. MIN. NOM. MAX. MIN. NOM. MAX.
A 0.70 0.75 0.85 0.028 0.030 0.033
A
1
0 - 0.05 0 - 0.002
b 0.25 0.30 0.35 0.010 0.012 0.014
C 0.15 0.20 0.25 0.006 0.008 0.010
D 2.92 3.00 3.08 0.115 0.118 0.121
D
2
D
3
E 1.82 1.90 1.98 0.072 0.075 0.078
E
2
E
3
e 0.65 BSC 0.026 BSC
1.75 1.87 2.00 0.069 0.074 0.079
0.20 0.25 0.30 0.008 0.010 0.012
1.38 1.50 1.63 0.054 0.059 0.064
0.45 0.50 0.55 0.018 0.020 0.022
H 0.15 0.20 0.25 0.006 0.008 0.010
K 0.25 - - 0.010 - -
K
Document Number: 73203 www.vishay.com
1
L 0.30 0.35 0.40 0.012 0.014 0.016
0.30 - - 0.012 - -
19-Jul-10 1
Page 8
Package Information
Vishay Siliconix
PowerPAK® ChipFET® DUAL PAD
D
SI (1) GI (2) S2 (3) G2 (4)
Z
b
L
E
2
H
D1 (8)
Backside view of dual pad
SI (1)
D1 (7)
e
GI (2) S2 (3)
D2 (6) D2 (5)
K
1
S2 (5)D2 (6) D1 (7)D1 (8)
G2 (4)
E
A
C
A
1
K
DETAIL Z
MILLIMETERS INCHES
DIM. MIN. NOM. MAX. MIN. NOM. MAX.
A 0.70 0.75 0.85 0.028 0.030 0.033
A
1
0 - 0.05 0 - 0.002
b 0.25 0.30 0.35 0.010 0.012 0.014
C 0.15 0.20 0.25 0.006 0.008 0.010
D 2.92 3.00 3.08 0.115 0.118 0.121
D
2
1.07 1.20 1.32 0.042 0.047 0.052
E 1.82 1.90 1.98 0.072 0.075 0.078
E
2
0.92 1.05 1.17 0.036 0.041 0.046
e 0.65 BSC 0.026 BSC
H 0.15 0.20 0.25 0.006 0.008 0.010
K 0.20 - - 0.008 - -
K
1
0.20 - - 0.008 - -
L 0.30 0.35 0.40 0.012 0.014 0.016
ECN: C10-0618-Rev. C, 19-Jul-09 DWG: 5940
www.vishay.com Document Number: 73203 2 19-Jul-10
Page 9
RECOMMENDED MINIMUM PADS FOR PowerPAK® ChipFET® Single
Application Note 826
Vishay Siliconix
(0.008)
1.900 (0.075)
0.200
1.500 (0.059)
0.225
(0.009)
0.650
(0.026)
1.870
(0.074)
0.300
(0.012)
(0.101)
0.350
(0.014)
0.300
(0.012)
0.100
(0.004)
0.250
(0.010)
0.500
(0.020)
0.350
(0.014)
0.350
(0.014)
0.305
(0.012)
2.575
Recommended Minimum Pads
Dimensions in mm/(Inches)
Return to Index
Document Number: 69948 www.vishay.com Revision: 21-Jan-08 9
APPLICATION NOTE
Page 10
Legal Disclaimer Notice
Vishay

Disclaimer

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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Document Number: 91000 www.vishay.com Revision: 11-Mar-11 1
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