Datasheet si4834cd Datasheet

Si4834CDY

Vishay Siliconix

Dual N-Channel 30-V (D-S) MOSFET with Schottky Diode

PRODUCT SUMMARY

VDS (V) R

Channel-1 30

Channel-2 30

0.020 at V

0.025 at V

0.020 at V

0.025 at V

DS(on)

(Ω)

GS

(A)

I

D

= 10 V 8.0

= 4.5 V 8.0

= 10 V 8.0

= 4.5 V 8.0

SCHOTTKY PRODUCT SUMMARY

(V)

V

VDS (V)

Diode Forward Voltage

30 0.51 V at 1.0 A 2.0

SD

a, e

Qg (Typ.)

7.3

a

I

(A)

F

FEATURES

• Halogen-free According to IEC 61249-2-21 Definition

• TrenchFET® Power MOSFET

• 100 % R

Tested

g

• 100 % UIS Tested

• Compliant to RoHS Directive 2002/95/EC

APPLICATIONS

• Notebook Logic dc-to-dc

• Low Current dc-to-dc

D

1

D

2

SO-8

S

1

G

2

1

S

3

2

G

4

2

Top View

Ordering Information: Si4834CDY-T1-E3 (Lead (Pb)-free) Si4834CDY-T1-GE3 (Lead (Pb)-free and Halogen-free)

D

8

1

D

7

1

D

6

2

D

5

2

G

1

S

N-Channel MOSFET

1

Schottky Diode

G

2

S

N-Channel MOSFET

2

ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted

Parameter Symbol Channel-1 Channel-2 Unit

Drain-Source Voltage Gate-Source Voltage

Continuous Drain Current (T

= 150 °C)

J

Pulsed Drain Current (10 µs Pulse Width)

Source-Drain Current Diode Current

Pulsed Source-Drain Current Single Pulse Avalanche Current Single Pulse Avalanche Energy

Maximum Power Dissipation

Operating Junction and Storage Temperature Range

T

= 25 °C

C

= 70 °C

T

C

= 25 °C

T

A

TA = 70 °C

= 25 °C

T

C

= 25 °C

T

A

L = 0.1 mH

= 25 °C

T

C

T

= 70 °C

C

= 25 °C

T

A

TA = 70 °C

V

DS

V

GS

I

D

I

DM

I

S

I

SM

I

AS

E

AS

30 30

± 20 ± 20

8.0

e

8.0

e

7.1 7.1

7.5

5.8

b, c

7.5

5.8

b, c

30 30

2.6 2.6

1.8

b, c

1.8

b, c

30 30 10 10

55

V

A

mJ

2.9 2.9

P

D

, T

T

J

stg

1.8 1.8

2

1.2

b, c

1.2

b, c

2

b, c

- 55 to 150 °C

W

THERMAL RESISTANCE RATINGS

Channel-1 Channel-2

Parameter Symbol

Maximum Junction-to-Ambient

b, d

t ≤ 10 s

Maximum Junction-to-Foot (Drain) Steady State

R

thJA

R

thJF

Notes: a. Based on T b. Surface Mounted on 1" x 1" FR4 board.

= 25 °C.

C

c. t = 10 s. d. Maximum under Steady State conditions is 110 °C/W (Channel-1) and 110 °C/W (Channel-2). e. Package limited.

Document Number: 68790 S09-2109-Rev. B, 12-Oct-09

Typ. Max. Typ. Max.

52 62.5 52 62.5

35 43 35 43

Unit

°C/W

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1

Si4834CDY

Vishay Siliconix

SPECIFICATIONS TJ = 25 °C, unless otherwise noted

a

Parameter Symbol Test Conditions Min.

Static

Drain-Source Breakdown Voltage

V

Temperature Coefficient ΔVDS/T

DS

V

Temperature Coefficient ΔV

GS(th)

Gate Threshold Voltage

Gate-Body Leakage

Zero Gate Voltage Drain Current

On-State Drain Current

Drain-Source On-State Resistance

Forward Transconductance

Dynamic

a

b

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

Gate Resistance

V

DS

GS(th)/TJ

V

GS(th)

I

GSS

I

DSS

I

D(on)

R

DS(on)

g

fs

C

iss

C

oss

C

rss

Q

g

Q

gs

Q

gd

R

g

VGS = 0 V, ID = 1 mA

V

= 0 V, ID = 1 mA

GS

J

ID = 250 µA

V

= VGS, ID = 1 mA

DS

V

= VGS, ID = 1 mA

DS

VDS = 0 V, VGS = ± 20 V

V

= 0 V, VGS = ± 20 V

DS

V

= 30 V, V

DS

V

= 30 V, V

DS

V

= 30 V, V

DS

V

= 30 V, V

DS

GS

= 5 V, V

V

DS

V

= 5 V, V

DS

V

= 10 V, ID = 8 A

GS

V

= 10 V, ID = 8 A

GS

V

= 4.5 V, ID = 5 A

GS

V

= 4.5 V, ID = 5 A

GS

= 0 V

GS

= 0 V

GS

= 0 V, TJ = 100 °C

= 10 V

GS

= 10 V

GS

VDS = 15 V, ID = 8 A

V

= 15 V, ID = 8 A

DS

Channel-1

V

= 15 V, V

DS

= 0 V, f = 1 MHz

GS

Channel-2

V

= 15 V, V

DS

VDS = 15 V, V

V

= 15 V, V

DS

= 0 V, f = 1 MHz

GS

= 10 V, ID = 8 A

GS

= 10 V, ID = 8 A

GS

Channel-1

V

= 15 V, V

DS

= 4.5 V, ID = 8 A

GS

Channel-2

V

= 15 V, V

DS

= 4.5 V, ID = 8 A

GS

f = 1 MHz

Ch-1 30

Ch-2 30

Ch-2 32

Ch-2 - 6

Ch-1 1 3

Ch-2 1 3

Ch-1 100

Ch-2 100

Ch-1 0.016 0.10

Ch-2 0.001

Ch-1 1.1 10

Ch-2 0.025

Ch-1 20

Ch-2 20

Ch-1 0.0156 0.020

Ch-2 0.0156 0.020

Ch-1 0.019 0.025

Ch-2 0.019 0.025

Ch-1 29

Ch-2 29

Ch-1 950

Ch-2 950

Ch-1 185

Ch-2 155

Ch-1 65

Ch-2 65

Ch-1 16.5 25

Ch-2 16.5 25

Ch-1 7.3 11

Ch-2 7.3 11

Ch-1 2.7

Ch-2 2.7

Ch-1 2.1

Ch-2 2.1

Ch-1 0.2 1.2 2.4

Ch-2 0.2 1.2 2.4

Notes: a. Guaranteed by design, not subject to production testing. b. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.

Typ .

Max. Unit

V

mV/°C

V

nA

mA

A

Ω

S

pF

nC

Ω

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Document Number: 68790

S09-2109-Rev. B, 12-Oct-09

Si4834CDY

Vishay Siliconix

SPECIFICATIONS TJ = 25 °C, unless otherwise noted

a

Parameter Symbol Test Conditions Min.

Dynamic

Tu r n - O n D el a y T i m e

Rise Time

Turn-Off Delay Time

Fall Time

Tu r n - O n D el a y T i m e

Rise Time

Turn-Off Delay Time

Fall Time

a

t

d(on)

t

d(off)

t

d(on)

t

d(off)

t

r

≅ 5 A, V

I

D

≅ 5 A, V

I

t

f

D

t

r

I

≅ 5 A, V

D

≅ 5 A, V

I

t

f

D

Channel-1

V

= 15 V, RL = 3 Ω

DD

= 10 V, Rg = 1 Ω

GEN

Channel-2

V

= 15 V, RL = 3 Ω

DD

= 10 V, Rg = 1 Ω

GEN

Channel-1

V

= 15 V, RL = 3 Ω

DD

= 4.5 V, Rg = 1 Ω

GEN

Channel-2

V

= 15 V, RL = 3 Ω

DD

= 4.5 V, Rg = 1 Ω

GEN

Ch-1 10 20

Ch-2 9 18

Ch-1 10 20

Ch-2 11 20

Ch-1 18 35

Ch-2 18 35

Ch-1 9 18

Ch-2 8 16

Ch-1 17 35

Ch-2 17 35

Ch-1 12 24

Ch-2 12 24

Ch-1 19 35

Ch-2 18 35

Ch-1 10 20

Ch-2 10 20

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current

Pulse Diode Forward Current

a

Body Diode Voltage

Body Diode Reverse Recovery Time

Body Diode Reverse Recovery Charge

Reverse Recovery Fall Time

Reverse Recovery Rise Time

I

S

I

SM

V

SD

t

rr

TC = 25 °C

IS = 1 A

I

= 1 A

S

Channel-1

Q

t

a

t

b

I

rr

= 5 A, dI/dt = 100 A/µs, TJ = 25 °C

F

Channel-2

I

= 5 A, dI/dt = 100 A/µs, TJ = 25 °C

F

Ch-1 2.6

Ch-2 2.6

Ch-1 30

Ch-2 30

Ch-1 0.46 0.51

Ch-2 0.74 1.1

Ch-1 17 34

Ch-2 17 34

Ch-1 7 14

Ch-2 9 18

Ch-1 9

Ch-2 10

Ch-1 8

Ch-2 7

Notes: a. Guaranteed by design, not subject to production testing. b. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and fun ctional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Typ .

Max. Unit

ns

A

V

ns

nC

ns

Document Number: 68790 S09-2109-Rev. B, 12-Oct-09

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Si4834CDY

Vishay Siliconix

CHANNEL-1 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

30

VGS=10V thru 4 V

24

18

12

- Drain Current (A)I

D

6

0

0.0 0.5 1.0 1.5 2.0 2.5

V

- Drain-to-Source Voltage (V)

DS

VGS=3V

Output Characteristics

0.024

0.022

0.020

VGS=4.5V

5

4

3

2

- Drain Current (A)I

D

1

0

012345

TC= 25 °C

TC= 125 °C

V

- Gate-to-Source Voltage (V)

GS

TC= - 55 °C

Transfer Characteristics

1200

C

960

720

iss

0.018

- On-Resistance (Ω)R

DS(on)

0.016

0.014 0 6 12 18 24 30

VGS=10V

ID- Drain Current (A)

On-Resistance vs. Drain Current

10

= 8 A

I

D

8

VDS=10V

6

4

- Gate-to-Source Voltage (V)

V

GS

2

0

0.0 3.6 7.2 10.8 14.4 18.0

VDS=15V

VDS=20V

Qg- Total Gate Charge (nC)

Gate Charge

80

4

C - Capacitance (pF)

240

C

0

0 5 10 15 20 25 30

C

oss

rss

VDS- Drain-to-Source Voltage (V)

Capacitance

1.8

ID= 8 A

1.6

VGS=10V

1.4

1.2

- On-Resistance (Normalized)

1.0

DS(on)

R

0.8

0.6

- 50 - 25 0 25 50 75 100 125 150

-Junction Temperature (°C)

T

J

On-Resistance vs. Junction Temperature

VGS=4.5V

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Document Number: 68790

S09-2109-Rev. B, 12-Oct-09

CHANNEL-1 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

Si4834CDY

Vishay Siliconix

100

10

TJ= 150 °C

1

0.1

- Source Current (A)I

S

0.01

0.001

0.0 0.2 0.4 0.6 0.8 1.0 1.2

VSD-Source-to-Drain Voltage (V)

TJ= 25 °C

Source-Drain Diode Forward Voltage

-2

10

30 V

-3

10

20 V

-4

10

- Reverse Current (A)I

R

-5

10

10 V

0.10

I

= 8 A

D

0.08

0.06

0.04

- On-Resistance (Ω)R

DS(on)

0.02

0.00 02468 10

VGS- Gate-to-Source Voltage (V)

TJ= 125 °C

TJ= 25 °C

On-Resistance vs. Gate-to-Source Voltage

60

48

36

Power (W)

24

12

-6

10

0255075100125150

TJ-Junction Temperature (°C)

Reverse Current (Schottky)

Document Number: 68790 S09-2109-Rev. B, 12-Oct-09

- Drain Current (A)

D

I

100

10

0.1

0.01

1

0.01

Limited byR

TA= 25 °C

Single Pulse

0.1 1 10

- Drain-to-Source Voltage (V)

V

DS

> minimum VGSat which R

* V

GS

DS(on)

*

BVDSS Limited

Safe Operating Area, Junction-to-Ambient

DS(on)

0

0.1

Time (s)

Single Pulse Power, Junction-to-Ambient

1ms

10 ms

100 ms

1s 10 s

DC

100

is specified

011100.00.01

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Si4834CDY

Vishay Siliconix

CHANNEL-1 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

10

8

Package Limited

6

4

- Drain Current (A)

D

I

2

0

0 255075100125150

- Case Temperature (°C)

T

C

Current Derating*

3.5

2.8

2.1

Power (W)

1.4

0.7

0.0 0 25 50 75 100 125 150

T

- Case Temperature (°C)

C

Power Derating, Junction-to-Foot

1.5

1.2

0.9

Power (W)

0.6

0.3

0.0 0 25 50 75 100 125 150

-Ambient Temperature (°C)

T

A

Power Derating, Junction-to-Ambient

* The power dissipation PD is based on T

= 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper

J(max)

dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package

limit.

www.vishay.com 6

Document Number: 68790

S09-2109-Rev. B, 12-Oct-09

CHANNEL-1 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

1

Duty Cycle = 0.5

0.2

Si4834CDY

Vishay Siliconix

Thermal Impedance

Normalized Effective Transient

Thermal Impedance

Normalized Effective Transient

0.1

0.01

0.1

0.01

0.05

0.02

-4

10

1

-4

10

0.1

Duty Cycle = 0.5

0.2

0.1

0.05

0.02

Single Pulse

-3

10

Notes:

P

DM

1. Duty Cycle, D =

2. Per Unit Base = R

3. T

4. Surface Mounted

-2

10

-1

1

10

Square WavePulse Duration (s)

Normalized Thermal Transient Impedance, Junction-to-Ambient

-3

-2

10

Square WavePulse Duration (s)

-1

Normalized Thermal Transient Impedance, Junction-to-Foot

t

1

t

2

JM-TA=PDMZthJA

100

thJA

t

1

t

2

(t)

= 110 °C/W

100010

01110

Document Number: 68790 S09-2109-Rev. B, 12-Oct-09

www.vishay.com

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Si4834CDY

Vishay Siliconix

CHANNEL-2 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

30

VGS=10V thru 4 V

24

18

12

- Drain Current (A)I

D

6

0

0.0 0.5 1.0 1.5 2.0 2.5

V

- Drain-to-Source Voltage (V)

DS

VGS=3V

Output Characteristics

0.024

0.022

0.020

VGS=4.5V

30

24

18

12

- Drain Current (A)I

D

6

0

012345

TC= 25 °C

TC= 125 °C

- Gate-to-Source Voltage (V)

V

GS

TC= - 55 °C

Transfer Characteristics

1200

C

960

720

iss

0.018

- On-Resistance (Ω)R

DS(on)

0.016

0.014 0 6 12 18 24 30

VGS=10V

ID- Drain Current (A)

On-Resistance vs. Drain Current

10

= 8 A

I

D

8

VDS=10V

6

4

- Gate-to-Source Voltage (V)

V

GS

2

0

0.0 3.6 7.2 10.8 14.4 18.0

VDS=15V

VDS=20V

Qg- Total Gate Charge (nC)

Gate Charge

480

C - Capacitance (pF)

240

C

0

0 5 10 15 20 25 30

C

oss

rss

VDS- Drain-to-Source Voltage (V)

Capacitance

1.8

ID= 8 A

1.6

VGS=10V

1.4

1.2

- On-Resistance (Normalized)

1.0

DS(on)

R

0.8

0.6

- 50 - 25 0 25 50 75 100 125 150

-Junction Temperature (°C)

T

J

On-Resistance vs. Junction Temperature

VGS=4.5V

www.vishay.com 8

Document Number: 68790

S09-2109-Rev. B, 12-Oct-09

CHANNEL-2 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

Si4834CDY

Vishay Siliconix

100

10

1

0.1

- Source Current (A)I

S

0.01

0.001

0.0 0.2 0.4 0.6 0.8 1.0 1.2

TJ= 150 °C

VSD-Source-to-Drain Voltage (V)

Source-Drain Diode Forward Voltage

0.4

0.2

0.0

- 0.2

Variance (V)V

GS(th)

- 0.4

- 0.6

ID= 250 µA

TJ= 25 °C

ID=5mA

0.10

I

= 8 A

D

0.08

0.06

0.04

- On-Resistance (Ω)R

DS(on)

0.02

0.00 02468 10

VGS- Gate-to-Source Voltage (V)

TJ= 125 °C

TJ= 25 °C

On-Resistance vs. Gate-to-Source Voltage

60

48

36

Power (W)

24

12

8

- 0.

- 50 - 25 0 25 50 75 100 125 150

Document Number: 68790 S09-2109-Rev. B, 12-Oct-09

TJ- Temperature (°C)

Threshold Voltage

100

10

1

- Drain Current (A)

D

I

0.1

0.01

0

Limited byR

TA= 25 °C

Single Pulse

0.1 1 10

- Drain-to-Source Voltage (V)

V

DS

> minimum VGSat which R

* V

GS

DS(on)

*

BVDSS Limited

DS(on)

1ms

10 ms

100 ms

1s 10 s

DC

is specified

Safe Operating Area, Junction-to-Ambient

0.1

Time (s)

Single Pulse Power, Junction-to-Ambient

100

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011100.00.01

9

Si4834CDY

Vishay Siliconix

CHANNEL-2 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

10

8

Package Limited

6

4

- Drain Current (A)

D

I

2

0

0 255075100125150

- Case Temperature (°C)

T

C

Current Derating*

3.5

2.8

2.1

Power (W)

1.4

0.7

0.0 0 25 50 75 100 125 150

T

- Case Temperature (°C)

C

Power Derating, Junction-to-Foot

1.5

1.2

0.9

Power (W)

0.6

0.3

0.0 0 25 50 75 100 125 150

-Ambient Temperature (°C)

T

A

Power Derating, Junction-to-Ambient

* The power dissipation PD is based on T

= 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper

J(max)

dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package

limit.

www.vishay.com 10

Document Number: 68790

S09-2109-Rev. B, 12-Oct-09

CHANNEL-2 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

1

Duty Cycle = 0.5

0.2

Si4834CDY

Vishay Siliconix

Thermal Impedance

Normalized Effective Transient

Thermal Impedance

Normalized Effective Transient

0.1

0.01

0.1

0.01

0.05

0.02

-4

10

1

-4

10

0.1

Duty Cycle = 0.5

0.2

0.1

0.05

0.02

Single Pulse

-3

10

Notes:

P

DM

1. Duty Cycle, D =

2. Per Unit Base = R

3. T

4. Surface Mounted

-2

10

-1

1

10

Square WavePulse Duration (s)

Normalized Thermal Transient Impedance, Junction-to-Ambient

-3

-2

10

Square WavePulse Duration (s)

-1

Normalized Thermal Transient Impedance, Junction-to-Foot

t

1

t

2

JM-TA=PDMZthJA

100

thJA

t

1

t

2

(t)

= 110 °C/W

100010

01110

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?68790

Document Number: 68790 S09-2109-Rev. B, 12-Oct-09

.

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11

SOIC (NARROW): 8-LEAD

JEDEC Part Number: MS-012

Package Information

Vishay Siliconix

D

e

BA

1

DIM

A 1.35 1.75 0.053 0.069

A

1

B 0.35 0.51 0.014 0.020

C 0.19 0.25 0.0075 0.010

D 4.80 5.00 0.189 0.196

E 3.80 4.00 0.150 0.157

e 1.27 BSC 0.050 BSC

H 5.80 6.20 0.228 0.244

h 0.25 0.50 0.010 0.020

L 0.50 0.93 0.020 0.037

q0°8°0°8°

S 0.44 0.64 0.018 0.026

ECN: C-06527-Rev. I, 11-Sep-06 DWG: 5498

8

1

0.25 mm (Gage Plane)

A

6

7

2

5

HE

3

4

S

h x 45

C

L

MILLIMETERS INCHES

Min Max Min Max

0.10 0.20 0.004 0.008

All Leads

q

0.101 mm

0.004"

Document Number: 71192 11-Sep-06

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1

VISHAY SILICONIX

TrenchFET® Power MOSFETs

Application Note 808

Mounting LITTLE FOOT®, SO-8 Power MOSFETs

Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use

integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and

0.050

1.27

design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same.

See Application Note 826, Recommended Minimum Pad

Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/ppg?72286), for the

0.027

0.69

0.07

1.98

Figure 2. Dual MOSFET SO-8 Pad Pattern

basis of the pad design for a LITTLE FOOT SO-8 power MOSFET. In converting this recommended minimum pad to the pad set for a power MOSFET, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package.

In the case of the SO-8 package, the thermal connections are very simple. Pins 5, 6, 7, and 8 are the drain of the MOSFET for a single MOSFET package and are connected together. In a dual package, pins 5 and 6 are one drain, and pins 7 and 8 are the other drain. For a small-signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The

The minimum recommended pad patterns for the single-MOSFET SO-8 with copper spreading (Figure 1) and dual-MOSFET SO-8 with copper spreading (Figure 2) show the starting point for utilizing the board area available for the heat-spreading copper. To create this pattern, a plane of copper overlies the drain pins. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. These patterns use all the available area underneath the body for this purpose.

total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board.

Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder

0.288

7.3

connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the

0.050

1.27

0.027

0.69

0.078

1.98

0.2

5.07

0.196

5.0

Figure 1. Single MOSFET SO-8 Pad

Pattern With Copper Spreading

Document Number: 70740 www.vishay.com Revision: 18-Jun-07 1

drain pins, the solder mask generation occurs automatically.

A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least

0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device.

0.288

7.3

8

0.2

5.07

With Copper Spreading

0.088

2.25

0.088

2.25

APPLICATION NOTE

Application Note 826

Vishay Siliconix

RECOMMENDED MINIMUM PADS FOR SO-8

0.172

(4.369)

0.028

(0.711)

Return to Index

0.022

(0.559)

0.246 (6.248)

Recommended Minimum Pads

Dimensions in Inches/(mm)

0.050

(1.270)

0.152

0.047

(3.861)

(1.194)

APPLICATION NOTE

www.vishay.com Document Number: 72606 22 Revision: 21-Jan-08

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