Datasheet si4833ad Datasheet

Si4833ADY

AK

A K

SD

G

D

SO-8

5

6

7

8

Top View

2

3

4

1

Ordering Information: Si4833ADY

-T1-E3

(Lead (Pb)-free)

Si4833ADY-T1-GE3 (Lead (Pb)-free and Halogen-free)

K

A

S

G

D

P-Channel MOSFET

Vishay Siliconix

P-Channel 30 V (D-S) MOSFET with Schottky Diode

MOSFET PRODUCT SUMMARY

VDS (V) R

- 30

0.072 at V

0.110 at V

DS(on)

GS

()

= - 10 V

= - 4.5 V

I

D

- 4.6

- 3.4

(A)

a

Qg (Typ.)

- 4.6

FEATURES

• Halogen-free According to IEC 61249-2-21 Definition

• LITTLE FOOT

• Compliant to RoHS Directive 2002/95/EC

®

Plus Power MOSFET

SCHOTTKY PRODUCT SUMMARY

(V)

V

VKA (V)

Diode Forward Voltage I

F

D

(A)

a

30 0.50 V at 1 A 2.4

ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)

Parameter Symbol Limit Unit

Drain-Source Voltage (MOSFET) V Reverse Voltage (Schottky) V Gate-Source Voltage (MOSFET) V

T

= 25 °C

C

= 70 °C - 3.6

T

Continuous Drain Current (T

= 150 °C) (MOSFET)

J

C

= 25 °C

T

A

TA = 70 °C

Pulsed Drain Current (MOSFET) I

Continuous Source Current (MOSFET Diode Conduction)

Average Forward Current (Schottky) I Pulsed Forward Current (Schottky) I

TC = 25 °C

= 70 °C 1.75

T

Maximum Power Dissipation (MOSFET and Schottky)

C

= 25 °C

T

A

TA = 70 °C

Operating Junction and Storage Temperature Range

T

DS

KA

GS

I

D

DM

I

S

F

FM

P

D

, T

J

stg

- 30

± 20

- 4.6

b, c

- 3.85

b, c

- 3.08

- 20

- 2.3

b, c

- 1.4

b

- 1.4

- 20

2.75

1.93

1.23

b, c

W

- 55 to 150 °C

V

A

THERMAL RESISTANCE RATINGS

Parameter Symbol Typical Maximum Unit

Maximum Junction-to-Ambient (MOSFET and Schottky) Maximum Junction-to-Foot (Drain) (MOSFET and Schottky)

Notes: a. Based on T b. Surface mounted on FR4 board. c. t  10 s. d. Maximum under steady state conditions is 120 °C/W.

Document Number: 73627 S10-2547-Rev. D, 08-Nov-10

= 25 °C.

C

b, c, d

R

thJA

R

thJF

60 65 35 45

°C/W

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1

Si4833ADY

Vishay Siliconix

MOSFET SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

Parameter Symbol Test Conditions Min. Typ. Max. Unit

Static

V

Drain-Source Breakdown Voltage

V

Temperature Coefficient

DS

V

Temperature Coefficient

GS(th)

Gate Threshold Voltage

Gate-Body Leakage

Zero Gate Voltage Drain Current

On-State Drain Current

a

Drain-Source On-State Resistance

Forward Transconductance

Dynamic

b

a

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

Gate Resistance

Tur n - O n D e l ay Time

Rise Time

Turn-Off Delay Time

Fall Ti me

Tu r n - O n D e l ay T i m e

Rise Time

Turn-Off Delay Time

Fall Time

a

V

DS

V

DS/TJ



V

GS(th)/TJ

V

GS(th)

I

GSS

I

DSS

I

V

D(on)

R

DS(on)

g

fs

C

iss

C

oss

C

rss

Q

g

Q

gs

Q

gd

R

g

t

d(on)

t

r

t

d(off)

t

f

t

d(on)

t

r

t

d(off)

t

f

Drain-Source Body Diode Characteristics

Continous Source-Drain Diode Current

Pulse Diode Forward Current

a

Body Diode Voltage

Body Diode Reverse Recovery Time

Body Diode Reverse Recovery Charge

Reverse Recovery Fall Time

Reverse Recovery Rise Time

I

S

I

SM

V

SD

t

rr

Q

rr

t

a

t

b

Notes: a. Pulse test; pulse width  300 µs, duty cycle  2 %. b. Guaranteed by design, not subject to production testing.

V

DS

V

DS

V

DS

I

D

I

D

IF = - 2 A, dI/dt = 100 A/µs, TJ = 25 °C

= 0 V, ID = - 250 µA

DS

ID = 250 µA

V

= VGS, ID = - 250 µA

DS

VDS = 0 V, VGS = ± 20 V

V

= - 30 V, V

DS

= - 30 V, V

- 5 V, V

DS

V

= - 10 V, ID = - 3.6 A

GS

V

= - 4.5 V, ID = - 2.8 A

GS

= 0 V, TJ = 75 °C

GS

= - 10 V

GS

VDS = - 15 V, ID = - 3.6 A

= - 15 V, V

DS

= - 15 V, V

= 0 V, f = 1 MHz

GS

= - 10 V, ID = - 3 A

GS

= - 4.5 V, ID = - 3 A

GS

f = 1 MHz 8 16 

V

= - 15 V, RL = 7.5 

DD

 - 2 A, V

= - 4.5 V, Rg = 1 

GEN

VDD = - 15 V, RL = 7.5 

 - 2 A, V

= - 10 V, Rg = 1 

GEN

TC = 25 °C

IS = - 1.4 A, V

GS

= 0 V

- 30 V

- 28

3.5

mV/°C

- 1 - 2 - 2.5 V

± 100 nA

- 1

- 10

- 5 A

0.059 0.072

0.090 0.110

7S

380 750

100

75

9.8 15

4.6 7.0

1.4

2.4

20 30

59 90

26 40

19 30

714

11 17

19 30

815

- 4.6

- 20

- 0.8 - 1.2 V

23 40 ns

12 20 nC

10

13

µA



pF

nC

ns

A

ns

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Document Number: 73627

S10-2547-Rev. D, 08-Nov-10

Si4833ADY

Vishay Siliconix

SCHOTTKY SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

Parameter Symbol Test Conditions Min. Typ. Max. Unit

Forward Voltage Drop

Maximum Reverse Leakage Current

Junction Capacitance

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and fun ctional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

V

F

I

rm

C

T

IF = 1 A

I

= 1 A, TJ = 125 °C

F

VR = 30 V

V

= 30 V, TJ = 75 °C

R

V

= 30 V, TJ = 125 °C

R

VR = 10 V

0.45 0.50

0.36 0.42

0.004 0.1

0.1 2 320

62 pF

V

mA

Document Number: 73627 S10-2547-Rev. D, 08-Nov-10

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3

Si4833ADY

0

5

10

15

20

0.0 0.6 1.2 1.8 2.4 3.0

V

GS

= 5 V

V

DS

- Drain-to-Source Voltage (V)

)A( tnerruC niarD -I

D

VGS = 10 V thru 6 V

V

GS

= 4 V

V

GS

= 3 V

0.04

0.06

0.08

0.10

0.12

0.14

0.16

02468 10

V

GS

= 10 V

I

D

- Drain Current (A)

VGS = 4.5 V

R

) n o(SD

m( ecnatsiseR-nO - )

0

2

4

6

8

10

02468 10

I D = 1.7 A

)

V

(

ega

tlo

V

e c

ruoS

-o teta

G

-

Qg - Total Gate Charge (nC)

V

GS

V

DS

= 15 V

3.0

0.6

0.8

1.0

1.2

1.4

1.6

- 50 - 25 0 25 50 75 100 125 150

T

J

- Junction Temperature (°C)

R

) n o

( SD

e c n

a

t s i s

e R - n O -

)dezilamroN

(

Vishay Siliconix

MOSFET TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

2.4

)A( tnerruC niarD -I

1.8

1.2

D

0.6

ID = 125 °C

ID = 25 °C

Output Characteristics

On-Resistance vs. Drain Current and Gate Voltage

0.0

0.0 0.8 1.6 2.4 3.2 4.0

VGS - Gate-to-Source Voltage (V)

ID = - 55 °C

Transfer Characteristics

700

600

500

)Fp( ecn

C

400

a

tica

p

300

aC

- C

200

100

C

0

0 6 12 18 24 30

iss

C

oss

rss

VDS - Drain-to-Source Voltage (V)

Capacitance

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Gate Charge

On-Resistance vs. Junction Temperature

Document Number: 73627

S10-2547-Rev. D, 08-Nov-10

MOSFET TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

0.2 0.4 0.6 0.8 1.0 1.2

10

VSD = 25 °C

VSD = 150 °C

V

SD

- Source-to-Drain Voltage (V)

)A( tnerruC ecruoS -I

S

1

- 0.4

- 0.2

0.0

0.2

0.4

0.6

- 50 - 25 0 25 50 75 100 125 150

I D = 250 µA

T

J

- Temperature (°C)

V

)h t

(SG

Variance (V)

0.0

0.1

0.2

0.3

02468 10

V

GS

- Gate-to-Source Voltage (V)

R

)no(SD

( ecnatsiseR-nO ecruoS-ot-niarD -)

0

30

50

10

20

)W( r

e w o

P

Time (s)

40

1100.10.01 0.001

100

Si4833ADY

Vishay Siliconix

Source-Drain Diode Forward Voltage

Threshold Voltage

10

)A ( tn

e rruC

Document Number: 73627 S10-2547-Rev. D, 08-Nov-10

niarD

-I

D

0.1

0.01

On-Resistance vs. Gate-to-Source Voltage

Single Pulse Power, Junction-to-Ambient

IDMLimited

Limited

by R *

DS(on)

1

I

D(on)

Limited

T A = 25 °C

Single Pulse

0.1 1 10 100

VDS - Drain-to-Source Voltage (V)

minimum VGS at which R

* V

GS

BVDSS Limited

DS(on)

1 ms

10 ms

100 ms

1 s 10 s DC

is specified

Safe Operating Area, Junction-to-Case

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5

Si4833ADY

0.0

0.7

1.4

2.1

2.8

3.5

0 25 50 75 100 125 150

T

C

- Case Temperature (°C)

)W(

n o

ita p

i s s

i D r

e

w

oP

1.2

Vishay Siliconix

MOSFET TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

5

4

)A( tnerruC niarD -

3

2

D

I

1

0

0 25 50 75 100 125 150

T C - Case Temperature (°C)

Current Derating*

5

1.00

)W(

noita

0.75

p

issiD re

0.50

w

oP

0.25

0.00 0 25 50 75 100 125 150

TA - Ambient Temperature (°C)

Power Derating, Junction-to-Foot

* The power dissipation PD is based on T dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit.

= 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper

J(max)

Power Derating, Junction-to-Ambient

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Document Number: 73627

S10-2547-Rev. D, 08-Nov-10

MOSFETS TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

f

1

Duty Cycle = 0.5

Si4833ADY

Vishay Siliconix

e c n a d e p m I l a m r e h T

e v i t c e f f E d e z i l a m r o N t n e i s n a r T

0.2

0.1

Notes:

0.1

P

DM

t

1

t

- TA = PDMZ

JM

2

1. Duty Cycle, D =

2. Per Unit Base = R

3. T

4. Surface Mounted

100

thJA

t t

thJA

1

2

(t)

= 120 °C/W

0.01

0.05

0.02

Single Pulse

-4

10

-3

10

-2

-1

1 10 100010

Square Wave Pulse Duration (s)

Normalized Thermal Transient Impedance, Junction-to-Ambient

1

Duty Cycle = 0.5

e c n a d e p m I

e v i t

c e

l a m r e h T

f E d e z

i l a

m r o N t n e i s n a r T

0.2

0.1

0.05

0.02

0.01

Single Pulse

10

-4

10

-3

10

-2

-1

1 10 10

Square Wave Pulse Duration (s)

Normalized Thermal Transient Impedance, Junction-to-Foot

Document Number: 73627 S10-2547-Rev. D, 08-Nov-10

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7

Si4833ADY

125 150

0.0001

1

20

T

J

- Junction Temperature (°C)

)Am( tnerruC esreveR -I

R

0 255075100

10 V

0.001

0.01

0.1

10

20 V

0.5 0.6

0.01

1

3

V

F

- Forward Voltage Drop (V)

) A ( t n e r r u C d r a w r o F -I

F

0 0.1 0.2 0.3 0.4

TJ = 25 °C

TJ = 150 °C

0.1

Vishay Siliconix

SCHOTTKY TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Reverse Current vs. Junction Temperature

250

)Fp( ecnatica

200

150

p aC no

i

100

tcnuJ-

T

50

C

0

048 12 16 20

C

iss

- Reverse Voltage (V)

V

KA

Capacitance

Forward Voltage Drop

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?73627

www.vishay.com 8

.

Document Number: 73627

S10-2547-Rev. D, 08-Nov-10

SOIC (NARROW): 8-LEAD

JEDEC Part Number: MS-012

Package Information

Vishay Siliconix

D

e

BA

1

DIM

A 1.35 1.75 0.053 0.069

A

1

B 0.35 0.51 0.014 0.020

C 0.19 0.25 0.0075 0.010

D 4.80 5.00 0.189 0.196

E 3.80 4.00 0.150 0.157

e 1.27 BSC 0.050 BSC

H 5.80 6.20 0.228 0.244

h 0.25 0.50 0.010 0.020

L 0.50 0.93 0.020 0.037

q0°8°0°8°

S 0.44 0.64 0.018 0.026

ECN: C-06527-Rev. I, 11-Sep-06 DWG: 5498

8

1

0.25 mm (Gage Plane)

A

6

7

2

5

HE

3

4

S

h x 45

C

L

MILLIMETERS INCHES

Min Max Min Max

0.10 0.20 0.004 0.008

All Leads

q

0.101 mm

0.004"

Document Number: 71192 11-Sep-06

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1

VISHAY SILICONIX

Trench FET® Power MOSFETs

Application Note 808

Mounting LITTLE FOOT®, SO-8 Power MOSFETs

Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use

integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and

0.050

1.27

design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same.

See Application Note 826, Recommended Minimum Pad

Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/ppg?72286), for the

0.027

0.69

0.07

1.98

Figure 2. Dual MOSFET SO-8 Pad Pattern

basis of the pad design for a LITTLE FOOT SO-8 power MOSFET. In converting this recommended minimum pad to the pad set for a power MOSFET, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package.

In the case of the SO-8 package, the thermal connections are very simple. Pins 5, 6, 7, and 8 are the drain of the MOSFET for a single MOSFET package and are connected together. In a dual package, pins 5 and 6 are one drain, and pins 7 and 8 are the other drain. For a small-signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The

The minimum recommended pad patterns for the single-MOSFET SO-8 with copper spreading (Figure 1) and dual-MOSFET SO-8 with copper spreading (Figure 2) show the starting point for utilizing the board area available for the heat-spreading copper. To create this pattern, a plane of copper overlies the drain pins. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. These patterns use all the available area underneath the body for this purpose.

total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board.

Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder

0.288

7.3

connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the

0.050

1.27

0.027

0.69

0.078

1.98

0.2

5.07

0.196

5.0

Figure 1. Single MOSFET SO-8 Pad

Pattern With Copper Spreading

Document Number: 70740 www.vishay.com Revision: 18-Jun-07 1

drain pins, the solder mask generation occurs automatically.

A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least

0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device.

0.288

7.3

8

0.2

5.07

With Copper Spreading

0.088

2.25

0.088

2.25

APPLICATION NOTE

Application Note 826

Vishay Siliconix

RECOMMENDED MINIMUM PADS FOR SO-8

0.172

(4.369)

0.028

(0.711)

Return to Index

0.022

(0.559)

0.246 (6.248)

Recommended Minimum Pads

Dimensions in Inches/(mm)

0.050

(1.270)

0.152

0.047

(3.861)

(1.194)

APPLICATION NOTE

www.vishay.com Document Number: 72606 22 Revision: 21-Jan-08

Legal Disclaimer Notice

Vishay

Disclaimer

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product.

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability.

Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein.

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.

Document Number: 91000 www.vishay.com Revision: 11-Mar-11 1