Dual N-Channel 30-V (D-S) MOSFET with Schottky Diode
PRODUCT SUMMARY
Channel-1
Channel-2
VDS (V)R
0.0185 at V
0.0225 at V
30
0.0115 at V
0.016 at V
(Ω)I
DS(on)
= 10 V
GS
= 4.5 V
GS
= 10 V
GS
= 4.5 V
GS
SCHOTTKY PRODUCT SUMMARY
V
(V)
VDS (V)
Diode Forward Voltage
300.50 V at 1.0 A2.0
G
1
1
A/S
2
2
A/S
3
2
G
4
2
Ordering Information:
Si4816BDY-T1-E3 (Lead (Pb)-free)
Si4816BDY-T1-GE3 (Lead (Pb)-free and Halogen-free)
SD
SO-8
Top View
D
8
1
D2/S
7
D2/S
6
D2/S
5
(A) Qg (Typ.)
D
6.8
6.0
11.4
9.5
1
1
1
7.8
11.6
(A)
I
F
FEATURES
• Halogen-free According to IEC 61249-2-21
Available
• LITTLE FOOT
• 100 % R
®
Plus Power MOSFET
Tested
g
D
G
1
N-Channel 1
MOSFET
G
2
N-Channel 2
MOSFET
1
S1/D
2
Schottky Diod
S
A
2
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Channel-1Channel-2
Parameter
Drain-Source Voltage
Gate-Source Voltage
TA = 25 °C
Continuous Drain Current (T
= 150 °C)
J
a
= 70 °C
T
A
Pulsed Drain Current
Continuous Source Current (Diode Conduction)
Single Pulse Avalanche Current
Avalanche Energy
Maximum Power Dissipation
a
a
L = 0.1 mH
TA = 25 °C
= 70 °C
T
A
Operating Junction and Storage Temperature Range
Symbol
V
DS
V
GS
I
D
I
DM
I
S
I
AS
E
AS
P
D
T
, T
J
stg
6.85.811.48.2
5.54.69.06.5
3040
10.92.21.15
1020
1.41.02.41.25
0.90.641.50.8
THERMAL RESISTANCE RATINGS
Channel-1Channel-2Schottky
Parameter
Maximum Junction-to-Ambient
a
t ≤ 10 s
Steady State1001258210080100
Maximum Junction-to-Foot (Drain)Steady State
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
Document Number: 73026
S09-0394-Rev. D, 09-Mar-09
Symbol
R
thJA
R
thJF
729043534860
516325302835
Unit 10 sSteady State10 sSteady State
30
20
V
A
520mJ
W
- 55 to 150°C
Unit Typ.Max.Typ.Max.Typ.Max.
°C/W
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1
Page 2
Si4816BDY
Vishay Siliconix
MOSFET SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter Symbol Test Conditions Min.
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
b
Drain-Source On-State Resistance
Forward Transconductance
Diode Forward Voltage
Dynamic
a
b
b
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Tur n -O n De l ay Ti m e
Rise Time
Turn-Off Delay Time
Fall Time
Source-Drain Reverse Recovery Time
V
GS(th)
I
GSS
I
DSS
I
V
D(on)
b
R
DS(on)
g
fs
V
SD
Q
g
Q
gs
V
Q
gd
R
g
t
d(on)
t
r
t
d(off)
t
f
t
rr
Notes:
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
V
= VGS, ID = 250 µA
DS
VDS = 0 V, VGS = 20 V
V
= 30 V, V
V
DS
DS
= 30 V, V
= 5 V, V
DS
V
= 10 V, ID = 6.8 A
GS
V
= 10 V, ID = 11.4 A
GS
V
= 4.5 V, ID = 6.0 A
GS
V
= 4.5 V, ID = 9.5 A
GS
GS
= 0 V, TJ = 85 °C
GS
GS
VDS = 15 V, ID = 6.8 A
V
= 15 V, ID = 11.4 A
DS
IS = 1 A, V
I
S
= 1 A, V
GS
GS
Channel-1
V
= 15 V, V
DS
= 5 V, ID = 6.8 A
GS
Channel-2
= 15 V, V
DS
= 5 V, ID = - 11.4 A
GS
Channel-1
V
= 15 V, RL = 15 Ω
DD
≅ 1 A, V
I
D
= 10 V, Rg = 6 Ω
GEN
Channel-2
V
= 15 V, RL = 15 Ω
DD
≅ 1 A, V
I
D
= 10 V, Rg = 6 Ω
GEN
IF = 1.3 A, dI/dt = 100 A/µs
I
= 2.2 A, dI/dt = 100 µA/µs
F
= 0 V
= 10 V
= 0 V
= 0 V
Ch-11.03.0
Ch-21.03.0
Ch-1100
Ch-2100
Ch-11
Ch-2100
Ch-115
Ch-22000
Ch-120
Ch-230
Ch-10.01550.0185
Ch-20.00930.0115
Ch-10.01850.0225
Ch-20.0130.016
Ch-130
Ch-231
Ch-10.731.1
Ch-20.470.5
Ch-17.810
Ch-211.618
Ch-12.9
Ch-24.8
Ch-12.3
Ch-23.7
Ch-11.53.04.5
Ch-20.91.82.7
Ch-11117
Ch-21320
Ch-1915
Ch-2915
Ch-12440
Ch-23150
Ch-1915
Ch-21117
Ch-12035
Ch-22540
Typ .
a
Max.Unit
V
nA
µA
A
Ω
S
V
nC
Ω
ns
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2
Document Number: 73026
S09-0394-Rev. D, 09-Mar-09
Page 3
Si4816BDY
Vishay Siliconix
SCHOTTKY SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter Symbol Test Conditions Min.Typ.Max.Unit
Forward Voltage Drop
V
F
IF = 1.0 A
I
= 1.0 A, TJ = 125 °C
F
VR = 30 V
Maximum Reverse Leakage Current
Junction Capacitance
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and fun ctional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
I
rm
C
T
= 30 V, TJ = 100 °C
V
R
V
= - 30 V, TJ = 125 °C
R
VR = 10 V
CHANNEL-1 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
0.470.50
0.360.42
0.0040.100
0.710
3.020
50pF
V
mA
– Drain Current (A)I
D
– On-Resistance (Ω)
DS(on)
R
40
35
30
25
20
15
10
5
0
012345
VGS = 10 thru 4 V
3 V
– Drain-to-Source Voltage (V)
V
DS
2 V
Output Characteristics
0.05
0.04
0.03
VGS = 4.5 V
0.02
VGS = 10 V
0.01
40
35
30
25
20
15
– Drain Current (A)I
D
10
5
0
0.0 0.5 1.01.5 2.0 2.53.0 3.5 4.04.5
1200
1000
800
600
C – Capacitance (pF)
400
200
TC = 125 °C
25 °C
– Gate-to-Source Voltage (V)
V
GS
Transfer Characteristics
C
oss
C
rss
- 55 °C
C
iss
0.00
0510152025303540
On-Resistance vs. Drain Current
Document Number: 73026
S09-0394-Rev. D, 09-Mar-09
ID – Drain Current (A)
0
051015202530
VDS – Drain-to-Source Voltage (V)
Capacitance
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Page 4
Si4816BDY
Vishay Siliconix
CHANNEL-1 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
6
VDS = 15 V
I
= 6.8 A
5
4
3
2
– Gate-to-Source Voltage (V)
GS
V
1
0
D
0246810
Qg – Total Gate Charge (nC)
Gate Charge
40
TJ = 150 °C
10
1.6
1.4
1.2
1.0
– On-Resistance
(Normalized)
DS(on)
R
0.8
0.6
- 50 - 250255075100125150
0.05
0.04
0.03
VGS = 10 V
I
= 6.8 A
D
– Junction Temperature (°C)
T
J
On-Resistance vs. Junction Temperature
ID = 6.8 A
TJ = 25 °C
– Source Current (A)I
S
1
0.00.20.40.60.81.01.21.4
VSD – Source-to-Drain Voltage (V)
Source-Drain Diode Forward Voltage
0.4
0.2
0.0
Variance (V)V
- 0.2
GS(th)
- 0.4
- 0.6
- 0.8
- 50 - 250255075100125150
TJ – Temperature (°C)
ID = 250 µA
Threshold Voltage
– On-Resistance (Ω)
DS(on)
R
Power (W)
0.02
0.01
0.00
0246810
VGS – Gate-to-Source Voltage (V)
On-Resistance vs. Gate-to-Source Voltage
100
80
60
40
20
0
0.001
0.01
Time (s)
1
Single Pulse Power, Junction-to-Ambient
10 0.1
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4
Document Number: 73026
S09-0394-Rev. D, 09-Mar-09
Page 5
CHANNEL-1 TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
SCHOTTKY TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Si4816BDY
Vishay Siliconix
– Reverse Current (mA)I
R
20
10
1
0.1
0.01
0.001
0.0001
0255075100125150
30 V
–
TJ Temperature ( °C)
24 V
Reverse Current vs. Junction Temperature
200
160
120
10
TJ = 150 °C
TJ = 25 °C
−)A( tnerruC drawroF I
F
1
0.00.30.60.91.21.5
VF− Forward Voltage Drop (V)
Forward Voltage Drop
80
C – Capacitance (pF)
40
0
0612182430
C
oss
VDS – Drain-to-Source Voltage (V)
Capacitance
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?73026
Document Number: 73026
.
www.vishay.com
S09-0394-Rev. D, 09-Mar-09
9
Page 10
SOIC (NARROW): 8-LEAD
JEDEC Part Number: MS-012
Package Information
Vishay Siliconix
D
e
BA
1
DIM
A1.351.750.0530.069
A
1
B0.350.510.0140.020
C0.190.250.00750.010
D4.805.000.1890.196
E3.804.000.1500.157
e1.27 BSC0.050 BSC
H5.806.200.2280.244
h0.250.500.0100.020
L0.500.930.0200.037
q0°8°0°8°
S0.440.640.0180.026
ECN: C-06527-Rev. I, 11-Sep-06
DWG: 5498
8
1
0.25 mm (Gage Plane)
A
6
7
2
5
HE
3
4
S
h x 45
C
L
MILLIMETERSINCHES
MinMaxMinMax
0.100.200.0040.008
All Leads
q
0.101 mm
0.004"
Document Number: 71192
11-Sep-06
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1
Page 11
VISHAY SILICONIX
TrenchFET® Power MOSFETs
Application Note 808
Mounting LITTLE FOOT®, SO-8 Power MOSFETs
Wharton McDaniel
Surface-mounted LITTLE FOOT power MOSFETs use
integrated circuit and small-signal packages which have
been been modified to provide the heat transfer capabilities
required by power devices. Leadframe materials and
0.050
1.27
design, molding compounds, and die attach materials have
been changed, while the footprint of the packages remains
the same.
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/ppg?72286), for the
0.027
0.69
0.07
1.98
Figure 2. Dual MOSFET SO-8 Pad Pattern
basis of the pad design for a LITTLE FOOT SO-8 power
MOSFET. In converting this recommended minimum pad
to the pad set for a power MOSFET, designers must make
two connections: an electrical connection and a thermal
connection, to draw heat away from the package.
In the case of the SO-8 package, the thermal connections
are very simple. Pins 5, 6, 7, and 8 are the drain of the
MOSFET for a single MOSFET package and are connected
together. In a dual package, pins 5 and 6 are one drain, and
pins 7 and 8 are the other drain. For a small-signal device or
integrated circuit, typical connections would be made with
traces that are 0.020 inches wide. Since the drain pins serve
the additional function of providing the thermal connection
to the package, this level of connection is inadequate. The
The minimum recommended pad patterns for the
single-MOSFET SO-8 with copper spreading (Figure 1) and
dual-MOSFET SO-8 with copper spreading (Figure 2) show
the starting point for utilizing the board area available for the
heat-spreading copper. To create this pattern, a plane of
copper overlies the drain pins. The copper plane connects
the drain pins electrically, but more importantly provides
planar copper to draw heat from the drain leads and start the
process of spreading the heat so it can be dissipated into the
ambient air. These patterns use all the available area
underneath the body for this purpose.
total cross section of the copper may be adequate to carry
the current required for the application, but it presents a
large thermal impedance. Also, heat spreads in a circular
fashion from the heat source. In this case the drain pins are
the heat sources when looking at heat spread on the PC
board.
Since surface-mounted packages are small, and reflow
soldering is the most common way in which these are
affixed to the PC board, “thermal” connections from the
planar copper to the pads have not been used. Even if
additional planar copper area is used, there should be no
problems in the soldering process. The actual solder
0.288
7.3
connections are defined by the solder mask openings. By
combining the basic footprint with the copper plane on the
drain pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces.
The absolute minimum power trace width must be
determined by the amount of current it has to carry. For
thermal reasons, this minimum width should be at least
0.020 inches. The use of wide traces connected to the drain
plane provides a low impedance path for heat to move away
from the device.
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
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applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
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