Datasheet SI4800 Datasheet (Philips) [ru]

Page 1
M3D315
1. Product profile

1.1 Description

1.3 Applications

SI4800
N-channel TrenchMOS™ logic level FET
Rev. 02 — 17 February 2004 Product data
N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOS™ technology.
Low gate charge Surface mounted package
Low on-state resistance Fast switching.
Portable appliances Notebook computers
Lithium-ion battery chargers DC-to-DC converters.

1.4 Quick reference data

VDS≤ 30 V ■ ID≤ 9A
P
2.5 W R
tot
DSon

2. Pinning information

Table 1: Pinning - SOT96-1 (SO-8), simplified outline and symbol
Pin Description Simplified outline Symbol
1,2,3 source (s) 4 gate (g) 5,6,7,8 drain (d)
8
1
Top view MBK187
SOT96-1 (SO8)
5
4
18.5 m
g
MBB076
d
s
Page 2
Philips Semiconductors
SI4800
N-channel TrenchMOS™ logic level FET

3. Ordering information

Table 2: Ordering information
Type number Package
Name Description Version
SI4800 SO8 plastic small outline package; 8 leads SOT96-1

4. Limiting values

Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
GS
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
S
drain-source voltage (DC) 25 °C Tj≤ 150 °C - 30 V gate-source voltage (DC) - ±20 V drain current T
peak drain current T total power dissipation T
=25°C; pulsed; tp≤ 10 s;
amb
=70°C; pulsed; tp≤ 10 s;
T
amb
=25°C; pulsed; tp≤ 10 µs;
amb
=25°C; pulsed; tp≤ 10 s;
amb
=70°C; pulsed; tp≤ 10 s;
T
amb
Figure 2 and 3 -9A Figure 2 -7A
Figure 3 -40A Figure 1 - 2.5 W Figure 1 - 1.6 W
storage temperature 55 +150 °C junction temperature 55 +150 °C
source (diode forward) current T
=25°C; pulsed; tp≤ 10 s - 2.3 A
amb
9397 750 12899
Product data Rev. 02 — 17 February 2004 2 of 12
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Page 3
Philips Semiconductors
SI4800
N-channel TrenchMOS™ logic level FET
T
amb
03aa11
(°C)
120
P
der
(%)
80
40
0
0 50 100 150 200
P
tot
P
der
-----------------------
P
tot 25 C°()
100%×= I
Fig 1. Normalized total power dissipation as a
function of ambient temperature.
2
10
T
amb
03aa19
(°C)
120
I
der
(%)
80
40
0
0 50 100 150 200
I
D
der
-------------------
I
D25C
()
100%×=
°
Fig 2. Normalized continuous drain current as a
function of ambient temperature.
03ap01
I
(A)
10
1
10
10
T
amb
D
-1
-2
Limit R
DSon
-1
10
=25°C; IDM is single pulse.
= V
DS
/ I
D
DC
1 10 10
tp = 10 µs
1 ms
10 ms
100 ms
10 s
VDS (V)
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
2
9397 750 12899
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data Rev. 02 — 17 February 2004 3 of 12
Page 4
Philips Semiconductors
SI4800
N-channel TrenchMOS™ logic level FET

5. Thermal characteristics

Table 4: Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-a)
thermal resistance from junction to ambient mounted on a printed-circuit board;
minimum footprint; tp≤ 10 s;
Figure 4

5.1 Transient thermal impedance

--50K/W
2
10
10
1
10
10
T
amb
-1
-2 10
=25°C
δ = 0.5
0.2
0.1
0.05
0.02
-4
single pulse
-3
10
10
P
t
p
-2
10
-1
1 10 10
2
Z
th(j-amb)
(K/W)
Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration.
03af83
t
p
δ =
T
t
T
3
t
10
(s)
p
9397 750 12899
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data Rev. 02 — 17 February 2004 4 of 12
Page 5
Philips Semiconductors
SI4800
N-channel TrenchMOS™ logic level FET

6. Characteristics

Table 5: Characteristics
Tj=25°C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
GS(th)
I
DSS
I
GSS
R
DSon
I
D(on)
Dynamic characteristics
g
fs
Q
g(tot)
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
Source-drain diode
V
SD
t
rr
gate-source threshold voltage ID= 250 µA; VDS=VGS;
Figure 9 0.8 - - V
drain-source leakage current VDS=24V; VGS=0V
=25°C --1µA
T
j
=55°C --5µA
T
j
gate-source leakage current VGS= ±20 V; VDS= 0 V - - 100 nA drain-source on-state resistance VGS= 10 V; ID=9A;
= 4.5 V; ID=7A;
V
GS
Figure 7 and 8 - 15.5 18.5 m
Figure 7 - 2433m
on-state drain current VDS≥ 5 V; VGS=10V 30 - - A
forward transconductance VDS=15V; ID=9A - 19 - S total gate charge ID= 8 A; VDD=15V; VGS=5V;
Figure 13 - 11.8 - nC
gate-source charge - 2.7 - nC gate-drain (Miller) charge - 5 - nC turn-on delay time VDD=15V; ID= 1.5 A; VGS=10V; RG=6 - 6 16 ns rise time - 7 15 ns turn-off delay time - 23 30 ns fall time - 1115ns
source-drain (diode forward) voltage IS= 7 A; VGS=0V; reverse recovery time IS= 7 A; dIS/dt = 100 A/µs; VR=30V;
Figure 12 - 0.86 1.2 V
- 2580ns
VGS=0V
9397 750 12899
Product data Rev. 02 — 17 February 2004 5 of 12
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Page 6
Philips Semiconductors
SI4800
N-channel TrenchMOS™ logic level FET
10
I
D
(A)
8
6
4
2
0
0 0.2 0.4 0.6 0.8 1
3 V5 V10 V
03ao99
2.8 V
2.7 V
2.5 V
VGS = 2.3 V
V
(V)
DS
Tj=25°CT
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values.
03ap00
R
(mΩ)
80
DSon
VGS = 2.8 V
10 I (A)
VDS > ID x R
D
8
6
4
2
0
0123
=25°C and 150 °C; VDS> IDxR
j
DSon
Tj = 150 °C
Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
2
a
003aaa326
25 °C
VGS (V)
DSon
03aa27
60
40
20
0
0246810
3 V
4 V 5 V
10 V
ID (A)
Tj=25°C
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values.
1.5
1
0.5
0
-60 0 60 120 180
R
DSon
=
a
---------------------------- -
R
DSon 25 C°()
Tj (°C)
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
9397 750 12899
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data Rev. 02 — 17 February 2004 6 of 12
Page 7
Philips Semiconductors
SI4800
N-channel TrenchMOS™ logic level FET
2.5
V
GS(th)
(V)
2
1.5
1
0.5
0
-60 0 60 120 180
ID= 250 µA; VDS=V
max
typ
min
GS
03aq19
Tj (°C)
Fig 9. Gate-source threshold voltage as a function of
junction temperature.
4
10
C
(pF)
-1
10
I
D
(A)
-2
10
-3
10
-4
10
-5
10
-6
10
0123
03aa36
maxtypmin
VGS (V)
Tj=25°C; VDS=5V
Fig 10. Sub-threshold drain current as a function of
gate-source voltage.
003aaa328
3
10
10
10
2
-1
10
1 10 10
C
C C
VDS (V)
iss
oss rss
2
VGS= 0 V; f = 1 MHz
Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.
9397 750 12899
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data Rev. 02 — 17 February 2004 7 of 12
Page 8
Philips Semiconductors
SI4800
N-channel TrenchMOS™ logic level FET
8
I
S
(A)
6
4
2
0
0.2 0.4 0.6 0.8 1
Tj = 150 °C
25 °C
003aaa329
VSD (V)
5
V
GS
(V)
4
3
2
1
0
0 5 10 15
Tj=25°C and 150 °C; VGS=0V ID= 8 A; VDD=15V
Fig 12. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
Fig 13. Gate-source voltage as a function of gate
charge; typical values.
values.
003aaa625
QG (nC)
9397 750 12899
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data Rev. 02 — 17 February 2004 8 of 12
Page 9
Philips Semiconductors

7. Package outline

SI4800
N-channel TrenchMOS™ logic level FET
SO8: plastic small outline package; 8 leads; body width 3.9 mm
D
c
y
Z
8
pin 1 index
1
e
5
A
2
A
4
w M
b
p
SOT96-1
E
H
E
1
L
detail X
A
X
v M
A
Q
(A )
L
p
A
3
θ
0 2.5 5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
mm
OUTLINE
VERSION
SOT96-1
A
A1A2A3b
max.
0.25
1.75
0.10
0.010
0.069
0.004
p
1.45
1.25
0.057
0.049
IEC JEDEC JEITA
076E03 MS-012
0.25
0.01
0.49
0.36
0.019
0.014
0.25
0.19
0.0100
0.0075
UNIT
inches
Notes
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
(1)E(2)
cD
5.0
4.8
0.20
0.19
REFERENCES
eHELLpQZywv θ
4.0
3.8
0.16
0.15
1.27
0.05
6.2
5.8
0.244
0.228
1.05
1.0
0.4
0.039
0.016
0.7
0.6
0.028
0.024
0.25 0.10.25
0.010.010.041 0.004
EUROPEAN
PROJECTION
(1)
0.7
0.3
0.028
0.012
ISSUE DATE
99-12-27 03-02-18
o
8
o
0
Fig 14. SOT96-1 (SO8).
9397 750 12899
Product data Rev. 02 — 17 February 2004 9 of 12
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Page 10
Philips Semiconductors

8. Revision history

Table 6: Revision history
Rev Date CPCN Description
02 20040217 - Product data (9397 750 12899)
Modifications:
Updated to latest standards.
Section 3 “Ordering information” added.
Section 5 “Thermal characteristics” clarification of thermal resistance table.
Section 6 “Characteristics” typical R
Section 6 “Characteristics” typical Q
Section 6 “Characteristics” t
Section 6 “Characteristics” V
Section 6 “Characteristics” t
Section 6 “Characteristics” Figure 5, 6, 7, 11, 12 and 13 modified.
01 20010713 - Product data (9397 750 08412)
N-channel TrenchMOS™ logic level FET
value improved.
DSon
, Qgs and Qgd values improved.
g(tot)
, tr, t
d(on)
conditions, and typical value modified.
SD
conditions and typical value modified
rr
and tf conditions and typical values modified.
d(off)
SI4800
9397 750 12899
Product data Rev. 02 — 17 February 2004 10 of 12
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Page 11
Philips Semiconductors
Philips Semiconductors

9. Data sheet status

SI4800
SI4800
N-channel TrenchMOS™ logic level FET
N-channel TrenchMOS™ logic level FET
Level Data sheet status
I Objective data Development This data sheet contains data from the objective specification for product development. Philips
II Preliminary data Qualification This data sheet contains datafrom the preliminary specification. Supplementary data willbe published
III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the
[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
[1]
Product status
10. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
[2][3]
Definition
Semiconductors reserves the right to change the specification in any manner without notice.
at a later date.Philips Semiconductors reserves the right to change the specification without notice,in order to improve the design and supply the best possible product.
right to make changes at anytimeinorder to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).

11. Disclaimers

Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, andmakes no representationsor warranties thattheseproducts are free frompatent,copyright, or mask workrightinfringement, unless otherwise specified.
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com. Fax: +31 40 27 24825
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9397 750 12899
9397 750 12899
Product data Rev. 02 — 17 February 2004 11 of 12
Product data Rev. 02 — 17 February 2004 11 of 12
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Page 12
Philips Semiconductors
Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
5.1 Transient thermal impedance . . . . . . . . . . . . . . 4
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
9 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11
10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
11 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
SI4800
N-channel TrenchMOS™ logic level FET
© Koninklijke Philips Electronics N.V. 2004. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Date of release: 17 February 2004 Document order number: 9397 750 12899
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