Datasheet si4431cd Datasheet

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Page 1

New Product

P-Channel 30-V (D-S) MOSFET

Si4431CDY

Vishay Siliconix

PRODUCT SUMMARY

VDS (V) R

- 30

0.032 at V

0.049 at V

(Ω)

DS(on)

= - 10 V - 9.0

= - 4.5 V - 5.8

(A)

Qg (Typ.)

13 nC

FEATURES

• Halogen-free According to IEC 61249-2-21 Definition

•TrenchFET

• 100 % R

Power MOSFET

Tested

APPLICATIONS

• Load Switch

• Battery Switch

SO-8

Top View

Ordering Information: Si4431CDY-T1-E3 (Lead (Pb)-free) Si4431CDY-T1-GE3 (Lead (Pb)-free and Halogen-free)

P-Channel MOSFET

ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted

Parameter Symbol Limit Unit

Drain-Source Voltage

Gate-Source Voltage

Continuous Drain Current (T

Pulsed Drain Current

= 150 °C)

Continuous Source-Drain Diode Current

Maximum Power Dissipation

Operating Junction and Storage Temperature Range

= 25 °C

= 70 °C

= 25 °C

TA = 70 °C

= 25 °C

= 70 °C 2.7

= 25 °C

TA = 70 °C

- 30

± 20

- 9.0

- 7.2

- 7.0

- 5.6

- 30

- 3.5

- 2.1

a, b

4.2

, T

stg

a, b

2.5

a, b

1.6

- 55 to 150 °C

THERMAL RESISTANCE RATINGS

Parameter Symbol Typical Maximum Unit

Maximum Junction-to-Ambient

Maximum Junction-to-Foot

Notes: a. Surface mounted on 1" x 1" FR4 board. b. t = 10 s. c. Maximum under Steady State conditions is 95 °C/W. d. Based on T

= 25 °C.

Document Number: 68748 S09-0322-Rev. B, 02-Mar-09

a, c

t ≤ 10 s

Steady State

thJA

thJF

40 50

24 30

°C/W

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Page 2

New Product

Si4431CDY

Vishay Siliconix

SPECIFICATIONS TJ = 25 °C, unless otherwise noted

Parameter Symbol Test Conditions Min. Typ. Max. Unit

Static

Drain-Source Breakdown Voltage V

Temperature Coefficient ΔVDS/T

Temperature Coefficient ΔV

GS(th)

Gate-Source Threshold Voltage

Gate-Source Leakage

Zero Gate Voltage Drain Current

On-State Drain Current

Drain-Source On-State Resistance

Forward Transconductance

Dynamic

Input Capacitance

Reverse Transfer Capacitance

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

Gate Resistance

Tur n - O n D e l ay Time

Rise Time

Turn-Off DelayTime

Fall Ti me

Tur n - O n D e l ay Time

Rise Time

Turn-Off DelayTime

Fall Ti me

GS(th)/TJ

GS(th)

GSS

DSS

D(on)

DS(on)

iss

oss

rss

d(on)

d(off)

d(on)

d(off)

Drain-Source Body Diode Characteristics

Continous Source-Drain Diode Current I

Pulse Diode Forward Current I

Body Diode Voltage V

Body Diode Reverse Recovery Time t

Body Diode Reverse Recovery Charge Q

Reverse Recovery Fall Time t

Reverse Recovery Rise Time t

Notes: a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing.

≅ - 5.6 A, V

IF = - 5.6 A, dI/dt = 100 A/µs, TJ = 25 °C

= 0 V, ID = - 250 µA

ID = - 250 µA

= VGS, ID = - 250 µA

VDS = 0 V, VGS = ± 20 V

= - 30 V, VGS = 0 V

= - 30 V, V

≤ - 5 V, V

= - 4.5 V, ID = - 5.6 A

= - 15 V, ID = - 7.0 A

= - 15 V, V

= 0 V, TJ = 55 °C

= - 10 V, ID = - 7.0 A

= 0 V, f = 1 MHz

= - 10 V, ID = - 7.0 A

= - 4.5 V, ID = - 7.0 A

f = 1 MHz 0.4 2.0 4.0 Ω

= - 15 V, RL = 2.7 Ω

= - 10 V, Rg = 1 Ω

GEN

= - 15 V, RL = 2.7 Ω

= - 4.5 V, Rg = 1 Ω

GEN

TC = 25 °C - 3.5

IS = - 5.6 A, V

- 30 V

- 31

4.5

mV/°C

- 1.0 - 2.5 V

± 100 nA

- 1

- 5

= - 10 V - 20 A

0.026 0.032

0.037 0.049

18 S

1006

180

145

25 38

13 20

3.5

5.5

10 20

13 20

23 35

918

38 57

89 134

22 33

11 17

- 30

= 0 V - 0.71 - 1.2 V

22 33 ns

17 26 nC

µA

pFOutput Capacitance

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

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Document Number: 68748

S09-0322-Rev. B, 02-Mar-09

Page 3

New Product

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

Si4431CDY

Vishay Siliconix

- Drain Current (A)I 10

012345

VGS=10V thru 4 V

VGS=3V

VGS=1V,2V

VDS- Drain-to-Source Voltage (V)

Output Characteristics

0.06

0.05

0.04

0.03

VGS=4.5V

VGS=10V

4.0

3.2

2.4

1.6

- Drain Current (A)I

0.8

0.0

0.0 0.5 1.0 1.5 2.0 2.5 3.0

- Gate-to-Source Voltage (V)

TC= - 55 °C

TC= 25 °C

TC= 125 °C

Transfer Characteristics

1800

1500

1200

900

iss

- On-Resistance (Ω)R

DS(on)

- Gate-to-Source Voltage (V)

0.02

0.01

0 5 10 15 20 25 30

ID- Drain Current (A)

On-Resistance vs. Drain Current

ID=7A

VDS=15V

VDS=24V

048 12 16 20 24

Qg- Total Gate Charge (nC)

Gate Charge

600

C - Capacitance (pF)

300

rss

0 6 12 18 24 30

oss

VDS- Drain-to-Source Voltage (V)

Capacitance

1.6

VGS=-10V,ID=-5.6A

1.4

1.2

- On-Resistance

1.0

(Normalized)

DS(on)

0.8

0.6

- 50 - 25 0 25 50 75 100 125 150

-Junction Temperature (°C)

VGS= - 4.5 V,ID=-7A

On-Resistance vs. Junction Temperature

Document Number: 68748 S09-0322-Rev. B, 02-Mar-09

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Page 4

New Product

Si4431CDY

Vishay Siliconix

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

100

- Source Current (A)I

0.1

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1

TJ= 150 °C

-Source-to-Drain Voltage (V)

Source-Drain Diode Forward Voltage

2.1

1.9

1.7

(V)V

ID= 250 µA

TJ= 25 °C

0.05

ID=7A

0.04

0.03

0.02

- On-Resistance (Ω)R

DS(on)

0.01

0.00 048 12 16 20

VGS- Gate-to-Source Voltage (V)

TJ= 125 °C

TJ= 25 °C

On-Resistance vs. Gate-to-Source Voltage

GS(th)

1.5

1.3

1.1

- 50 - 25 0 25 50 75 100 125 150

TJ- Temperature (°C)

Threshold Voltage

100

- Drain Current (A)

0.1

0.01

0.1 1 10 100

Safe Operating Area

Limited byR

TA=25 °C

Single Pulse

VDS- Drain-to-Source Voltage (V)

* V

> minimum VGSat which R

DS(on)

Power (W)

0.001 0.01 0.1 1 10 100

Time (s)

Single Pulse Power, Junction-to-Ambient

1ms

10 ms

100 ms

1s 10 s

BVDSS Limited

DS(on)

is specified

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Document Number: 68748

S09-0322-Rev. B, 02-Mar-09

Page 5

New Product

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

- Drain Current (A)

0 25 50 75 100 125 150

- Case Temperature (°C)

Current Derating*

Si4431CDY

Vishay Siliconix

Power (W)

0 25 50 75 100 125 150

- Case Temperature (°C)

Power, Junction-to-Foot

* The power dissipation PD is based on T dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package

= 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper

J(max)

3.0

2.5

2.0

1.5

Power (W)

1.0

0.5

0.0 0 25 50 75 100 125 150

-Ambient Temperature (°C)

Power Derating, Junction-to-Ambient

limit.

Document Number: 68748 S09-0322-Rev. B, 02-Mar-09

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Page 6

New Product

Si4431CDY

Vishay Siliconix

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

Duty Cycle = 0.5

0.2

Thermal Impedance

Normalized Effective Transient

Thermal Impedance

Normalized Effective Transient

0.1

0.01

0.1

-4

0.1

0.05

0.02

Single Pulse

Duty Cycle = 0.5

0.2

0.1

0.05

0.02

Notes:

100

thJA

(t)

= 75 °C/W

100010

1. Duty Cycle, D =

2. Per Unit Base = R

3. T

JM-TA=PDMZthJA

4. Surface Mounted

-3

-2

-1

Square WavePulse Duration (s)

Normalized Thermal Transient Impedance, Junction-to-Ambient

-4

Single Pulse

-3

-2

-1

01110

0.01

Square WavePulse Duration (s)

Normalized Thermal Transient Impedance, Junction-to-Foot

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?68748

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Document Number: 68748

S09-0322-Rev. B, 02-Mar-09

Page 7

SOIC (NARROW): 8-LEAD

JEDEC Part Number: MS-012

Package Information

Vishay Siliconix

DIM

A 1.35 1.75 0.053 0.069

B 0.35 0.51 0.014 0.020

C 0.19 0.25 0.0075 0.010

D 4.80 5.00 0.189 0.196

E 3.80 4.00 0.150 0.157

e 1.27 BSC 0.050 BSC

H 5.80 6.20 0.228 0.244

h 0.25 0.50 0.010 0.020

L 0.50 0.93 0.020 0.037

q0°8°0°8°

S 0.44 0.64 0.018 0.026

ECN: C-06527-Rev. I, 11-Sep-06 DWG: 5498

0.25 mm (Gage Plane)

h x 45

MILLIMETERS INCHES

Min Max Min Max

0.10 0.20 0.004 0.008

All Leads

0.101 mm

0.004"

Document Number: 71192 11-Sep-06

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Page 8

VISHAY SILICONIX

Trench FET® Power MOSFETs

Application Note 808

Mounting LITTLE FOOT®, SO-8 Power MOSFETs

Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use

integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and

0.050

1.27

design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same.

See Application Note 826, Recommended Minimum Pad

Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/ppg?72286), for the

0.027

0.69

0.07

1.98

Figure 2. Dual MOSFET SO-8 Pad Pattern

basis of the pad design for a LITTLE FOOT SO-8 power MOSFET. In converting this recommended minimum pad to the pad set for a power MOSFET, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package.

In the case of the SO-8 package, the thermal connections are very simple. Pins 5, 6, 7, and 8 are the drain of the MOSFET for a single MOSFET package and are connected together. In a dual package, pins 5 and 6 are one drain, and pins 7 and 8 are the other drain. For a small-signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The

The minimum recommended pad patterns for the single-MOSFET SO-8 with copper spreading (Figure 1) and dual-MOSFET SO-8 with copper spreading (Figure 2) show the starting point for utilizing the board area available for the heat-spreading copper. To create this pattern, a plane of copper overlies the drain pins. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. These patterns use all the available area underneath the body for this purpose.

total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board.

Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder

0.288

7.3

connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the

0.050

1.27

0.027

0.69

0.078

1.98

0.2

5.07

0.196

5.0

Figure 1. Single MOSFET SO-8 Pad

Pattern With Copper Spreading

Document Number: 70740 www.vishay.com Revision: 18-Jun-07 1

drain pins, the solder mask generation occurs automatically.

A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least

0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device.

0.288

7.3

0.2

5.07

With Copper Spreading

0.088

2.25

0.088

2.25

APPLICATION NOTE

Page 9

Application Note 826

Vishay Siliconix

RECOMMENDED MINIMUM PADS FOR SO-8

0.172

(4.369)

0.028

(0.711)

Return to Index

0.022

(0.559)

0.246 (6.248)

Recommended Minimum Pads

Dimensions in Inches/(mm)

0.050

(1.270)

0.152

0.047

(3.861)

(1.194)

APPLICATION NOTE

www.vishay.com Document Number: 72606 22 Revision: 21-Jan-08

Page 10

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Vishay

Disclaimer

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Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability.

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Document Number: 91000 www.vishay.com Revision: 11-Mar-11 1