• Halogen-free According to IEC 61249-2-21
Definition
• LITTLE FOOT® Plus
• 100 % R
Tested
g
• Compliant to RoHS Directive 2002/95/EC
D
G
S
K
A
Ordering Information: Si3812DV-T1-GE3 (Lead (Pb)-free and Halogen-free)
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
Parameter Symbol 5 sSteady State Unit
Drain-Source Voltage (MOSFET)
Reverse Voltage (Schottky)
Gate-Source Voltage (MOSFET)
Continuous Drain Current (T
= 150 °C) (MOSFET)
J
Pulsed Drain Current (MOSFET)
Continuous Source Current (MOSFET Diode Conduction)
Average Foward Current (Schottky)
Pulsed Foward Current (Schottky)
Maximum Power Dissipation (MOSFET)
Maximum Power Dissipation (Schottky)
a
a
Operating Junction and Storage Temperature Range
Note:
a. Surface mounted on 1" x 1" FR4 board.
a
TA = 25 °C
T
= 85 °C
A
a
TA = 25 °C
T
= 85 °C
A
TA = 25 °C
T
= 85 °C
A
V
DS
V
KA
V
GS
I
D
I
DM
I
S
I
F
I
FM
2.42.0
1.71.4
1.050.75
0.50.5
88
1.150.83
P
D
0.590.53
1.00.76
0.520.48
T
, T
J
stg
20V
20
± 12
8
- 55 to 150°C
V
A
W
Document Number: 71069
www.vishay.com
S11-0651-Rev. G, 11-Apr-11
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
This document is subject to change without notice.
1
Page 2
Si3812DV
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Parameter DeviceSymbol TypicalMaximumUnit
Junction-to-Ambient
a
Steady State
Junction to Foot (MOSFET Drain, Schottky Cathode) Steady State
t 5 s
MOSFET
Schottky103125
MOSFET130150
R
thJA
Schottky140165
MOSFET
Schottky8095
R
thJF
Note:
a. Surface mounted on 1" x 1" FR4 board.
MOSFET AND SCHOTTKY SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
Parameter Symbol Test Conditions Min. Typ.Max.Unit
Static
V
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
(MOSFET and Schottky)
On-State Drain Current
a
Drain-Source On-State Resistance
Forward Transconductance
Schottky Diode Forward Voltage
Dynamic
b
a
a
Total Gate Charge
Gate-Drain Charge
Gate Resistance
Tur n -O n De l a y T i m e
Rise Time
Turn-Off Delay Time
Fall Time
Source-Drain Reverse Recovery Time
V
GS(th)
I
GSS
I
DSS
I
V
D(on)
a
R
DS(on)
g
fs
V
SD
Q
g
Q
gs
Q
gd
R
g
t
d(on)
t
r
t
d(off)
t
f
t
rr
Notes:
a. Pulse test; pulse width 300 µs, duty cycle 2 %.
b. Guaranteed by design, not subject to production testing.
V
V
DS
I
= VGS, ID = 250 µA
DS
VDS = 0 V, VGS = ± 12 V
V
= 16 V, V
DS
DS
DS
V
GS
V
GS
= 16 V, V
GS
5 V, V
= 4.5 V, ID = 2.4 A
= 2.5 V, ID = 1.0 A
= 0 V
GS
= 0 V, TJ = 85 °C
= 4.5 V
GS
VDS = 5 V, ID = 2.4 A
IS = 1.5 A, V
= 10 V, V
V
= 10 V, RL = 10
DD
1 A, V
D
GS
GEN
= 0 V
GS
= 4.5 V, ID = 2.4 A
= 4.5 V, Rg = 6
IF = 3.0 A, dI/dt = 100 A/µs
93110
°C/W
7590
0.6V
± 100nA
1
10
µA
5A
0.1000.125
0.1600.200
5S
0.791.1V
2.14.0
0.3
nCGate-Source Charge
0.4
13.7
1017
3050
1425
ns
612
3050
SCHOTTKY SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
Parameter Symbol Test Conditions Min. Typ.Max.Unit
Forward Voltage Drop
V
F
IF = 0.5 A
I
= 0.5 A, TJ = 125 °C
F
VR = 20
Maximum Reverse Leakage Current
Junction Capacitance
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
I
rm
C
T
V
= 20 V, TJ = 75 °C
R
V
= 20 V, TJ = 125 °C
R
VR = 10 V
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
This document is subject to change without notice.
0.420.48
0.330.4
V
0.0020.100
0.061
mA
1.510
31pF
Document Number: 71069
S11-0651-Rev. G, 11-Apr-11
Page 3
MOSFET TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
0
2
4
6
8
10
012345
VGS = 4.5 V thru 3.5 V
1.5 V
V
DS
- Drain-to-Source Voltage (V)
- Drain Current (A)I
D
2.5 V
3 V
2 V
0.0
0.1
0.2
0.3
0.4
0.5
01234567
VGS = 4.5 V
VGS = 2.5 V
- On-Resistance ()
R
DS(on)
ID - Drain Current (A)
0.0
0.9
1.8
2.7
3.6
4.5
0.00.51.01.52.02.5
VDS = 10 V
I
D
= 2.4 A
- Gate-to-Source Voltage (V)
Qg - Total Gate Charge (nC)
V
GS
0
2
4
6
8
10
0.00.51.01.52.02.53.03.54.0
25 °C
TC = - 55 °C
125 °C
V
GS
- Gate-to-Source Voltage (V)
- Drain Current (A)I
D
0
50
100
150
200
250
300
048121620
C
rss
C
oss
C
iss
VDS - Drain-to-Source Voltage (V)
C - Capacitance (pF)
Si3812DV
Vishay Siliconix
Output Characteristics
On-Resistance vs. Drain Current
1.8
1.6
1.4
Transfer Characteristics
Capacitance
VGS = 4.5 V
= 2.4 A
I
D
Document Number: 71069
S11-0651-Rev. G, 11-Apr-11
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Gate Charge
1.2
- On-Resistance
(Normalized)
1.0
DS(on)
R
0.8
0.6
- 50 - 250255075100125150
This document is subject to change without notice.
- Junction Temperature (°C)
T
J
On-Resistance vs. Junction Temperature
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Si3812DV
0.00
0.08
0.16
0.24
0.32
0.40
012345
VGS - Gate-to-Source Voltage (V)
- On-Resistance ()R
DS(on)
ID = 2.4 A
ID = 1 A
0.01
0
1
6
8
2
4
10300.1
Power (W)
Time (s)
Square Wave Pulse Duration (s)
Normalized Effective Transient
Thermal Impedance
2
1
0.1
0.01
10
-3
10
-2
11060010
-1
10
-4
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
Single Pulse
100
1. Duty Cycle, D =
2. Per Unit Base = R
thJA
= 130 °C/W
3. T
JM
- TA = PDMZ
thJA
(t)
t
1
t
2
t
1
t
2
Notes:
4. Surface Mounted
P
DM
Vishay Siliconix
MOSFET TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
10
1
TJ = 150 °C
- Source Current (A)I
S
0.1
00.30.60.9
V
SD
Source-Drain Diode Forward Voltage
0.4
0.2
0.0
Variance (V)V
- 0.2
GS(th)
- 0.4
TJ = 25 °C
1.21.5
- Source-to-Drain Voltage (V)
On-Resistance vs. Gate-to-Source Voltage
ID = 250 µA
- 0.6
- 50 - 250255075100125150
TJ - Temperature (°C)
Threshold Voltage
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?71069
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6
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
.
This document is subject to change without notice.
Document Number: 71069
S11-0651-Rev. G, 11-Apr-11
Page 7
TSOP: 5/6−LEAD
JEDEC Part Number: MO-193C
Package Information
Vishay Siliconix
e1
5 4
1
2
e
b
E 1 E
3
-B-
C 0.15 M B A
6 5 4
1
e
5-LEAD TSOP 6-LEAD TSOP
4x
R
4x
-C-
-A-
A 2 A
A
1
R
Seating Plane
D
C 0.08
e1
E 1 E
2
1
1
b
(L 1 )
3
-B-
C 0.15 M B A
0.17 Ref
c
L
2
Gauge Plane
Seating Plane
L
Document Number: 71200
18-Dec-06
MILLIMETERS INCHES
Dim Min Nom Max Min Nom Max
0.91 - 1.10 0.036 - 0.043
A
0.01 - 0.10 0.0004 - 0.004
A
1
0.90 - 1.00 0.035 0.0380.039
A
2
0.30 0.32 0.45 0.012 0.013 0.018
b
0.10 0.15 0.20 0.004 0.006 0.008
c
2.95 3.05 3.10 0.116 0.120 0.122
D
2.70 2.85 2.980.106 0.112 0.117
E
1.55 1.65 1.70 0.061 0.065 0.067
E
1
e
e
1
L
L
1
L
2
R
1
ECN: C-06593-Rev. I, 18-Dec-06
DWG: 5540
0.95 BSC 0.0374 BSC
1.80 1.90 2.00 0.071 0.075 0.079
0.32 - 0.50 0.012 - 0.020
0.60 Ref 0.024 Ref
0.25 BSC 0.010 BSC
0.10 - - 0.004 - -
0 4 80 4 8
7 Nom 7 Nom
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1
Page 8
Vishay Siliconix
Mounting LITTLE FOOTR TSOP-6 Power MOSFETs
AN823
Surface mounted power MOSFET packaging has been based on
integrated circuit and small signal packages. Those packages
have been modified to provide the improvements in heat transfer
required by power MOSFETs. Leadframe materials and design,
molding compounds, and die attach materials have been
changed. What has remained the same is the footprint of the
packages.
The basis of the pad design for surface mounted power MOSFET
is the basic footprint for the package. For the TSOP-6 package
outline drawing see http://www.vishay.com/doc?71200 and see
http://www.vishay.com/doc?72610 for the minimum pad footprint.
In converting the footprint to the pad set for a power MOSFET, you
must remember that not only do you want to make electrical
connection to the package, but you must made thermal connection
and provide a means to draw heat from the package, and move it
away from the package.
In the case of the TSOP-6 package, the electrical connections are
very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and
are connected together. For a small signal device or integrated
circuit, typical connections would be made with traces that are
0.020 inches wide. Since the drain pins serve the additional
function of providing the thermal connection to the package, this
level of connection is inadequate. The total cross section of the
copper may be adequate to carry the current required for the
application, but it presents a large thermal impedance. Also, heat
spreads in a circular fashion from the heat source. In this case the
drain pins are the heat sources when looking at heat spread on the
PC board.
Since surface mounted packages are small, and reflow soldering
is the most common form of soldering for surface mount
components, “thermal” connections from the planar copper to the
pads have not been used. Even if additional planar copper area is
used, there should be no problems in the soldering process. The
actual solder connections are defined by the solder mask
openings. By combining the basic footprint with the copper plane
on the drain pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low impedance
path for heat to move away from the device.
REFLOW SOLDERING
Vishay Siliconix surface-mount packages meet solder reflow
reliability requirements. Devices are subjected to solder reflow as a
test preconditioning and are then reliability-tested using
temperature cycle, bias humidity, HAST, or pressure pot. The
solder reflow temperature profile used, and the temperatures and
time duration, are shown in Figures 2 and 3.
Figure 1 shows the copper spreading recommended footprint for
the TSOP-6 package. This pattern shows the starting point for
utilizing the board area available for the heat spreading copper. To
create this pattern, a plane of copper overlays the basic pattern on
pins 1,2,5, and 6. The copper plane connects the drain pins
electrically, but more importantly provides planar copper to draw
heat from the drain leads and start the process of spreading the
heat so it can be dissipated into the ambient air. Notice that the
planar copper is shaped like a “T” to move heat away from the
drain leads in all directions. This pattern uses all the available area
underneath the body for this purpose.
0.167
4.25
0.074
0.010
0.25
1.875
0.122
3.1
0.014
0.35
0.026
0.65
0.049
0.049
1.25
1.25
FIGURE 1. Recommended Copper Spreading Footprint
Document Number: 71743
27-Feb-04
Ramp-Up Rate
Temperature @ 155 " 15_C
Temperature Above 180_C
Maximum Temperature
Time at Maximum Temperature20 − 40 Seconds
Ramp-Down Rate
FIGURE 2. Solder Reflow Temperature Profile
+6_C/Second Maximum
120 Seconds Maximum
70 − 180 Seconds
240 +5/−0_C
+6_C/Second Maximum
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Page 9
AN823
Vishay Siliconix
10 s (max)
255 − 260_C
1X4_C/s (max)3-6_C/s (max)
140 − 170_C
3_C/s (max)
Maximum peak temperature at 240_C is allowed.
60-120 s (min)
Pre-Heating Zone
FIGURE 3. Solder Reflow Temperature and Time Durations
THERMAL PERFORMANCE
A basic measure of a device’s thermal performance is the
junction-to-case thermal resistance, Rq
, or the
jc
junction-to-foot thermal resistance, Rqjf. This parameter is
measured for the device mounted to an infinite heat sink and
is therefore a characterization of the device only, in other
words, independent of the properties of the object to which the
device is mounted. Table 1 shows the thermal performance
of the TSOP-6.
TABLE 1.
Equivalent Steady State Performance—TSOP-6
Thermal Resistance Rq
jf
30_C/W
1.6
1.4
1.2
− On-Resiistance
1.0
(Normalized)
DS(on)
r
0.8
217_C
60 s (max)
Reflow Zone
On-Resistance vs. Junction Temperature
VGS = 4.5 V
= 6.1 A
I
D
SYSTEM AND ELECTRICAL IMPACT OF
TSOP-6
In any design, one must take into account the change in
MOSFET r
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree
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damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay
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obtain written terms and conditions regarding products designed for such applications.
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