Datasheet si2305ad Datasheet

Page 1
New Product
P-Channel 8-V (D-S) MOSFET
Si2305ADS
Vishay Siliconix
PRODUCT SUMMARY
VDS (V) R
0.040 at V
- 8
0.088 at V
(Ω)I
DS(on)
= - 4.5 V - 4.1
GS
= - 2.5 V - 3.4
GS
= - 1.8 V - 2.0
GS
(A) Qg (Typ.)
D
7.8 nC0.060 at V
• Halogen-free According to IEC 61249-2-21 Definition
• TrenchFET
• 100 % R
®
Power MOSFET
Test e d
g
APPLICATIONS
• Load Switch
• DC/DC Converter
TO-236
(SOT-23)
1
G
S
2
Si2305ADS (5A)*
* Marking Code
Ordering Information:
D
3
Top View
Si2305ADS-T1-E3 (Lead (Pb)-free) Si2305ADS-T1-GE3 (Lead (Pb)-free and Halogen-free)
G
S
D
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter Symbol Limit Unit
Drain-Source Voltage
Gate-Source Voltage
T
= 25 °C
C
T
= 70 °C
Continuous Drain Current (T
= 150 °C)
J
C
= 25 °C
T
A
TA = 70 °C
Pulsed Drain Current
Continuous Source-Drain Diode Current
Maximum Power Dissipation
T
= 25 °C
C
= 25 °C
T
A
T
= 25 °C
C
T
= 70 °C 1.1
C
T
= 25 °C
A
TA = 70 °C
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature) 260
Notes: a. Surface Mounted on 1" x 1" FR4 board. b. t = 10 s.
V
DS
V
GS
- 8
± 8
V
- 5.4
I
D
I
DM
I
S
- 4.3
- 4.1
- 3.3
- 10
- 1.4
- 0.8
a, b
a, b
a, b
A
1.7
P
D
, T
T
J
stg
a, b
0.96
a, b
0.62
- 50 to 150
W
°C
Document Number: 69940 S09-0538-Rev. D, 06-Apr-09
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1
Page 2
New Product
Si2305ADS
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Parameter Symbol Typical Maximum Unit
Maximum Junction-to-Ambient Maximum Junction-to-Foot (Drain)
Notes: a. Surface Mounted on 1" x 1" FR4 board. b. Maximum under Steady State conditions is 175 °C/W.
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter Symbol Test Conditions Min. Typ. Max. Unit
Static
Drain-Source Breakdown Voltage V
Temperature Coefficient
DS
V
Temperature Coefficient
GS(th)
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Tur n-On D e l ay Tim e
Rise Time
Turn-Off DelayTime
Fall Time
Tur n-On D e l ay Tim e
Rise Time
Turn-Off DelayTime
Fall Time
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulse Diode Forward Current Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Fall Time
Reverse Recovery Rise Time
Notes: a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing.
b
a, b
t ≤ 10 s
Steady State
V
DS
ΔV
DS/TJ
ΔV
GS(th)/TJ
V
GS(th)
I
GSS
I
DSS
a
a
a
a
I
D(on)
R
DS(on)
C
C
C
Q
Q
t
d(on)
t
d(off)
t
d(on)
t
d(off)
I
V
Q
g
Q
R
I
SM
t
t
t
fs
iss
oss
rss
gs
gd
t
r
t
f
t
r
t
f
S
SD
rr
a
b
g
g
rr
V
= 0 V, ID = - 250 µA
GS
V
= VGS, ID = - 250 µA
DS
VDS = 0 V, VGS = ± 8 V
V
DS
= - 8 V, V
V
DS
V
≤ - 5 V, V
DS
V
= - 4.5 V, ID = - 4.1 A
GS
V
= - 2.5 V, ID = - 3.4 A
GS
= - 1.8 V, ID = - 2.0 A
V
GS
V
DS
= - 4 V, V
V
DS
= - 4 V, V
V
DS
= - 4 V, V
V
DS
V
= - 4 V, RL = 1.2 Ω
DD
≅ - 3.3 A, V
I
D
V
= - 4 V, RL = 1.2 Ω
DD
I
≅ - 3.3 A, V
D
IF = - 3.3 A, dI/dt = 100 A/µs, TJ = 25 °C
R
thJA
R
thJF
100 130
60 75
°C/W
- 8 V
ID = - 250 µA
- 55
2.1
- 0.45 - 0.8 V
± 100 nA
= - 8 V, VGS = 0 V
= 0 V, TJ = 55 °C
GS
= - 4.5 V
GS
- 5 A
- 1
- 10
0.032 0.040
0.048 0.060
0.070 0.088
= - 5 V, ID = - 4.1 A
8S
740
= 0 V, f = 1 MHz
GS
290
190
= - 4.5 V, ID = - 4.1 A
GS
7.8 15
4.5 9
= - 2.5 V, ID = - 4.1 A
GS
1.2
1.6
f = 1 MHz 1.4 7 14 Ω
13 20
35 53
= - 4.5 V, Rg = 1 Ω
GEN
32 48
10 20
510
11 17
= - 8 V, Rg = 1 Ω
GEN
22 33
16 24
TC = 25 °C
- 1.4
- 10
IF = - 3.3 A
- 0.8 - 1.2 V
33 50 ns
14 21 nC
14
19
mV/°C
µA
Ω
pFOutput Capacitance
nC
ns
A
ns
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the de vice. These are stress rating s only, and functiona l operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
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Document Number: 69940
S09-0538-Rev. D, 06-Apr-09
Page 3
New Product
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Si2305ADS
Vishay Siliconix
12
9
6
- Drain Current (A)I
D
3
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
VGS=4.5V thru 2 V
VGS=0.5V
V
- Drain-to-Source Voltage (V)
DS
Output Characteristics
0.10
0.08
0.06
- On-Resistance (Ω)R
DS(on)
0.04
VGS=1.8V
VGS=2.5V
VGS=4.5V
VGS=1.5V
VGS=1V
12
9
6
- Drain Current (A)I
D
3
0
0.0 0.5 1.0 1.5 2.0
TC= 125 °C
TC= 25 °C
TC= - 55 °C
VGS- Gate-to-Source Voltage (V)
Transfer Characteristics
1200
900
600
C - Capacitance (pF)
300
C
iss
C
oss
C
rss
0.02 02468 10
On-Resistance vs. Drain Current and Gate Voltage
4.5
ID=4.1A
3.6
2.7
1.8
- Gate-to-Source Voltage (V)
GS
0.9
V
0.0
0.0 1.5 3.0 4.5 6.0 7.5 9.0
Document Number: 69940 S09-0538-Rev. D, 06-Apr-09
ID- Drain Current (A)
VDS=4V
VDS=6.4V
Qg- Total Gate Charge (nC)
Gate Charge
0
02468
VDS- Drain-to-Source Voltage (V)
Capacitance
1.5
1.3
1.1
- On-Resistance (Normalized)
DS(on)
R
0.9
0.7
- 50 - 25 0 25 50 75 100 125 150
VDS=2.5V,ID=3.4A
VDS=4.5V,ID=4.1A
-Junction Temperature (°C)
T
J
On-Resistance vs. Junction Temperature
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3
Page 4
New Product
Si2305ADS
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100
10
TJ= 150 °C
1
- Source Current (A)I
S
0.1
0.0 0.2 0.4 0.6 0.8 1.0 1.2
VSD-Source-to-Drain Voltage (V)
Source-Drain Diode Forward Voltage
0.7
0.6 ID= 250 µA
0.5
(V)V
TJ= 25 °C
0.10
ID=4.1A
0.08
0.06
0.04
- On-Resistance (Ω)R
DS(on)
0.02
0.00 02468
VGS- Gate-to-Source Voltage (V)
TA= 125 °C
TA= 25 °C
On-Resistance vs. Gate-to-Source Voltage
30
20
GS(th)
0.4
0.3
0.2
- 50 - 25 0 25 50 75 100 125 150
TJ- Temperature (°C)
Threshold Voltage
100
Limited byR
10
1
- Drain Current (A)
D
I
0.1
0.01
0.1
* V
Safe Operating Area, Junction-to-Ambient
*
DS(on)
TA= 25 °C
Single Pulse
V
- Drain-to-Source Voltage (V)
DS
> minimum VGSat which R
GS
Power (W)
10
0
0.001 0.01 0.1 1 10 100
Time (s)
Single Pulse Power, Junction-to-Ambient
1ms
10 ms
100 ms 1s
10 s DC
1
is specified
DS(on)
10
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Document Number: 69940
S09-0538-Rev. D, 06-Apr-09
Page 5
New Product
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
6.0
4.5
3.0
- Drain Current (A)
D
I
1.5
0.0 0 25 50 75 100 125 150
T
- Case Temperature (°C)
C
Current Derating*
Si2305ADS
Vishay Siliconix
2.0
1.5
1.0
Power (W)
0.5
0.0 0 25 50 75 100 125 150
- Case Temperature (°C)
T
C
Power, Junction-to-Case
* The power dissipation PD is based on T dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
= 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
J(max)
1.00
0.75
0.50
Power (W)
0.25
0.00 0 25 50 75 100 125 150
-Ambient Temperature (°C)
T
A
Power, Junction-to-Ambient
limit.
Document Number: 69940 S09-0538-Rev. D, 06-Apr-09
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5
Page 6
New Product
Si2305ADS
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
Thermal Impedance
Normalized Effective Transient
0.001
-4
10
Single Pulse
-3
10
-2
10
-1
Square WavePulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
Notes:
P
DM
t
1
t
1. Duty Cycle, D =
2. Per Unit Base = R
3. T
4. Surface Mounted
2
JM-TA=PDMZthJA
100
thJA
t
1
t
2
(t)
= 175 °C/W
000101110
Thermal Impedance
Normalized Effective Transient
1
Duty Cycle = 0.5
0.1
0.01
-4
10
0.2
0.1
Single Pulse
0.02
0.05
-3
10
-2
10
Square WavePulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Foot
-1
110
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?69940
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.
Document Number: 69940
S09-0538-Rev. D, 06-Apr-09
Page 7
SOT-23 (TO-236): 3-LEAD
b
3
1
Package Information
Vishay Siliconix
E
E
1
2
S
A
A
2
A
1
Dim
A 0.89 1.12 0.035 0.044
A
1
A
2
b 0.35 0.50 0.014 0.020
c 0.085 0.18 0.003 0.007
D 2.80 3.04 0.110 0.120
E 2.10 2.64 0.083 0.104
E
1
e 0.95 BSC 0.0374 Ref
e
1
L 0.40 0.60 0.016 0.024
L
1
S 0.50 Ref 0.020 Ref
q 3°8°3°8°
ECN: S-03946-Rev. K, 09-Jul-01 DWG: 5479
e
e
1
D
0.10 mm
Seating Plane
C
0.004"
C
C
q
L
L
1
MILLIMETERS INCHES
Min Max Min Max
0.01 0.10 0.0004 0.004
0.88 1.02 0.0346 0.040
1.20 1.40 0.047 0.055
1.90 BSC 0.0748 Ref
0.64 Ref 0.025 Ref
0.25 mm
Gauge Plane
Seating Plane
Document Number: 71196 09-Jul-01
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Page 8
Mounting LITTLE FOOTR SOT-23 Power MOSFETs
Wharton McDaniel
AN807
Vishay Siliconix
Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same.
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/doc?72286), for the basis
of the pad design for a LITTLE FOOT SOT-23 power MOSFET footprint . In converting this footprint to the pad set for a power device, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package.
The electrical connections for the SOT-23 are very simple. Pin 1 is the gate, pin 2 is the source, and pin 3 is the drain. As in the other LITTLE FOOT packages, the drain pin serves the additional function of providing the thermal connection from the package to the PC board. The total cross section of a copper trace connected to the drain may be adequate to carry the current required for the application, but it may be inadequate thermally. Also, heat spreads in a circular fashion from the heat source. In this case the drain pin is the heat source when looking at heat spread on the PC board.
ambient air. This pattern uses all the available area underneath the body for this purpose.
0.114
2.9
0.081
2.05
0.150
3.8
0.059
1.5
0.0394
FIGURE 1. Footprint With Copper Spreading
1.0
0.037
0.95
Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically.
Figure 1 shows the footprint with copper spreading for the SOT-23 package. This pattern shows the starting point for utilizing the board area available for the heat spreading copper. To create this pattern, a plane of copper overlies the drain pin and provides planar copper to draw heat from the drain lead and start the process of spreading the heat so it can be dissipated into the
Document Number: 70739 26-Nov-03
A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low-impedance path for heat to move away from the device.
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1
Page 9
RECOMMENDED MINIMUM PADS FOR SOT-23
Application Note 826
Vishay Siliconix
0.106 (2.692)
0.037
(0.950)
0.053
(1.341)
0.097
(2.459)
Recommended Minimum Pads
Dimensions in Inches/(mm)
0.022
(0.559)
0.049
0.029
(1.245)
(0.724)
Return to Index
Document Number: 72609 www.vishay.com Revision: 21-Jan-08 25
Return to Index
APPLICATION NOTE
Page 10
Legal Disclaimer Notice
Vishay

Disclaimer

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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