Low Startup Current: 8µA
Low Operating Current: 3.7mA
Peak-Current Mode of Operation with Cycle-by-
Cycle Current Limiting
PWM Frequency Continuously Decreasing with
Burst Mode at Light Loads
V
Over-Voltage Protection (OVP)
DD
AC Input Brownout Protection with Hysteresis
Constant Output Power Limit (Full AC Input Range)
Internal Latch Circuit for OVP, OTP, and OCP
Two-level OCP Delay: 1600ms
Output Short-Circuited Delay Time: 100ms
Programmable PWM Frequency with
Frequency Hopping
OCP Threshold is Half Peak Current Limit
Feedback Open-loop Protection with 1700ms Delay
Built-in Soft-Start
Applications
General-purpose switch-mode power supplies and
flyback power converters, including:
Power Adapters
Open-frame SMPS
SMPS with Surge-current Output, such as for
Printers, Scanners, Motor Drivers
Description
The SG6846A is especially designed for SMPS with
surge-current output, incorporated with a two-level OCP
function. Besides the cycle-by-cycle current limiting, if
the switching current is higher than two thirds the peakcurrent threshold for 1700ms, over-current protection is
activated such that the SG6846A is latched off.
If the switching current is higher than two thirds of the
peak-current threshold for 100ms, and the voltage on
the V
is still higher than V
DD
are latched off immediately once the V
lower than V
short circuit occurs.
SG6846A also integrates a frequency-hopping function
internally to reduce EMI emission of a power supply with
minimum line filters. Its built-in synchronized slope
compensation provides proprietary internal
compensation for constant output power limit over
universal AC input range. Also, the gate output is
clamped at 18V to protect the external MOSFET from
over-voltage damage. Internal soft-start is built-in to
soften the stress on the MOSFET and startup current
during power on period.
Other protection functions include AC input brownout
protection with hysteresis, V
and over-temperature protection. For over-temperature
protection, an external NTC thermistor can be applied to
sense the ambient temperature. When OCP, V
or OTP is activated, an internal latch circuit latches off
the controller. The PWM pulses stay latched off until the
power supply is disconnected from the mains outlet.
SG6846A controller is available in 8-pin SOP package.
+ 1V. This is useful when an output
DD-OFF
+ 1V, the PWM pulses
DD-OFF
over-voltage protection,
DD
voltage is
DD
OVP,
DD
Ordering Information
Part Number
SG6846ALSY -40 to +105°C Yes 8-Pin Small Outline Package (SOP) Tape & Reel
SG6846ALSZ -40 to +105°C Yes 8-Pin Small Outline Package (SOP) Tape & Reel
SG6846ACSY -40 to +105°C No 8-Pin Small Outline Package (SOP) Tape & Reel
The signal from the external compensation circuit is fed into this pin. The PWM
2 FB Feedback
3 VIN
4 RI
5 RT
6 SENSE Current Sense
7 VDD Power Supply
8 GATE Driver Output
Line-voltage
Detection
Reference
Setting
Temperature
Detection
duty cycle is determined in response to the signal from this pin and the currentsense signal from pin 6.
Line-voltage detection is used for brownout protection with hysteresis. Constant
output power limit over universal AC input range is achieved using this pin. Add
a low-pass filter to filter out line ripple on the bulk capacitor.
A resistor from the RI pin to ground generates a reference current source that
determines the switching frequency. Increasing the resistance reduces the
switching frequency. A 26k resistor results in a 65kHz switching frequency.
For over-temperature protection, an external NTC thermistor is connected from
this pin to the GND pin. The impedance of the NTC decreases at high
temperatures. Once the voltage of the RT pin drops below a threshold, PWM
output is disabled.
The sensed voltage is used for peak-current-mode control and cycle-by-cycle
current limiting. If the switching current is higher than OCP threshold and lasts
for 1700ms, SG6846A turns off immediately. This two-level OCP feature is
especially suitable for SMPS with surge current output.
If an open-circuit failure occurs in the feedback loop, the internal protection
circuit disables PWM output as long as VDD exceeds a threshold.
The totem-pole output driver for the power MOSFET; internally clamped
below 18V.
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are given with
respect to GND pin.
Symbol Parameter Min. Max. Unit
VDD Supply Voltage 25 V
VL Input Voltage to FB, SENSE, VIN, RT, RI Pins -0.3 7.0 V
TL Lead Temperature, Wave Soldering, 10 Seconds +260 °C
ESD
Human Body Model, JESD22-A114 5.0
Charge Device Model, JESD22-C101 1.5
kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
The turn-on/turn-off thresholds are fixed internally at
16.5V and 10.5V. To enable the SG6846A during
startup, the hold-up capacitor must first be charged to
16.5V through the startup resistor.
The hold-up capacitor continues to supply V
energy can be delivered from the auxiliary winding of the
main transformer. The V
must not drop below 10.5V
DD
during this startup process. This UVLO hysteresis
window ensures that the hold-up capacitor can
adequately supply V
during startup.
DD
The typical startup current is only 8µA, which allows a
high-resistance, low-wattage startup resistor to be used.
For constant output power limit over a universal inputvoltage range, the peak-current threshold is adjusted by
the voltage of the VIN pin. Since the VIN pin is
connected to the rectified AC input line voltage through
the resistive divider, a higher line voltage generates a
higher V
the V
voltage. The threshold voltage decreases as
IN
increases, making the maximum output power at
IN
high line input voltage equal to that at low line input. The
value of R-C network should not be so large it affects
the power limit (shown in Figure 20). R and C should put
on less than 300 and 1000pF, respectively, to
minimize power loss. A 1.5M/0.25W startup resistor
and a 10µF/25V V
hold-up capacitor are sufficient for
DD
a universal input range.
The required operating current has been reduced to
3.7mA, which enables higher efficiency and reduces the
V
hold-up capacitance requirement.
DD
Green-Mode Operation
The proprietary green-mode function provides off-time
modulation to continuously decrease the switching
frequency under light-load conditions. Maximum on-time
is limited to provide protection against abnormal
conditions. To further reduce power consumption under
zero-load condition, the PWM oscillator is completely
turned off and the power supply enters burst-mode. This
green mode dramatically reduces power consumption
under light-load and zero-load conditions. Power
supplies using SG6846A can meet restrictive international
regulations regarding standby power consumption.
Oscillator Operation
A resistor connected from the RI pin to GND generates
a reference current source, inside the SG6846A, used to
determine the PWM frequency. Increasing the
resistance decreases the amplitude of the current
source and reduces the PWM frequency. Using a 26k
resistor results in a corresponding 65kHz switching
frequency. The relationship between R
switching frequency is:
1690
f
(kHz)
PWM
)(kR
I
before
DD
and the
I
(2)
If an open-circuit or short-circuit to ground occurs at the
RI pin, the internal protection circuit immediately shuts
down the controller.
Two-level Over-current Protection (OCP)
The cycle-by-cycle current limiting shuts down the PWM
immediately when the switching current is over the
peak-current threshold. Additionally, when the switching
current is higher than the over-current threshold, the
internal counter counts down. When the total
accumulated counting time is more than ~1600ms
(R
= 26k), the controller is latched off and the internal
I
counter counts up. When the switching current is lower
than the over-current threshold, the internal counter
counts down. When the total accumulated counting time
is more than ~1600ms (R
= 26k), the controller is
I
latched off.
This two-level OCP protection and up/down counter are
especially designed for SMPS with surge current output,
such as those for printers, scanners, and motor drivers.
Constant Output Power Limit
For constant output power limit over universal inputvoltage range, the peak-current threshold is adjusted by
the voltage of the VIN pin. Since the VIN pin is
connected to the rectified AC input line voltage through
the resistive divider, a higher line voltage generates a
higher V
V
IN
voltage. The threshold voltage decreases as
IN
increases, making the maximum output power at
high-line input voltage equal to that at low-line input.
Brownout Protection
Since the VIN pin is connected through a resistive
divider to the rectified AC input line voltage, it can also
be used for brownout protection. If the V
than 0.7V, the PWM output is shut off. If the V
voltage is less
IN
is over
IN
0.9V, the PWM output is turned on again. The
hysteresis window for on/off is ~0.2V.
VDD Over-voltage Protection (OVP)
VDD over-voltage protection is built in to prevent
damage. If V
is over 23.6V, SG6846A is latched off.
DD
Over-Temperature Protection (OTP)
An external NTC thermistor can be connected from the
RT pin to GND. The impedance of the NTC decreases
at high temperatures. When the voltage of the RT pin
drops below 1.05V, the SG6846A is turned off. For
protection-mode options, see Ordering Information.
Noise from the current sense or the control signal may
cause significant pulse-width jitter, particularly in
continuous-conduction mode. Slope compensation helps
alleviate this problem. Good placement and layout
practices should be followed. Avoid long PCB traces and
component leads. Compensation and filter components
should be located near the SG6846A.
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
E) DRAWING FILENAME: M08AREV13
Figure 22. 8-Pin Small Outline Package (SOP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’ s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: