Page 1
Avalanche Rugged Technology
Rugged Gate Oxide Technology
Lower Input Capacitance
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10 µA (Max.) @ VDS = -250V
Low R
DS(ON)
: 1.65 Ω (Typ.)
Advanced Power MOSFET
Thermal Resistance
Junction-to-Case
Junction-to-Ambient
Junction-to-Ambient
R
θJC
R
θJA
R
θJA
o
C/W
Characteristic Max. UnitsSymbol Typ.
FEATURES
D2-PAK
1. Gate 2. Drain 3. Source
1
3
2
1
2
3
I2-PAK
*
*
When mounted on the minimum pad size recommended (PCB Mount).
Absolute Maximum Ratings
Drain-to-Source Voltage
Continuous Drain Current (T
C
=25oC)
Continuous Drain Current (T
C
=100oC)
Drain Current-Pulsed
Gate-to-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Total Power Dissipation (T
A
=25oC)
Total Power Dissipation (T
C
=25oC)
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Maximum Lead Temp. for Soldering
Purposes, 1/8 “ from case for 5-seconds
Characteristic Value UnitsSymbol
I
DM
V
GS
E
AS
I
AR
E
AR
dv/dt
P
D
I
D
T
J
, T
STG
T
L
A
V
mJ
A
mJ
V/ns
W
W
W/
o
C
A
o
C
V
DSS
V
*
SFW/I9624
BV
DSS
= -250 V
R
DS(on)
= 2.4 Ω
I
D
= -2.7 A
-250
-2.7
-1.7
-11
182
-2.7
3.8
-4.8
3.1
38
0.3
- 55 to +150
300
3.29
40
62.5
--
--
--
O
1
O
2
O
3
O
1
O
1
30
+
_
©1999 Fairchi ld Semiconduc tor Corpor ation
Rev. B
Page 2
P-CHANNEL
POWER MOSFET
Electrical Characteristics (T
C
=25oC unless otherwise specified)
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
Gate-Source Leakage , Forward
Gate-Source Leakage , Reverse
CharacteristicSymbol
Max. UnitsTyp.Min. Test Condition
Static Drain-Source
On-State Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain( “ Miller “) Charge
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
BV
DSS
∆BV/∆T
J
V
GS(th)
R
DS(on)
I
GSS
I
DSS
V
V/
o
C
V
nA
µA
Ω
Ω
pF
ns
nC
--
--
--
--
--
--
--
--
--
--
--
--
--
V
GS
=0V,ID=-250µA
I
D
=-250µA See Fig 7
V
DS
=-5V,ID=-250µA
V
GS
=-30V
V
GS
=30V
V
DS
=-250V
V
DS
=-200V,TC=125oC
V
GS
=-10V,ID=-1.4A
V
DS
=-40V,ID=-1.4A
V
DD
=-125V,ID=-2.7A,
R
G
=18Ω
See Fig 13
V
DS
=-200V,VGS=-10V,
I
D
=-2.7A
See Fig 6 & Fig 12
Drain-to-Source Leakage Current
V
GS
=0V,VDS=-25V,f =1MHz
See Fig 5
Source-Drain Diode Ratings and Characteristics
Continuous Source Current
Pulsed-Source Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
I
S
I
SM
V
SD
t
rr
Q
rr
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
--
--
--
--
--
A
V
ns
µC
Integral reverse pn-diode
in the MOSFET
T
J
=25oC,IS=-2.7A,VGS=0V
T
J
=25oC,IF=-2.7A
di
F
/dt=100A/µs
O
4
O
4
O
5
O
4
O
4
O
5
O
4
O
1
O
4
SFW/I9624
-250
--
-2.0
--
--
--
--
--
-0.22
--
--
--
--
--
65
24
11
19
34
15
16
3.3
7.8
--
--
-4.0
-100
100
-10
-100
2.4
--
540
95
35
30
50
80
40
20
--
--
2.0
415
--
--
--
140
0.7
-2.7
-11
-5.0
--
--
Notes ;
Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
L=40mH, I
AS
=-2.7A, VDD=-50V, RG=27Ω*, Starting TJ =25oC
I
SD
-2.7A, di/dt 300A/µs, VDDBV
DSS
, Starting TJ =25oC
Pulse Test : Pulse Width = 250µs, Duty Cycle 2%
Essentially Independent of Operating Temperature
O
1
O
2
O
3
O
4
O
5
<
_
<
_
<
_
<
_
Page 3
P-CHANNEL
POWER MOSFET
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage
Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current
SFW/I9624
10
-1
10
0
10
1
10
-1
10
0
10
1
@ Notes :
1. 250
µ
s Pulse Test
2. T
C
= 25 oC
V
GS
Top : - 15 V
- 10 V
- 8.0 V
- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
Bottom : - 4.5 V
-I
D
, Drain Current [A]
-VDS , Drain-Source Voltage [V]
2 4 6 8 10
10
-1
10
0
10
1
25 oC
150
o
C
- 55
o
C
@ Notes :
1. V
GS
= 0 V
2. V
DS
= -40 V
3. 250
µ
s Pulse Test
-I
D
, Drain Current [A]
-VGS , Gate-Source Voltage [V]
0 2 4 6 8 10
0
1
2
3
4
5
6
@ Note : TJ = 25 oC
VGS = -20 V
V
GS
= -10 V
R
DS(on)
, [
Ω
]
Drain-Source On-Resistance
-ID , Drain Current [A]
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
10
-1
10
0
10
1
150 oC
25
o
C
@ Notes :
1. V
GS
= 0 V
2. 250
µ
s Pulse Test
-I
DR
, Reverse Drain Current [A]
-VSD , Source-Drain Voltage [V]
0 3 6 9 12 15 18
0
5
10
VDS = -200 V
V
DS
= -125 V
V
DS
= -50 V
@ Notes : ID =-2.7 A
-V
GS
, Gate-Source Voltage [V]
QG , Total Gate Charge [nC]
10
0
10
1
0
200
400
600
800
C
iss
= Cgs+ Cgd ( Cds= shorted )
C
oss
= Cds+ C
gd
C
rss
= C
gd
@ Notes :
1. V
GS
= 0 V
2. f = 1 MHz
C
rss
C
oss
C
iss
Capacitance [pF]
-VDS , Drain-Source Voltage [V]
Page 4
P-CHANNEL
POWER MOSFET
Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature
Fig 11. Thermal Response
Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area
P
DM.
t
1.
t
2.
SFW/I9624
-75 -50 -25 0 25 50 75 100 125 150 175
0.0
0.5
1.0
1.5
2.0
2.5
3.0
@ Notes :
1. V
GS
= -10 V
2. I
D
= -1.4 A
R
DS(on)
, (Normalized)
Drain-Source On-Resistance
TJ , Junction Temperature [oC]
10
0
10
1
10
2
10
-1
10
0
10
1
10 ms
DC
1 ms
0.1 ms
@ Notes :
1. T
C
= 25 oC
2. T
J
= 150 oC
3. Single Pulse
Operation in This Area
is Limited by R
DS(on)
-I
D
, Drain Current [A]
-VDS , Drain-Source Voltage [V]
-75 -50 -25 0 25 50 75 100 125 150 175
0.8
0.9
1.0
1.1
1.2
@ Notes :
1. V
GS
= 0 V
2. I
D
= -250 µA
-BV
DSS
, (Normalized)
Drain-Source Breakdown Voltage
TJ , Junction Temperature [oC]
25 50 75 100 125 150
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-I
D
, Drain Current [A]
Tc , Case Temperature [oC]
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
-1
10
0
single pulse
0.2
0.1
0.01
0.02
0.05
D=0.5
@ Notes :
1. Z
θ
JC
(t)=3.29 oC/W Max.
2. Duty Factor, D=t
1/t2
3. TJM-TC=PDM*Z
θ
JC
(t)
Z
θ
JC
(t) , Thermal Response
t1 , Square Wave Pulse Duration [sec]
Page 5
P-CHANNEL
POWER MOSFET
Fig 12. Gate Charge Test Circuit & Waveform
Fig 13. Resistive Switching Test Circuit & Waveforms
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
E
AS
= LL I
AS
2
---2
1
-------------------BV
DSS
-- V
DD
BV
DSS
V
in
V
out
10%
90%
t
d(on)tr
t
on
t
off
t
d(off)
t
f
Charge
V
GS
-10V
Q
g
Q
gs
Q
gd
Vary tp to obtain
required peak I
D
-10V
V
DD
C
L
L
V
DS
I
D
R
G
t
p
DUT
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
V
DD
( 0.5 rated V
DS
)
-10V
V
out
V
in
R
L
DUT
R
G
-3mA
V
GS
Current Sampling (IG)
Resistor
Current Sampling (ID)
Resistor
DUT
V
DS
300nF
50KΩ
200nF12V
Same Type
as DUT
“ Current Regulator
”
R
1
R
2
SFW/I9624
Page 6
P-CHANNEL
POWER MOSFET
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
V
DS
+
--
L
I
S
Driver
V
GS
R
G
Compliment of DUT
(N-Channel)
V
GS
• dv/dt controlled by “RG”
• I
S
controlled by Duty Factor “D”
V
DD
10V
V
GS
( Driver )
I
S
( DUT )
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
V
f
IFM , Body Diode Forward Current
Body Diode Reverse Current
I
RM
Body Diode Recovery dv/dt
di/dt
D =
Gate Pulse Width
Gate Pulse Period
--------------------------
SFW/I9624
Page 7
TRADEMARKS
ACEx™
CoolFET™
CROSSVOL T™
E2CMOS
TM
FACT™
FACT Quiet Series™
FAST
®
FASTr™
GTO™
HiSeC™
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION.
As used herein:
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STA TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
UHC™
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