Datasheet SFM9210 Datasheet (Fairchild Semiconductor)

Page 1
Advanced Power MOSFET
SFM9210
FEATURES
! Avalanche Rugged Technology ! Rugged Gate Oxide Technology ! Lower Input Capacitance ! Improved Gate Charge ! Extended Safe Operating Area ! Lower Leakage Current : 10 µA(Max.) @ V ! Lower R
: 2.25 Ω (Typ.)
DS(ON)
Absolute Maximum Ratings
Characteristic Value UnitsSymbol
Drain-to-Source Voltage Continuous Drain Current (T Continuous Drain Current (T
=25oC)
A
=70oC)
A
Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (T Linear Derating Factor
*
=25oC)
A
Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, from case for 5-seconds
1/8”
T
V
I V E
I E
dv/dt
P
, T
J
T
DSS
I
DM
AR
D
GS AS
AR
D
STG
L
= -200V
DS
*
O O
O O O
BV R
DS(on)
DSS
= -200 V
= 3.0
ID= -0.5 A
SOT-223
2
1
3
1. Gate 2. Drain 3. Source
-200
-0.5
-0.3
1
2
1 1
3
-4.0
+
_
30
133
-0.5
0.16
-5.0
1.63
0.013
- 55 to +150
300
V A A
V
mJ
A
mJ
V/ns
W
W/
o
C
o
C
Thermal Resistance
Characteristic Max. UnitsSymbol
R
θJA
*
When mounted on the mi nimum pad size recommended (PCB Mount).
Junction-to-Ambient
*
Typ.
77--
o
C/W
Rev. A
Page 2
SFM9210
P-CHANNEL
POWER MOSFET
Electrical Characteristics
CharacteristicSymbol
BV
BV/T
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
C
C
C
t
d(on)
t
d(off)
Q Q Q
Drain-Source Breakdown Voltage
DSS
Breakdown Voltage Temp. Coeff.
J
Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
Static Drain-Source On-State Resistance Forward Transconductance
fs
Input Capacitance
iss
Output Capacitance
oss
Reverse Transfer Capacitance
rss
Turn-On Delay Time
t
Rise Time
r
Turn-Off Delay Time
t
Fall Time
f
Total Gate Charge
g
Gate-Source Charge
gs
Gate-Drain( “ Miller “ ) Charge
gd
(TC=25oC unless otherwise specified)
Max. UnitsTyp.Min. Test Condition
V
-200
--
-2.0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
-0.2
--
--
--
--
--
--
0.6
220
45 16 10 20 27 12
9
1.8
4.8
--
--
-4.0
-100 100
-10
-100
3.0
--
285
65 25 30 50 65 35 11
--
--
V
V/oC
V
nA
µA
S
pF
ns
nC
=0V,ID=-250µA
GS
I
=-250µA See Fig 7
D
V
=-5V,ID=-250µA
DS
V
=-30V
GS
V
=30V
GS
VDS=-200V V
=-160V,TC=125oC
DS
=-10V,ID=-0.25A
V
GS
=-40V,ID=-0.25A
V
DS
VGS=0V,VDS=-25V,f =1MHz
VDD=-100V,ID=-1.75A, R
=18
G
See Fig 13
V
=-160V,VGS=-10V,
DS
I
=-1.75A
D
See Fig 6 & Fig 12
See Fig 5
O
O
4
O
4
O
4
5
O
4
5
O
Source-Drain Diode Ratings and Characteristics
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
I
I
SM
V
t
Q
Notes ;
Repetitive Rating : Pulse Wi dth Lim i ted by Maximum Junction Temperature
1
O
2
L=70mH, I
O
3
I
O
4
Pulse Test : Pulse Width = 250µs, Duty Cycle 2%
O
5
Essentially Independent of Operating Temperature
O
Continuous Source Current
S
Pulsed-Source Current Diode Forward Voltage
SD
Reverse Recovery Time
rr
Reverse Recovery Charge
rr
=-0.5A, VDD=-50V, RG=27*, Starting TJ =25oC
AS
_
<
-1.75A, di/dt 250A/µs, VDDBV
SD
_
<
--
1
O
4
O
_
<
, Starting TJ =25oC
DSS
_
<
--
--
--
-­110
--
0.42
--
-4.0
-4.0
--
--
A
V ns µC
-0.5
--
Integral reverse pn-diode in the MOSFET T
=25oC,IS=-0.5A,VGS=0V
J
T
=25oC,IF=-1.75A
J
di
/dt=100A/µs
F
O
4
Page 3
P-CHANNEL
POWER MOSFET
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
V
GS
Top : - 1 5 V
- 1 0 V
- 8.0 V
- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
0
10
Bo tto m : - 4 .5 V
, Drain Current [A ]
D
-I
-1
10
-1
10
-VDS , Drain-Source Voltage [V]
10
8
]
6
, [
DS(on)
R
4
Drain-Source On-Resistance
2
0
01234567
-ID , Drain Current [A]
10
VGS = -10 V
@ Notes :
1. 250 µs Pulse Test
2. TC = 25 oC
0
VGS = -20 V
10
@ Note : TJ = 25 oC
SFM9210
0
10
150 oC
, Drain Current [A ]
D
-I
1
10
25 oC
-1
246810
- 55 oC
-VGS , Gate-Source Vo ltage [V]
Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current
0
10
150 oC
, Reverse Drain C urrent [A]
DR
-I
-1
10
0.5 1.0 1.5 2.0 2.5 3.0
25 oC
-VSD , Source-Drain Voltage [V]
@ Notes :
1. V
2. V
3. 250
@ Notes :
1. V
2. 250
= 0 V
GS
= -40 V
DS
µ
= 0 V
GS
s Pulse Test
µ
s Pulse Test
400
C
300
200
Capacitance [pF]
100
iss
C
oss
C
rss
0
0
10
-VDS , Drain-Source Voltage [V]
C
= Cgs+ Cgd ( Cds= shorted )
iss
= Cds+ C
C
oss
gd
C
= C
rss
gd
@ Notes :
1. V
2. f = 1 MHz
1
10
GS
= 0 V
10
VDS = -40 V
VDS = -100 V
VDS = -160 V
5
, Gate-Source Vo ltage [V]
GS
-V
0
0246810
@ Notes : ID =-1.75 A
QG , Total Gate Char ge [nC]
Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage
Page 4
SFM9210
Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature
1.2
3.0
POWER MOSFET
2.5
1.1
2.0
P-CHANNEL
1.0
, (Normalized)
DSS
-BV
0.9
Drain-Source Breakdown Voltage
0.8
-75 -50 -25 0 25 50 75 100 125 150 175
@ Notes :
1. V
2. I
TJ , Junction Temperature [oC]
Operation in This Area
, Drain Current [A ]
D
-I
1
10
0
10
-1
10
-2
10
is Limited by R
@ Notes :
1. T
= 25 oC
C
= 150 oC
2. T
J
3. Single Pul se
0
10
DS(on)
0.01 ms
0.1 ms
1 ms
10 ms
DC
1
10
-VDS , Drain-Source Voltage [V]
= 0 V
GS
= -250 µA
D
2
10
1.5
, (Normalized)
1.0
DS(on)
R
0.5
Drain-Source On-Resistance
@ Notes :
1. V
2. I
0.0
-75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC]
Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area
0.60
0.45
0.30
, Drain Current [A ]
D
0.15
-I
0.00 25 50 75 100 125 150
Tc , Case Temperature [oC]
= -10 V
GS
= -0.9 A
D
2
10
D=0.5
0.2
1
10
0.1
0.05
0.02
0.01
(t) , Thermal Response
0
JC
10
θ
Z
-5
10
single pulse
-4
10
-3
10
10
@ Notes :
1. Z
2. Duty Factor, D=t1/t
3. TJM-TC=PDM*Z
P
DM
.
-2
-1
10
(t)=77 oC/W Max.
JC
θ
θ
t
1.
t
2.
0
10
2
(t)
JC
1
10
t1 , Square Wave Pulse Durati on [sec]
Fig 11. Thermal Response
Page 5
P-CHANNEL
POWER MOSFET
SFM9210
Fig 12. Gate Charge Test Circuit & Waveform
12V
-10V
“ Current Regulator
200nF
-3mA
V
R
G
50K
300nF
V
GS
R
1
Current Sampling (IG)
Resistor
Fig 13. Resistive Switching Test Circuit & Waveforms
V
out
in
DUT
Same Type
as DUT
DUT
R
2
Current Sampling (ID)
Resistor
R
L
V
DD
( 0.5 rated V
V
GS
Q
-10V
V
DS
Q
gs
g
Q
gd
Charge
t
on
t
d(on)tr
)
DS
V
in
10%
90%
V
out
t
d(off)
t
off
t
f
Vary tpto obtain required peak I
-10V
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BV
L
V
DS
D
R
G
L
I
D
V
DD
C
V
DD
E
=LL I
AS
----
1 2
2
AS
t
p
I
(t)
D
DSS
-------------------­BV
DSS
-- V
DD
Time
V
(t)
DS
DUT
I
AS
t
p
BV
DSS
Page 6
SFM9210
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
V
DS
DUT
--
I
S
L
P-CHANNEL
POWER MOSFET
V
GS
( Driver )
I
S
( DUT )
V
DS
( DUT )
V
GS
V
GS
Driver
R
G
D =
IFM, Body Diode Forward Current
Comp liment of DU T
Gate Pulse Width
-------------------------­Gate Pulse Period
Body Diode
Forward Voltage Drop
(N-Channel)
• dv/dt controlled by “RG”
•I
controlled by Duty Factor “D”
S
Body Diode Reverse Current
I
RM
V
f
di/dt
V
DD
10V
V
DD
Body Diode Recovery dv/dt
Page 7
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
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SMART START™ SPM™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™
UltraFET
VCX™
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LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Formative or In Design
First Production
Full Production
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
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Not In Production
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Rev. H7
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